Wireless Communications Design Handbook: Interference into circuits

Acknowledgments I would like to acknowledge the cooperation and support of Dr. Zvi Ruder, Editor of Physical Sciences for Academic Press. Dr. Ruder originally conceived the idea of having a series of three volumes to properly address the subject of noise and interference concerns in wireless communications systems. Considerable appreciation is extended to Madeline Reilly-Perez who spent many hours typing, organizing, and reviewing this book.

ix

Preface

Before the dawn of the digital age, about 25 years ago, when analog electronics was still in a commanding lead, the only interference problems of concern involved transmitters and receivers, in which spurious sidebands from a given transmitter coupled to a sensitive receiver whose bandwidth was wide enough to receive the unintentional radiation. As the digital age took off in the 1970s, the interference problems started to shift more and more to the electronic components level and PCB; analog and digital circuits were now coexisting with each other, and noise coupling between them started to appear. Furthermore, as the clock frequencies of digital circuits started to increase in the 1980s and 1990s, the interference problems between analog and digital circuits and among digital circuits themselves became even more pronounced: the multiple harmonics unintentionally generated by the clocked circuits now extended all the way to the gigahertz range, exposing the susceptibility of many circuits to these high frequencies. It was then, really out of necessity, that digital designers started to pay more attention to the "analog effects" of their digital design, and analog designers started thinking about ways to protect their highly susceptible components from digital interference and noise while improving performance. Designing electronic components and circuits that are highly immune to interference problems became a necessary goal. In many cases noise and interference control in personal communications services has to be dealt with eventually at the most fundamental level of electronics components. We can spend considerable resources at the system and subsystem level to remedy an interference problem that has surfaced in a given wireless communications scenario, and still come out empty-handed, meaning that the problem is still present. We have concentrated only on the periphery of the problem, and perhaps even tried to eliminate some of the symptoms, but the interference problem is still there. Why? Because it needs to be addressed and solved at the electronic component level. In this volume we provide the electronic designer (both digital and analog) with an introduction to the fundamentals of noise control in electronic design. This is indeed a vast field of research at many places, and there is still new xi

xii

Preface

territory to be discovered as we try to understand the physics of interference phenomena--a subject that is often difficult to address because it is embedded in electromagnetic theory. We have decided in this book to combine simple steps with more complicated steps in the identification and solution of interference problems, and to provide a fundamental knowledge of the physics of such interference cases, which the engineer can later use to optimize the design. This volume looks at noise issues in digital circuits, analog circuits, mixedsignal analog and digital circuits, and computational methods commonly used in the analysis of interference problems. It also provides a good introduction to the design of the most commonly used types of antennas in wireless communications. In the analysis of interference issues concerning digital logic, the basic factors that contribute to such interference are outlined: crosstalk in the time domain, power distribution models in TTL and CMOS devices, thermal control and the effects of thermal analysis in assessing the reliability of sensitive components, lossy transmission lines and the role of such transmission lines in the propagation delay of signals, electromigration mechanisms, and ground loops and interference consequences. We also look at noise problems arising from interfaces such as connectors and cables. ASIC and FPGA signal integrity issues (e.g., ground bounce) and methods for parasitic extraction and verification are briefly discussed. In the analysis of interference issues concerning analog circuits, the emphasis is on circuits involving operational amplifiers (op-amps). For example, we cover basic noise calculations in op-amps, input offset voltage when that offset is caused by a noise source, noise gains in op-amps, and slew rate and power bandwidth of op-amps. Internal noises in op-amps are discussed, but also in conjunction with high-speed analog-to-digital converter applications. Considerable space is given to the subject of proper bypass capacitance for analog circuits, especially analog-to-digital converters. Power bus rail design and the design of power/ ground planes are also covered. In the analysis of interference issues concerning mixed-signal ICs, a great number of subjects are discussed. For example, a more detailed look is given to analog-to-digital converters, switching mode power supplies, and the need for filtering and shielding. Radio frequency interference and the effects of intermodulation distortion are briefly covered. We also cover phase noise in most of the commonly used components of communications, such as VCO, phase detectors, PLL, DC/HF amplifiers, oscillators, frequency dividers, generators, and multipliers. An important section addresses the direct effects of radio frequency interference in transistors and digital ICs. We thus provide analytical approaches to the study, analysis, and correction of many interference problems in electronic components. However, this volume

Preface

xiii

also dedicates considerable effort to introducing computational electromagnetic methods for the analysis of interference problems that can be modeled from Maxwell equations. Several numerical techniques are discussed in detail to provide readers with good foundations in these methods. The theoretical aspects of these methodologies are put into practice in a discussion of the modeling of a wireless communications antenna. The last part of this volume discusses in detail most of the antennas commonly used in wireless communications services, from simple wire antennas to parabolic reflectors. The material learned concerning computational methods is applied in this area for the design of cylindrical arrays in PCS, portable UHF antennas, quadrafilar helix antennas, and diverse kinds of monopoles. The student should see this volume as a good introduction to issues of noise in analog and digital electronic systems, and to some methods of improving design techniques that will increase the immunity of wireless communications systems to interference problems. We wish to acknowledge the valued contribution of Madeline Reilly-Perez in the typing and editing of this manuscript.

Introduction

The information age, which began its major drive at the beginning of the 1980s with the birth of desktop computing, continues to manifest itself in many ways and presently dominates all aspects of modem technological advances. Personal wireless communication services can be considered a "subset technology" of the information age, but they have also gained importance and visibility over the past 10 years, especially since the beginning of the 1990s. It is predicted that future technological advancements in the information age will be unprecedented, and a similar optimistic view is held for wireless personal communications. Over the past few years (since 1994), billions of dollars have been invested all over the world by well-known, technology-driven companies to create the necessary infrastructure for the advancement of wireless technology. As the thrust into wireless personal communications continues with more advanced and compact technologies, the risks increase of "corrupting" the information provided by such communication services because of various interference scenarios. Although transmission of information through computer networks (LAN, WAN) or through wires (cable, phone, telecommunications) can be affected by interference, many steps could be taken to minimize such problems, since the methods of transmitting the information can be technologically managed. However, in wireless communications, the medium for transmission (free space) is uncontrolled and unpredictable. Interference and other noise problems are not only more prevalent, but much more difficult to solve. Therefore, in parallel with the need to advance wireless communication technology, there is also a great need to decrease, as much as possible, all interference modes that could corrupt the information provided. In this handbook series of three volumes, we cover introductory and advanced concepts in interference analysis and mitigation for wireless personal communications. The objective of this series is to provide fundamental knowledge to system and circuit designers about a variety of interference issues which could pose potentially detrimental and often catastrophic threats to wireless designs. The material presented in these three volumes contains a mixture of basic interference fundamentals, but also extends to more advanced XV

xvi

Introduction

topics. Our goal is to be as comprehensive as possible. Therefore, many various topics are covered. A systematic approach to studying and understanding the material presented should provide the reader with excellent technical capabilities for the design, development, and manufacture of wireless communication hardware that is highly immune to interference problems and capable of providing optimal performance. The present and future technologies for wireless personal communications are being demonstrated in three essential physical arenas: more efficient satellites, more versatile fixed ground and mobile hardware, and better and more compact electronics. There is a need to understand, analyze, and provide corrective measures for the kinds of interference and noise problems encountered in each of these three technology areas. In this handbook series we provide comprehensive knowledge about each of three technological subjects. The three-volume series,

Wireless Communications Design Handbook: Aspects of Noise, Interference, and Environmental Concerns, includes Volume I, Space Interference; Volume II, Terrestrial and Mobile Interference; and Volume III, Interference into Circuits. We now provide in this introduction a more detailed description of the topics to be addressed in this handbook.

Volume 1 In the next few years, starting in late 1997, and probably extending well into the next century, hundreds of smaller, cheaper (faster design cycle), and more sophisticated satellites will be put into orbit. Minimizing interference and noise problems within such satellites is a high priority. In Volume 1 we address satellite system and subsystems-level design issues which are useful to those engineers and managers of aerospace companies around the world who are in the business of designing and building satellites for wireless personal communications. This material could also be useful to manufacturers of other wireless assemblies who want to understand the basic design issues for satellites within which their hardware must interface. The first volume starts with a generalized description of launch vehicles and the reshaping of the space business in general in this post-Cold War era. A description is provided of several satellite systems being built presently for worldwide access to personal communication services. Iridium, Globalstar, Teledesic, and Odessey systems are described in some detail, as well as the concepts of LEO, MEO, and GEO orbits used by such satellite systems.

Introduction

xvii

Attention is then focused briefly on the subject of astrodynamics and satellite orbital mechanics, with the sole objective of providing readers with some background on the importance of satellite attitude control and the need to have a noise-free environment for such subsystems. Volume 1 shifts to the study of each spacecraft subsystem and the analysis of interference concerns, as well as noise mitigation issues for each of the satellite subsystems. The satellite subsystems addressed in detail include attitude and control, command and data handling, power (including batteries and solar arrays), and communications. For each of these subsystems, major hardware assemblies are discussed in detail with respect to their basic functionalities, major electrical components, typical interference problems, interference analysis and possible solutions, and worst-case circuit analysis to mitigate design and noise concerns. Considerable attention is paid to communications subsystems: noise and interference issues are discussed for most assemblies such as transponders, amplifiers, and antennas. Noise issues are addressed for several multiple access techniques used in satellites, such as TDMA and CDMA. As for antennas, some fundamentals of antenna theory are first addressed with the objective of extending this work to antenna interference coupling. The interactions of such antennas with natural radio noise are also covered. The next subject is mutual interference phenomena affecting space-borne receivers. This also includes solar effects of VHF communications between synchronous satellite relays and earth ground stations. Finally, satellite antenna systems are discussed in some detail. The final section of Volume 1 is dedicated to the effects of the space environment on satellite communications. The subject is divided into three parts. First, the space environment, which all satellites must survive, is discussed, along with its effects on uplink and downlink transmissions. Second, charging phenomena in spacecraft are discussed, as well as how charging could affect the noise immunity of many spacecraft electronics. Finally, discharging events are investigated, with the noise and interference they induce, which could affect not only spacecraft electronics, but also direct transmission of satellite data.

Volume 2 In the second volume of this handboook series, attention is focused on systemlevel noise and interference problems in ground fixed and mobile systems, as well as personal communication devices (e.g., pagers, cellular phones, two-way radios). The work starts by looking at base station RF communications systems and mutual antenna interference. Within this realm we address interference be-

xviii

Introduction

tween satellite and earth station links, as well as interference between broadcasting terrestrial stations and satellite earth stations. In this approach we follow the previous work with a brief introduction to interference canceling techniques at the system level. Volume 2 devotes considerable space to base-station antenna performance. We address, in reasonably good technical detail, the most suitable antennas for base-station design and how to analyze possible mutual interference coupling problems. The book also gives an overview of passive repeater technology for personal communication services and the use of smart antennas in such systems. A section of Volume 2 is dedicated entirely to pagers and cellular phones and interference mitigation methods. The fundamentals of pagers and cellular phone designs are studied, and the use of diversity in antenna design to minimize interference problems is reviewed. A major section of this volume starts with the coverage of propagation models for simulating interference. In this respect we cover Rayleigh fading as it relates to multipath interference. Path loss, co-channel, and adjacent channel interference follows. This last material is covered in good detail, since these techniques are prevalent in the propagation models used today. The last sections of Volume 2 deal in depth with the subject of path loss, material that needs better coverage than found in previous books. The following subjects are reviewed in detail: ionospheric effects, including ionospheric scintillation and absorption; tropospheric clear-air effects (including refraction, fading, and ducting); absorption, scattering, and cross-polarization caused by precipitation; and an overall look at propagation effects on interference.

Volume 3 In Volume 3, we focus our attention inward to address interference and noise problems within the electronics of most wireless communications devices. This is an important approach, because if we can mitigate interference problems at some of the fundamental levels of design, we could probably take great steps toward diminishing even more complex noise problems at the subsystem and system levels. There are many subjects that could be covered in Volume 3. However, the material that has been selected for instruction is at a fundamental level and useful for wireless electronic designers committed to implementing good noise control techniques. The material covered in Volume 3 can be divided into two major subjects: noise and interference concerns in digital electronics, including mitigation responses; and noise and interference in analog electronics,

Introduction

xix

as well as mitigation responses. In this volume we also address computational electromagnetic methods that could be used in the analysis of interference problems. In the domain of digital electronics we devote considerable attention to power bus routing and proper grounding of components in printed circuit boards (PCBs). A good deal of effort is spent in the proper design of power buses and grounding configurations in PCBs including proper layout of printed circuit board traces, power/ground planes, and line impedence matches. Grounding analysis is also extended to the electronic box level and subsystem level, with the material explained in detail. At the IC level we concentrate in the proper design of ASIC and FPGA to safeguard signal integrity and avoid noise problems such as ground bounce and impedance reflections. Within the area of electronic design automation (EDA), parasitics and verification algorithms for ASIC design are also discussed. A great deal of effort is put into the study of mitigation techniques for interference from electromagnetic field coupling and near-field coupling, also known as crosstalk, including crosstalk among PCB card pins of connectors. The work continues with specific analysis of the interactions in high-speed digital circuits concerning signal integrity and crosstalk in the time domain. Proper design of digital grounds and the usage of proper bypass capacitance layout are also addressed. Other general topics such as power dissipation and thermal control in digital IC are also discussed. Electromagnetic interference (EMI) problems arising in connectors and vias are reviewed extensively, including novel studies of electromigration in VLSI. In the analog domain, Volume 3 also addresses many subjects. This section starts with the basics of noise calculations for operational amplifiers. Included here is a review of fundamentals of circuit design using operational amplifiers, including internal noise sources for analysis. As an extension concerning noise issues in operational amplifiers, the material in this volume focuses on the very important subject of analog-to-digital converters (ADCs). In this area considerable effort is dedicated to proper power supply decoupling using bypass capacitance. Other noise issues in high-performance ADC are also addressed, including the proper design of switching power supplies for ADC, and the shielding of cable and connectors. Finally, at the IC level, work is included for studying RFI rectification in analog circuits and the effects of operational amplifiers driving several types of capacitive loads. We end this volume with the study of system-level interference issues, such as intermodulation distortion in general transmitters and modulators, and the subject of cross modulation. This is followed by the concept of phase-locked loops (PLL) design, development, and operation. Because of the importance of

xx

Introduction

PLL in communications electronics, considerable space is devoted to the study of noise concerns within each of the components of PLL. Finally, Volume 3 ends with an attempt to explore interference at the level of transistors and other components.

Errata

Wireless Communications Design Handbook: Volume 3

Reinaldo Perez

Page 175, Figure 3.69; page 178, Figure 3.72; page 180, Figure 3.74; page 181, Figure 3.75; page 191, Figure 3.83: J. Tron, J. J. Whalen, C. E. Larson, and J. M. Roe, "Computer-aided analysis of RFI effects in operational amplifiers," IEEE Trans. in EMC, Voi. 21, No. 4, 9 1979 IEEE. Page 126, Figure 3.25, and page 127, Figure 3.26: Reprinted with permission from Electronic Design, September 5, 1995. Copyright 1995, Penton Publishing Co.

Chapter 1

1.0

Noise Interactions in High-Speed Digital Circuits

Introduction

Several years ago, when TTL logic was still the predominant player in digital design, the analog effects of chip-to-chip interactions were a minor consideration. In today's IC design, the high-speed logic families make the printed circuit board look like transmission lines. Digital designers must become familiar with a series of high-speed effects in PCBs, such as transmission lines stubs, interlayer vias, voltage reflections caused by mismatches, conductor geometry, and printed-board dielectric effects. Designing high-speed logic requires a working strategy to correlate the speed of the system architecture and the interconnect integration level. To minimize interconnect performance, the following goals should be achieved: 1. Minimize ringing (mismatch reflection) when high-speed signals propagate through impedance discontinuities (such as comers, stub junctions, pins, vias, unmatched loads). 2. Diminish crosstalk between nearby signal lines. This can be achieved by separating the lines and minimizing signal-to-ground distances. 3. Reduce interconnect delays between chips by using the closest path between ICs. 4. Use high interconnect DC resistance and high dielectric loss effect at gigahertz frequencies in order to minimize edge degradations. 5. Minimize power and ground noise by decreasing the impedance of power distribution systems. Use plenty of decoupling capacitors and many power and ground planes. 6. Minimize voltage transition by using proper termination impedance. Improper impedance terminations could result in voltage transitions that are insufficient to develop a logic level transition. 7. Minimize the capacitance loading on signal lines to obtain the largest characteristic impedance and smallest propagation delay.

2

1. Noise Interactions in High-Speed Digital Circuits

As system complexity increases there is a need for automated CAE tools that would optimize the design using some of these findings, as shown in Figure 1.1. The developed EDA tools should be coupled with design guidelines and methodologies to handle the thousands of interconnections in a PCB. Desirable capabilities for such an integrated EDA tool include the ability to perform parasitic effect analysis and prediction, modeling, and simulation of physical geometries. One of the most important parameters in the design of PCBs, which has a direct effect on the electrical performance of the interconnection, is the relative dielectric constant e r. The term e r is used in the design of the interconnecting media, in the calculation of impedance, capacitance, and time propagation. In a transmission line the propagation time is proportional to the square root of e r, and impedance will vary inversely as the square root of er. A useful term often

IC Design Flow

Modeling Flow VHDL/Verilog

Physical Flow

Function Simulation t

"'-.. Specified Analog Models

Synthesis /

II,"

T

Timing Analysis VHDL/Verilog

Gate Level Simulation

~r Analog Behavioral Models

Place-and-Route

Parasitic Extraction

Physical Timing Simulation SPiCE-like Tools

Figure 1.1 IC design flow which accounts for analog effects.

SPICE Models

1.1. Microstrip Configuration

3

given is the effective relative permittivity (e~) which is the permittivity experienced by a signal as it is transmitted along a conductive path. Let us consider some typical electrical configurations of PCBs in which e r plays an important role.

1.1 Microstrip Configuration The microstrip configuration is shown in Figure 1.2a. An empirical relationship is available that gives the effective relative expression e; = 0.475e r + 0.67

for

2


- 0.5tr(m) = 0"5[trd(SeC)c(m/sec)]

(1.5)

4

1. Noise Interactions in High-Speed Digital Circuits

Figure 1.2 Typical configuration of a microstrip line.

1.1. Microstrip Configuration

5

where tr (m) is the rise time in question, trd (sec) is the device rise time, c is the speed of light and e~ is the effective relative permittivity. For conductor length L (m) greater than 0.5tr, the reflection from a mismatched load impedance will be received back at the source after the pulse has reached its maximum value. In high-speed digital design it is not uncommon for the clock cycle time to be smaller than the propagation time td from one device to another. For a system to perform properly, the propagation time td must be well controlled. When the signal line is considered to be capacitive, then the propagation time is calculated using the assumption that the loads and the line connecting these lines are purely capacitive. The propagation delay time of a signal transmitted through a conductor is given by to -

.

(1.6)

C

The characteristic impedance Z o of a line is also important in printed circuit boards. The amount of current that a circuit driven will need to supply along a path depends on the characteristic impedance value. The value of Z 0 is also important in the design of integrated circuits, since it can affect the location of receiver IC along a circuit in a PCB. The characteristic impedance for an ideal microstrip transmission line as shown in Figure 1.2 is given by 60 Zo = ~ In

in ohms,

(1.7)

or it can also be expressed as Zo = 87 l n [ ~ ]

/(er

+ 1.41) 0.5

in ohms,

(1.8)

where er is the relative permittivity of the material between the wire and the reference ground plane. Notice that in the preceding equations we have to transform the rectangular cross-section of a microstrip line of width W and thickness t into a round wire using the expression d = 0.670W [0.8 + t / W].

(1.9)

Combining these equations gives us the impedance Z o and intrinsic line capacitance C o for microstrip circuitry, Z o = 87 In

[ 5"98h]/(er+l.41)~ ( 0 . 8 W + t)

C o = 0.67(e r + 1.41) / ln(5.98h / (0.8W + t)),

(ohms),

(110)

(pF/inch),

(1.11)

6

1. Noise Interactions in High-Speed Digital Circuits

for W/h < 1.0 where h is the dielectric thickness, W is the conductor width, and t is the conductor thickness. For coated microstrip transmission lines (Figure 1.3), the preceding two equations can be used if a modified effective relative permittivity is used as given by /3~ =

/3r [1 +

e(-l55*h'/h)].

(1.12)

For striplines the characteristic impedance Z o and intrinsic line capacitance C O for a fiat conductor geometry are given by Z o = 60 l n [ 1 . 9 ( ~ ) / ( 0 . 8 W

+ t)]/X/~er

C o = [1.41Xer] / ln(3.81h / (0.8W + t)

(ohms),

(pF/inch) for W / h

(1.13) < 2.

Finally, for the dual stripline the characteristic impedance Z o and intrinsic line capacitance Co are given by

(0.8W + t) C O = 2.82 9

4(h + t + c)

~ ln[2(h - t) / (0.268W + 0.335t)]

' (pF/inch),

where h c t W h'

= = = = =

distance from signal layer to reference plane distance between signal layers signal conductor thickness signal conductor width. distance from reference plane to top of dielectric

Figure 1.3

Embedded or coated microstrip line.

(1.14)

1.1. Microstrip Configuration

7

Dual striplines have the advantage that such conductors on one layer are generally routed orthogonally to those on the other layer, keeping crosstalk to a minimum. 1.1.1

MINIMUM LOAD SEPARATION

This is defined as the minimum distance at which reflection from load in a transmission line begins to affect other adjacent loads. Let us consider Figure 1.4, which addresses the capacitive effect in loads and transmission lines. Each of the loads and all the associated capacitances will reflect a portion of the incident pulse back to the source. We look for a minimum separation distance between the loads (Lmin) such that the reflected pulses will not add up constructively to diminish the contribution from the original signal pulse. The minimum distance is given by tmin

(1.15)

- - 0 . 8 5 tr ,

td

where tr - 10% to 90% of the edge transmission rate (nsec) t d = unloaded line propagation delay (nsec/inch). For example, for a 54SXX IC with an edge transition time of 3.0 nsec and an FR-4 line propagation of t d = 0.148 nsec/inch, Lmin = 17.2 inches, which means

,,.._ Incident Lmin

_1_

m

CT L

Reflected CTL = transmission line capacitance CL = load capacitance

_1_

~ Figure 1.4

CTL

Capacitive effects in loads and transmission lines.

8

1. Noise Interactions in High-Speed Digital Circuits

that if the separation between the loads is greater than this, the reflected signals will overlap and diminish the amplitude of the incoming signal. Most often, however, we find distributed loads as shown in Figure 1.5. In such cases the transmission line is such that the separation between loads is less than the minimum separation distance Lmin. The effective capacitance per unit length experiences an overall increase, and so does transmission line capacitance:

CT = riCE (1.16)

CTotal-- dLCT L

1 Z0 --

CTotal (1 + CT / CTotal)

] "

Here, CT is the total load capacitance, CTota1 is total line capacitance, Z 0 is the unloaded line impedance, and L T is the total line inductance.

Z; -- Z 0 / ~/(1 -k- C T/fTotal)

(1.17)

is the loaded line impedance. The loaded propagation delay time (tdL) per unit length is given by tdL - td [ 1 + CT / CTotal]0"5.

(1.18)

Even when reflections are not additive, glitches will still form as a result of the reflected pulse, as shown in Figure 1.6. The reflective pulse amplitude is given by

VR - CLZoVo/ 2tt,

-

~'

CTL

CTL = transmissionlinecapacitance CL = loadcapacitance

_L , ~ cTL

CTL Figure 1.5

Capacitive effects in transmission lines and distributed loads.

(1.19)

1.1. Microstrip Configuration

Zo

I ' ~ CTL CTL = transmission line capacitance CL = Load capacitance

Figure 1.6 Reflections in capacitive loaded lines.

where t t is the edge transition time. If the load has a resistance R E of significant value, an additional delay must be added to that of Equation (1.19) to give tT = tdL + RLZoCL /(R E + Zo).

(1.20)

One important aspect of time delays is in radial loads. Radial loading occurs if multiple lines diverge from a common point on a line. The divergence point can be located anywhere along the transmission line. Radial lines offset the propagation in a transmission line by developing an impedance Znet, given by Zne t =

Z~

(1.21)

n

where Z o is the characteristic impedance of each radial line (we are assuming each radial line has the same characteristic impedance) and n is the number of radial lines. Let us consider Figure 1.7. The number of radial loads (three as shown in Figure 1.7) divided by the main line length (n/dm) will provide maximum loading density, and this magnitude defines the maximum number of loads per unit length that will maintain Z o above the minimum predefined magnitude. Usually, d m is the distance between the driver and the most distant load. -

] Co

1/ _1 CT"

For example, in Figure 1.7, d m = 22 inches (main line length) C o = 4.0 pF/inch (line capacitance per unit length = CTL) CL = 10.0 pF 10 inches; dnet2 t d = 0.15 nsec/inch

dnetl

--

Z o = 50 ohms.

'-

8 inches;

dnet3

--

6 inches

(1.22)

10

1. Noise Interactions in High-Speed Digital Circuits

NET1

[

dNetl

I DRIVER

r-

dm ".'-

dNet3 .,~-~ -

I

NET3 I I

~

- Fb L ~ I dNe~. - -

I t I --I~

I NET2

Figure 1.7

Effect of radial lines on propagation through a transmission line.

Using Equation (1.16): Cx(main) = nC L = (5)(10.0 nF) = 50 pF Cx(netl) = nC L = (2)(10.0 nF) = 20 pF Cx(net2) = nCL = (2)(10.0 nF) = 20 pF Cx(net3) = nCL = (1)(10.0 nF) = 10 pF. Using Equation (1.16): Ctotal(main) = dLCTL = dmC0 = (22 inches)(4.0 pF/inch) = 88 pF Ctota](netl) = dLCTL = dmCo = (10 inches)(4.0 pF/inch) = 40 pF Ctotal(net2) = dLCTL = dmCo = (8 inches)(4.0 pF/inch)

= 32 pF

Ctotal(net3) = dLCTL = dmCo = (6 inches)(4.0 pF/inch)

= 24 pE

Using Equation (1.17): Z~ = (main) = Z 0 / %/1 + C T / CTota 1 -- 50 / V/1 + 50 pF / 88 pF = 41.2 ohms Z~ = (main) = Z 0 / %/1 + C T / CTota 1 = 50 / V / 1 + 20 pF / 40 pF = 42 ohms Z D = (main) = Z o / %/1 + Ca- / CTota 1 = 5 0 / V / 1 + 20 pF 132 pF = 39.2 ohms Z~ = (main) = Z o / V ' I + CT / CTotal = 5 0 / g / 1'"'nL l 0 pF / 24 pF = 42 ohms.

I I

]

1.2. Crosstalk in the Time Domain

11

The parallel impedance between Z~(main) and Z~(netl) is given by Zol (parallel) =

(41.2)(42.0) (41.2) + (42.0)

= 20.8 ohms,

and for the other nets we have Zo2(parallel ) =

(41.2)(39.2) = 20.1 41.2 + 39.2

Zo3(parallel ) =

(41.2)(42.0) = 20.7. 41.2 + 42.0

Using Equation (1.18): toE(main) = td[1 + CT / CTotal] 0"5 = 0.15 nsec/inch[1 + 50 / 80] 0.5 = 0.18 nsec/inch tdL(net 1) = td[1 + CT / CTotal] 0"5 = 0.15 nsec/inch[1 + 20 / 40] 0.5 = 0.18 nsec/inch tdL(net2) - to[1 + C T [ CTotal] 0"5 = 0.15 nsec/inch[1 + 20 / 32] 0.5 = 0.19 nsec/inch tdL(net3) = td[1 + C T [ CTotal] 0"5 = 0.15 nsec/inch[1 + 10 / 24] 0.5 = 0.17 nsec/inch. The total propagation delays are given by td(main total) = (22 inches)(tdL(main)) = (22 inches)(0.18 nsec/inch) 3.96 nsec td(netl total) = (10 inches)(toL(net 1)) = (10 inches)(0.18 nsec/inch) 1.8 nsec td(net2 total) = (8 inches)(tdL(net2)) = (8 inches)(0.19 nsec/inch) 1.52 nsec td(net3 total) = (6 inches)(toL(net3)) = (6 inches)(0.17 nsec/inch) 1.02 nsec m

1.2

Crosstalk in the Time Domain

The subject of crosstalk for transmission lines in the time domain is next. We now address a more simplified approach concerning crosstalk in the time domain for simple microstrip lines in the PCB. The noise caused by crosstalk is created by the adjacent signals from active lines to passive lines. The crosstalk happens

12

1. Noise Interactions in High-Speed Digital Circuits

when the lines are close enough so as to have mutual capacitance Cm and mutual inductance L m as shown in Figure 1.8. For a microstrip line length that is greater than 2t d, the forward and backward crosstalk coefficients Kf and K b are given by (K L - K c) C o Zo (KL + K c) / 4t d,

(1.23)

Kf -- 0.5C o Z o

Kb

=

where K L = 0.55 exp { - ( A 2 9 % + B 2 9 w/4,)} Kc = 0.55exp { - ( A 1 . % A1 =

+B 1.%)}

1 + 0.251n[ e r +1 1 2

A 2 = 1 + 0.25 ln[/x r + 1)/2] B 1 = 0.1 ( 8 r nt- 1) ~ B2

--

d -

0 . 1 (/.z r +

1) 0.5

line spacing.

For an embedded microstrip transmission line, the crosstalk equations are the same as those given for microstrip lines in Equation (1.23) except that e r is substituted for e'r given by the equation g"r -- g'r [1 +" e ( - 1.55h'/h)].

(1.24)

For the stripline environment, the forward crosstalk is zero (K L = Kc); however, the backward crosstalk is twice the equivalent microstrip crosstalk in which the impedances are the same and the capacitances are twice as large. Two other formulas of importance are the crosstalk for inductive and capacitive coupling (see Figure 1.8): Crosstalk =

RLCm

and

Crosstalk = Lm

tr

(1.25)

Rst r "

The terms C m and L m can be calculated analytically within uncertainty by using 2

m-0002,4 [, +

]

126,

and 2

0 7Linches, Cm =

ln[1 + 2

pF

1.2. Crosstalk in the Time Domain

13

(a)

l

[;>-

+

DRIVERS (b)

ZO

Rs Ivvx,

\

vs Lm

Rout ~-

?

/

Cm

70

I

L Figure 1.8

~RL

(a) Physical representation of two circuits in a crosstalk scenario, separated by a distance d. (b) Mutual capacitance and inductance in PCB microstrip lines.

where h is the height above ground plane, s is the separation between wires, and L is the length of wires in inches, er(ef0 is the effective dielectric constant and r is the wire radius. We can use equation 1.9 to convert flat conductions into round wires for usage of equations (1.25) and (1.26) or through measurements, which would give equations such as (Area of coupled noise impulse)R s Lm =

AV

(1.27)

14

1. Noise Interactions in High-Speed Digital Circuits

and (Area of coupled noise impulse) C m

-

RLAV

.

(1.28)

Some of these parameters can be observed in Figure 1.9.

1.3

Power Distribution

Power distribution is an important factor that is usually of great importance in the design of PCBs. In high-speed digital design the grounding of the PCB provides not only a DC return but also a radio-frequency return plane for all of the IC. There are a series of rules that should be considered: 1. There should be an even and low RF impedance in the DC power distribution. Minimize ground loops in the RF grounding system in order to minimize radiated emissions. 2. Decouple ICs in a PCB using bypass capacitors ranging from 0.1 to 10.0/zF. The capacitor leads should be as short as possible in order to minimize inductive effects. The bypass capacitors should be as close to the IC as possible. 3. Use planes rather than return traces for power and ground in PCBs. 4. Power and ground planes should be kept close to each other to reduce radiated emissions. The best layout to reduce radiated EMI is shown in Figure 1.10. The power distribution planes used in multilayer PCB do have some impedance. An example of a circuit model for a multilayer power distribution is shown in Figure 1.11. The power supply is shown by its source and ground impedances. The distribution impedances are also shown for the backplane with its inductances, resistance, and capacitance coupling between planes. From the AC impedance point of view, the power distribution is described in Figure 1.12. The first impedance Z t is the transient impedance, which is modeled between the Vcc and the decoupling capacitor (Cby). The second impedance in the figure is the bulk capacitance impedance (Zb), which changes the IC decoupling capacitance. The final AC impedance in power distribution planes is the one given by the plane bulk decoupling capacitance. To this impedance (Zt, Zb, Zbulk)

1.3. Power Distribution

15

Vo of driver

Voltage ......

Av

Vcrosstalk

: VIA ii

time (nSec)

.

.

.

.

.

~

m

pied Noise VCrosstalk

i

time (pSec) Figure 1.9

Crosstalk measurements.

we must also add the DC resistance of copper planes (ground and Vcc), given by 679 Zplan e (DC) = Tp (/z - ohms)square'

(1.29)

16

1. Noise Interactions in High-Speed Digital Circuits

Gnd 5V

~~~~~~~~~lfl~~~~b I[__----F____F----~__I~I__--IF____F----~__

Gnd _ _ l _ . 5V

Figure 1.10

I I

Rs "VVk,

PCB layout for reducing radiated EMI.

Rb 'VVk,

&

I I

Vs

Lb

I

I

I !

"VVk, Rg

I

Power Supply

I

RpCB

I Cb

Lby

Rby

I I

Backplane

LpCB

~

~c

I

I

z!o

I Rg(PCB) I

Lg(PCB)

PCB

Figure 1.11 DC power distribution in a PCB card.

Cbulk(PCB)

Vcc IC

Zt

Figure 1.12

I~

~ ' ,

'k/k/k,

It

Cby

Zb

Cbulk Zbulk(PCB)

Power distribution with the AC impedance effect.

/

1.4. Decoupling Capacitance Effects

17

where Tp is the thickness of the plane (0.025 mm/0.001 inch), as well as the impedance between parallel planes, given by Zplanes-- 377

h W + X/~e~'

(1.30)

where h is the spacing between planes, W is the conductor width, and t is the plane thickness. The plane inductance Lplan e is given by h W

Lplan e "- 0.383 "

(nil/inch),

(1.31)

and the plane capacitance Cplan e is given by S Cplane --" er /30 ~

pE

(1.32)

where s is the surface area in inch 2, h is the plane separation distance, and W is the plane width (inch).

1.4 Decoupling Capacitance Effects The ICs need to have sufficient current to operate, including high peak-current requirements during switching. The PCB power system must provide this current requirement without the need to lower the supply voltage. To alleviate this problem, capacitors placed near the devices are connected between the power and ground planes. These capacitors provide the charge current needed by the IC and not the power planes. When their current is discharged, these capacitors will recharge quickly from the energy provided by the bulk capacitors and PCB bulk capacitors. A typical use of bypass capacitors (Cby) is shown in Figure 1.13.

vcc

GND

Figure 1.13 Proper use of bypass capacitance in PCB.

18

1. Noise Interactions in High-Speed Digital Circuits

The capacitance Cm is the mutual capacitance between planes which are very close to each other. This capacitance is of very low impedance at high frequencies, allowing RF current to cross easily between planes. For lower frequencies, the bypass capacitance helps to short together the power and ground planes. At high frequencies, however, the bypass capacitor, associated planes, leads, and device models can have associated parasitics, as shown in Figure 1.14. Bypass or decoupling capacitors provide the current needed to the devices until the power supply can respond. In high-frequency switching, bypass capacitors of several capacitance ranges must be used. Bypass capacitors with short leads provide faster current because of the diminished lead inductance. Therefore, in high-speed design, it is highly recommended that leadless surface mount capacitors be used. The best performance is obtained when the capacitors are within the component package. As shown in Figure 1.14, the bypass capacitor's equivalent circuit is composed of Rsh, the insulation resistance (100 Mohm), which means it has a minimum effect in the operation of the bypass capacitor; R c, the series resistance; Cc, the bulk capacitance of the capacitor; and Lc, comprising both the lead and plate inductance. The plate inductance is usually small when compared to the lead inductance. The real impedance of the capacitor is given by Zby---- VRc2 Jr (X L --Xc) 2

Cby Model at High Frequencies

Lp

.rYy,~

_

_

Ground Leads Model at High

Capacitive Load Model at High Frequencies

I Vcc

:c, I _

.

~:Rg I,

(1.33)

+V Power Leads Model at High Frequencies

I/ I

=.-.

-

4.0

3.8

-

3.6

i

i

I

I

I I

I

I

I

i

i 5

i 10

1

2

Figure 1.20

I

150

MHz

Dielectric constant vs frequency of various PCB traces.

7.5

7.0

_

m

n

6.5 O

tl) 09 tcc.m

6.0

,r

5.5

5.0

i 2.8 3.0

I

I

I

I

3.2

3.4

3.6

3.8

4.0

!

I

I

I

4.2

4.4

4.6

4.8

Relative Dielectric Constant ~R

Figure 1.21

Signal velocity vs dielectric constant in a PCB.

I 5.0 5.2

30

1. Noise Interactions in High-Speed Digital Circuits

copper in a trace may result in voltage drops and heating that could degrade circuit performance. In Figure 1.22 we see the illustration of the trace resistance of copper as a function of trace width and thickness. Finally, Figure 1.23 shows the conductor heating as a function of width, thickness, and current flow. One of the most common methods to decrease the thermal resistance and increase the power dissipation is to use thermal vias. Thermal vias are largediameter holes punched into the substrate, aligned vertically. The resultant via pattern is like a solid metallic plug, and the vias are filled with a high-thermalconduction material. With the use of thermal vias, the heat that is generated from the IC is transported through the interface between the die and substrate to the thermal vias. The vias will then transfer the heat to other heat conductors such as heatsinks. The heat removal capabilities are dictated by the size and number

!

2.5~

2.0 o o t~

E tO v

o

tO t-

t~

o rr

I

I

I

I I

I

I

I

I

I

I

I

I

I

I

I

0 . 5 0 Z Copper

/

I

r~

i "-,%# I

i/

~

,

,

i

i

,

,

_

I

I'~

I

I

I

I

I

I

I

I

I

I

I

'

'

I-1.5 -

I

I

['~

-

I

I

I

1.0 _

,

,

,

''-L

I

I

I

I

I

I/ 20ZCopper~

F 0.5 k

I

jr

,'

"~

,

i

I

I ~

, I

t

t,'----z__. T--

, 4

6

8

10

12

14

16

Trace Width (mils) Figure 1.22

I

Trace resistance vs trace width and thickness.

18

20

1.6. Thermal Control in Equipment and PCB Design i

0.24 -~,

0.20 --

=o ~"

0.16

I

I

I

l

I

I

I

l/

I/

I

i 5oc.I 1o0~ I rise/I rije I/ ] I / I I /I

I 30001/ I/' I I rise/ / 4000[ I /I /I rise I

i

V

' lJ

/

~/i/I

-I I 0

0.08 g

0

-

0.0 4

'

I

I

/ ; I

I

i

i

I /'1

I

I

I

#,.

Jf

I

I

I

I

i

i

I

I

I

I

I

I

I

I

I

!

I

I

I

I

i

i

i

f

l

I

8

12

16

20

24

28

0.04 I

'

31

i

32

Current (Amps) Figure 1.23 Temperature rise vs copper for 2OZ copper.

of vias. Thermal vias should be located close to the hot spots of a PCB only because they occupy routing space and make the routing of PCB traces more difficult. A representation of thermal vias is shown in Figure 1.24. The total heat Q transferred by radiation is given by Q = keflA(T

where k

= = p = A = Th, Tc = ~3

the Boltzmann's constant emissivity the view of the shape factor radiating surface area hot and cold temperature in K.

4 -

T4),

(~.55)

32

1. Noise Interactions in High-Speed Digital Circuits Die i

f

~

'"'"~,

i ()

()

I-!

!-I

ic

()

i ()~

!-1

I 1 ~\

Solder Substrate

Thermal Vias

Figure 1.24 Thermal vias illustration.

1.7

Lossy Transmission Lines and Propagation Delays

As we go into more dense packaging and more packed ICs, many of the internal interconnections have significant resistance and therefore must be considered as lossy transmission lines. We now outline some of the basic parameters of lossy transmission lines and develop formulas for signal delays. For the microstrip given in Figure 1.25, the DC resistances are given by Equation (1.56), which is the low-frequency loss factor:

OZR

P 2 Wt Z o,

--

(1.56)

W

~

' .

_

~

,I

h

-f

/

It

, -

-

_

-

:

Sr

Figure 1.25 Parameters of a microstrip configuration.

1.7. Lossy Transmission Lines and Propagation Delays

33

where W and h are the conductor width and thickness, p is the material resistivity, and Zo is the conductor characteristic impedance. At higher frequencies another factor plays a role in transmission lines: the skin effect, in which the current at higher frequencies is concentrated on the surface area of the conductor. The skin depth is given by /

6= ~ p 7r/~f'

(1.57)

where f is the frequency and/z and p are the permeability and resistivity coefficients of the material. When conductor thickness is about 2~ or more, increasing the conductor thickness does not reduce the effective resistance of the interconnec-

tion. The dielectric attenuation constant is defined as 7rV~er f tan ~d ffd=

C0

(1.58) '

where tan 6d is defined as the loss tangent given by the expression tan 8d = ~

(1.59)

0)8 r

where o"a is the conductivity of the dielectric material and o) is the angular frequency (w - 2 ~ f ) . Choosing the dielectric constant correctly minimizes the dielectric losses. As for the propagation and interconnect delay, consider the model in Figure 1.26.

I

I

I

I

I I

I

Zout

I

Linl f,y.yy~

I

Z.ps

Lgs

Lin2

Cgs/2

Cin2/2 Cin2/2

I

Cou t

qnll2

I

l T T :l I

Cps/2

Cinl/2

I

I

DRIVER

I

Packaging Interconnect

:T T i

I PCBMicrostrip

I Packaging

I Transmission Line

I Interconnect

I

I RECEIVER

Figure 1.26 Electrical modeling of a driver/receiver with transmission line.

34

1. Noise Interactions in High-Speed Digital Circuits

A first approximation to the propagation delay is given by td = 0.7[Zout(Cin 1 + Cout + Cus + C L + Cin2) l § ~ZusCus § Zus(Cin 2 + CL) ],

(1.60)

where Zout and Zus are the equivalent resistance of the driver and the characteristic impedance of the microstrip line, respectively (both in ohms). The term Cus is the total line capacitance. Cin 2 and Cin 1 are the equivalent total packaging interconnect capacitances. C L is the load capacitance of the receiver IC. The effect of the line inductances (i.e., Linl, Lin2, and Lus) is to increase the time delay by 10-30%, as the terms Zout and Zus in Equation (1.60) are substituted by the terms (Zout + 2Lin) and (Zus + Lus), respectively. The capacitance terms in the preceding equation are given by W/b

Cus = 2ere~ 1 - t / h '

(1.61)

where t is the thickness of the microstrip line, b is the thickness of the dielectric material (2h), and W is the width of the microstrip. For a stripline as shown in Figure 1.27, the foregoing expression becomes W/b

Cus = 2ere~ 1 - t / b " Often, fringing capacitance must also be considered, as shown in Figure 1.27. The fringing capacitance for the stripline is given by Cf ~

1 - t/b

In 1 +

1 - t/b

-

~

-

1 - t/b

1 In

(1 - t / b ) 2

- 1

II h

/of

cfHO

Figure 1.27 Parameters in a stripline configuration.

.(1.62)

1.8. VLSI Failures and Electromigration

35

The characteristic impedance of a stripline is given by 1207re Zus(Stripline) = X/~erCt'

(1.63)

where Ct 4= 2Cus + 4Cf. For the microstrip line, the characteristic impedance is given by the following expressions. For Well/h -< 1" Zus = eX/~reff60ln[8h , Weff

Weft] 4h J'

+

where

+0.04[1 T - 1, 2 '{[1+ 12 ] 2,[h,1 + In 1 Weff = W + 1. for--W>-

1/2

/3r'eff --

h

Weff= W + 125ht[1 + l n ( 4 t W ) ] 9

27r

(1.64)

forW< 1 h 27r"

For Weff/h > 1" 120~" / ~//er,eff ZUS -'--

Weff+h 1.393+ 0.667 ln[~-~eff + 1.444] -

8r, eff :

8r+ 1 + 2

8 r --

2

1/2

(1.65)

1[1 + 12 ~eff ]

The delay of the transmission line tL in Figure 1.26 depends on the characteristic impedance of the line and is given by tL = 85X/0-475er + 0.67

(psec/inch),

(1.66)

and for a buried microstrip the delay of the transmission line is given by tL = 85X/~er

1.8

(psec/inch).

(1.67)

VLSI Failures and Electromigration

The issue of electromigration refers to the mass transport in metals under highcurrent and high-temperature conditions. It is a key problem in VLSI circuits

36

1. Noise Interactions in High-Speed Digital Circuits

because it can cause open circuits and short-circuit failures in the VLSI interconnections. This is even more important with today's technologies, where VLSI circuits are fabricated on small chip areas to save space and reduce propagation delays. In FET devices, as the device decreases in size, the propagation delay decreases and the power dissipation remains constant, but the current density increases. In bipolar devices, similar behavior is observed. The problems caused by electromigration can be divided into two categories: topology-related problems and material-related problems. 1.8.1

TOPOLOGY-RELATED PROBLEMS

These problems result when the interconnection dimensions decrease to the micron range. Interconnection lines can then fail at different unrelated sites. Furthermore, as the device contact size decreases, the contacts become comparable to interconnection lines and are subject to the same current density as the conductor lines. 1.8.2

MATERIAL-RELATED PROBLEMS

These problems are basically caused by high current densities. Three problems are associated with electromigration from the materials point of view. The first is Joule heating. As the current inside the IC increases, the heat distribution becomes a serious concern. The temperature rise caused by very thin metal wires generates a great deal of heat that must then be removed through the substrate. The cooling rate provided by heat sinks and thermal vias must be greater than the heating rate due to the current density. Any imperfection within the substrate may diminish the efficiency of the heat dissipation process and speed up a thermal runaway process that could destroy the line. The second materials-related problem is current crowding. Because of structural inhomogeneities, there is an uneven distribution of current along metallization conductors. This also causes the atoms in certain metallization lines to migrate at different speeds, resulting in the formation of voids that will eventually fail to open. Finally, there is reaction of materials. Because of mass accumulation and storage and depletion, the mass transport generated is enough to cause stresses and lead to extrusion in the passive layers. This can also change the electrical properties of junction contacts. 1.8.3

ELECTROMIGRATION M E C H A N I S M S

Metallization is the process by which semiconductor substrates are joined together through a metal line. The ions in the metal are held together by the metal line.

1.8. VLSI Failures and Electromigration

37

The binding force of these metal ions is stronger than any possible opposing electrostatic force. As the temperature increases, some of the ions escape from the potential well that binds them in the metal lattice. When these ions reach the potential well, they become energized and move around. These ions, for example, can move to vacancies within the metallization line in a process called selfdiffusion. In the absence of an electric field, the self-diffusion process is random. Therefore, a random rearrangement of atoms occurs with no net gain in mass transport. When a current is applied, there are two external forces applied in the metallization: the frictional force and the electrostatic force. The frictional force is due to the momentum changes within the metallization structure; it is proportional to the current density. The electrostatic force is caused by interactions between the electric fields created by the electrons and the positively charged metallic ions. The electric field caused by the electrons will attract the positively charged metallic ions against the electron flow. In Figure 1.28 the frictional force and electrostatic force are given by Ff and F e, respectively. The frictional flow acts in the direction of current flow J. The electrostatic force acts against the current flow and in the same direction as the electric field. Because F t- > > F e, the net force will always be in the direction of current flow. The induced flux created by the net frictional force is given by

0 = ~ fkT ) (Zeffe)eXp

'

where

(1.68) Zef

=

Z(\2pndm p ,,m 1)

and Z = electron-to-atom ratio Pd = defect resistivity

J E

Fe

,._

Ff

Figure 1.28 Illustration of electromigration.

38

1. Noise Interactions in High-Speed Digital Circuits

p

= resistivity of metal

nd n m E

= = = =

T K D

= absolute temperature = Boltzmann's constant = self-diffusion coefficient

f

= correction factor on the lattice structure.

density of defects density of metal free electron mass activation energy

Because of ~pf the original random process changes to a well-directed process in which metallic ions move opposite to the electron flow of the current, whereas the vacancies move in the opposite direction. The metallic ions condense to form whiskers, and the vacancies condense to form voids. This process results in a change in the density of the metal ions with respect to time. The density change is given by

dn d--7 = - V(V 9 ~p),

(1.69)

where V is the volume and

dO

dO

V " O = gx

dO dz 9

This formation of voids causes the metallization lines to foil. As the current is diverted to other lines, current density and heating increase, causing the local temperature at certain locations within the IC to increase and therefore more lines to fail. Finally, as whiskers form, mass-related stresses could occur that can cause additional lines to fail. These failure scenarios and processes will continue until the circuits fail. The mean time between failures is given by

A,

ex

(1.70)

where J is the current density, A is a constant depending on geometry, k is Boltzmann's constant, n is a constant ranging from 1 to 7, and T is the temperature in kelvins. Two factors are responsible for inducing electromigration. The first is current density. As current density increases, momentum exchange between the electron carriers and metallic ions causes large frictional forces and flux to occur along

1.8. VLSI Failures and Electromigration Table 1.3

MTBF (hours) at a Temperature of 160~

Density (mA/cm z)

Current

0.1 0.2 0.4 0.6 0.8 1.0 2.0 4.0 6.0 8.0

39

and 10 -7 cm z Cross-section

Small Crystalline

Large Crystalline

15,500 4,000 960 450 250 155 40 10 ~

120,000 30,000 7,800 3,300 1,900 1,250 300 75 33 18

Glassed Large Crystallite

65,000 29,000 15,000 11,000 2,700 700 370

the metallization lines, which could eventually make the lines to fail. As can be observed in Table 1.3, the MTBF decreases as the current density increases. The second factor is thermal effects. Electromigration develops from a high temperature to a low temperature. The thermal gradients can induce thermal forces that can cause mass transport in metallization lines. According to Table 1.4, the MTBF increases with line temperature.

Dependence of the MTBF on Temperature for Three Kinds of AL Film Conductor Having Cross-sectional Area of 10-7 c m 2 and Current Density of 1 mA/cm 2 Table 1.4

MTBF (hours) Current Density (mA/cmZ)

Small Crystalline

Large Crystalline

40 80 120 160 20O 220 240 260

23,000 3,000 580 155 52 32 21 14

m m 12,500 1,250 180 80 37 18

Glassed Large Crystallite m n 11,000 800 255 90 34

40

1. Noise Interactions in High-Speed Digital Circuits

1.9

Interference Concerns with Connectors

A major source of radiated EMI is connectors, or rather, connector pins. Current flow tends to couple among connector pins and between connector pins and the ground plane, and return paths are such that large ground loops are created, causing even more radiated EMI, but also more noise coupling among pins within a connector. The most important factors affecting the performance of connector pins are (1) mutual inductance between connector pins, (2) mutual inductance between connector pins and groun d , (3) series inductance of pins, and (4) parasitic capacitance between connector pins or between pins and ground. Let us consider the connector in Figure 1.29. Notice that currents I 1, I 2, and I, (from drivers 1, 2, and n) return through the ground connector pin, creating current loops of different sizes and loop areas. First, because of current flow between conductors, there is a mutual coupling between each of the conductors' drivers and the return conductor. This mutual coupling results from the mutual inductance of current loops. Let us consider the mutual interaction between loop 1 and loop 2. The contribution to the total magnetic flux in loop 2 comes from the current flowing out of driver 1 and

CARD1

CONNECTOR d

I

I'

Driver 1 - - - ~

,vv~,__l~~ I1 Driver2 _ _12___~ 4

~1

P~

__

I

CARD2

I

~V~, - LTI Loop 1 t_ - - - ~ ' - I ~ - - -I I

~ - "

L

"~176

V

I ~7

Driv~er

I I

Loop 3 .

13

~

--===m

_--.~ I

I

i

Figure 1.29 Typical connector with driver and receiver loads.

I

1.9. Interference Concerns with Connectors

41

flowing through loop 1, and from the returning current flowing through the ground pin. The mutual inductance formula has two terms: (1.71) Here, c is the distance between driver 1 and the ground pin; a is the distance between driver 1 and driver 2; b is the distance between driver 2 and the ground pin; r is the radius of the ground pin; and d is the separation between cards. Also, the total magnetic flux in loop 3 gives rise to mutual inductance by L123 = 5 . 0 8 d ( C ) + 5 . 0 8 h l n ( f ) + 5 . 0 8 h l n ( r - ~ 4 ) + 5 . 0 8 h l n ( j ) ,

(1.72)

where b is the distance between driver 2 and the ground pin, f is the distance between driver 2 and driver 3, g is the distance between driver 3 and the ground pin, and j is the distance between driver 1 and driver 3. Because we are assuming that the source impedance Zo is always present in a driver circuit (electrical length of wire is sufficiently large), the noise coupled due to crosstalk splits half in either direction, and therefore the crosstalk is given by 1

dI

EMI crosstalk = ~L12 dt 1

dI

(1.73)

EMI crosstalk = ~L12 3 dt" From this crosstalk equation, several factors can be deduced that could result in a dimensional crosstalk. First, slowing the rise time of the drivers would result in a diminished dl/dt. The driving rise time can be reduced by using a capacitor on the source side of the connector as shown in Figure 1.30. Notice that in the figure we are assuming that the receivers can be modeled as capacitive loads; such loads of capacitive nature could make surge currents appear as switching occurs. Another way to diminish crosstalk behavior is to decrease the mutual inductance. For example, rearranging the layout of pins in Figure 1.31 could diminish the mutual inductance. If the ground pin and corresponding wire are moved away from driver 1 and driver 2, increasing the distances b and c, the mutual inductance L12 will increase. Therefore, decreasing the distance between the driver pins and the ground pin will likewise diminish the mutual inductance.

42

1. Noise Interactions in High-Speed Digital Circuits

CONNECTOR CARD1

~1

~..

I

d

~1

,,--

CARD2

I

IV-

Driver 1

-LC L

Driver 2 CL

Driver

CL

Figure 1.30 Employing capacitances to reduce rise time.

CARD1

Driver 1

CARD2

i

~V,,T---a_

~_~_ I --"

Driver 2

c L

+~ ~lg/4 Ig/4 \

12

I

~-41~ - - - - I ---L I C L 1o/4 ~ "

-- ~ -

"i- ~-

9VVi ~ " ~

I

Ig/~l Driver 3

\ -.,-.i

_.__..~

_

,~7 CL

_l

I

~

---,.., Ig/4 CONNECTOR

Figure 1.31 Adding/rearranging ground pins to reduce interference.

1.10. Ground Loops and Radiated Interference

43

Finally, adding more ground pins/wires would also decrease the overall inductance. The ground pin/wire is responsible for coupling drivers 1, 2, and 3 and their respective wires. Therefore, providing more ground wiring will force the ground current to distribute itself among the different wiring as shown in Figure 1.31. Notice that in Figure 1.31 there are four ground pin returns and three driver signals, such that every driver signal is "flanked" on either side by grounded pin returns. If we consider driver 2, for example, the total ground return current of 12 can be split in four different ways. Ideally, the figure shows each return pin carrying equal (88 Ig) current, but in reality the closest pins would carry the greatest return current. Nevertheless, the point is made that the mutual inductance between drivers will decrease, therefore considerably reducing the crosstalk among pin connectors. Furthermore, since the loop area transversed by the ground currents is much smaller, the effects of radiated EMI will also decrease considerably. Imposing even more ground returns between driver signals should decrease the crosstalk by a factor of 1(1 + n2), where n is the number of ground pins between driver signals, as shown in Figure 1.32.

1.10

Ground Loops and Radiated Interference

It was previously stated that ground loops can contribute significantly to the radiated EMI. This is important because such radiated noise can couple into other CONNECTOR

CAR01

l

I

CAR02

Driver 1

-LC L

Zo

2

9. m

I

J

n-1 ~7 Driver

n~

~7

Figure 1.32 Employing multiple ground returns to reduce interference.

44

1. Noise Interactions in High-Speed Digital Circuits

sensitive circuits of analog or digital nature. Let us consider, for example, the scenario depicted in Figure 1.33. In this figure, two connectors (connector 1 and connector 2) are used to implement two driver/receiver card configurations. In connector 1, the return current from driver 1 has the option of returning through its closest ground pin; some of it, especially at high frequencies, could return through a much more distant grounded pin closest to driver n. The loop area 1(0) (driver 1 and ground pin 0) formed by the return current of driver 1 through its closest ground pin is much smaller than the loop area 1(n) (driver 1 and ground pin n) caused by some of the return current using pin n of connector 1 as its return. Other scenarios for

CARD1

CONNECTOR

I

CARD2

I

""me

Ig1

Loop~ea 1101

Driver 1

_

//~ /

. . . .

Loop A r e a l ( n )

/

d

d3

~

r

Ig2

dl

. d4

Driver n

/ 'vvvT---J-c L

"'-': *

/--"

*" ,~- Cc4

CARD 3

Cc2-~

C0nnector 2

_

7- Ccl ~

CARD 4

Zo

I Ig4

//

/.

,~

CL

I

Loop Area , - ' 9 1 - --- -

Figure 1.33 Illustration of ground loops among card connectors.

1.10. Ground Loops and Radiated Interference

45

the return current to use other ground pins within connector 1 are also possible. Because loop area 1(n) > > loop area 1 (0), the radiated emission from connector 1 could increase greatly, especially at high frequencies, where a significant portion of the return current could choose pin n as a return path. The electric field magnitude from a loop current is directly proportional not only to the current itself, but also to the loop area traversed by that current. In the figure we also observe another scenario very common at high frequencies: capacitive coupling between the ground pin n in connector 1 and the connector metal casing (Cc3, Cc4). Further coupling would capacitively couple both connectors 1 and 2. Some of the ground current from connector 1 would flow into connector 2 and its grounding pins through capacitive coupling. The total loop area now becomes the sum of loop areas, loop area 1(n) + loop area 2(n), with the potential of creating an even bigger radiated emissions problem. The amount of radiated emissions created by loop areas of signal/return currents is given by E(V / m) = 263 • 10-16 F2(Hz)A(m2)I(amp s) R(m)

(1.74)

where F(Hz) is the frequency of interest, A(m 2) is the loop area formed by the driver signal and return curent, I(amps) is the current magnitude, and R(m) is the distance in meters at which the electric field is to be computed. Assuming, for example, the scenario of Figure 1.33, the total radiated electric field could be approximately calculated for a worst-case scenario as I E total (V/m)] = I Elr

+ ]El(n) I -']- ] E2(n)1,

(1.75)

where El(o~, EI(,O, and E2o0 are the electric fields produced by ground loop areas through pin 0, pin n of connector 1, and pin n of connector 2: El(o)(V/m) ~ 263 • 10 -16fe(Hz)(l~176area 1(0))Igl(amps) R(m)

(1.76)

l(n))Ig2(amps) El(n)(V/m ) ~-- 263 • 10 -16fe(Hz)(10~ area R(m)

(1.77)

Ez(n)(V/m ) ~-- 263 • 10 -16fz(Hz)(10~ area 2(n))Ig4(amps) R(m)

.

(1.78)

In calculating Igl, lg2, Ig3, and/84, we know that

I1 : Igl Jr- Ig2-- Igl "1- /g3 -']- Ig4,

(1.79)

46

1. Noise Interactions in High-Speed Digital Circuits

and the maximum I 1 can be calculated approximately by using the expression 5V I 1 - Zo(ohms).

(1.80)

The current in Igl is given by

Igl

= ( 5.0V )Lgl(O ) \Zo~-O--~ms) Lgl(n )'

(1.81)

where Lgl(O) and Lgl(n) are the inductance of the ground loop through pin (0) in connector 1 (loop area 1(0)) and Lglr is the inductance of the ground loop through pin n in connector 1 (loop area l(n)), respectively. Also, in the same manner, =

=(

+

5.0v

r

The terms Lgl~,0 and Lg00o are obtained from the pin inductance given by

where d is the separation in inch of signal to ground. The term d will be either dl or d2 as indicated in Figure 1.33 for Lgo(n) and Lgl(n) calculations, respectively. L is the length of the pin in inches and r is the pin radius. In the same manner, once we have calculated Ig2 we can calculate Ig3 and Ig4 as follows: [Lg3] =

1.84)

Ig4-- Ig2 L~g3j, where Lg3, Lg4 can be calculated from Equation (1.84) using d3, d4 illustrated in Figure 1.33. One of the most trivial conclusions of the preceding analysis is that adding more ground pins to the connector will bring the grounds closer to each signal and will lower the inductance of the overall return path. Other things that can be done are to move the I/O connectors as close to each other as possible, never to route ground returns from the same source on separate connectors, and to provide slower rise time for drivers. The issue of parasitic capacitance not only affects the return path of ground current, but its cumulative effects from many connectors can distort transmitted

1.11. Solving Interference Problems in Connectors

47

signals. Therefore, conductors with minimum parasitic capacitance are highly desirable. Parasitic capacitance effects on connectors are shown in Figure 1.34. As the signal is transmitted, the lump parasitic capacitance of the ground at each bus tap will provide some parasitic distortion. This lump capacitance, represented in Figure 1.34, can come as a result of (1) pin-to-pin capacitance from the connector on the printed circuit board, (2) trace capacitance from the connector to the local drivers and receivers, or (3) input capacitance of the local receiver plus the output capacitance of the drivers. The trace capacitance is given by C(pF/inch)

= t__d_0 Z0,

(1.85)

where to is the trace propagation in psec/inch and Z0 is the trace impedance in ohms. One example of proper layout of signal and ground pins in a connector is shown in Figure 1.35.

1.11

Solving Interference Problems in Connectors

There are basically three ways in which a signal line can be made much less noisy, especially for connectors near a chassis, from which the lines would leave. 1.11.1

FILTERING

Filtering removes the high-frequency content of signals. By removing the high frequencies, we can decrease dramatically the capacitive coupling among connectors. Furthermore, at lower frequencies the current will tend to follow closer return paths, using the closest connector pins rather than pins that are farther away. Therefore, the radiation efficiency of current loops increases greatly at higher frequencies. Most typical filters involved small impedances in series with each driver. The series impedance would then feed into a shunt capacitance to ground, which must be a quiet ground that connects directly to the chassis. 1.11.2

SHIELDING

An example of shielding the connector lines is shown in Figure 1.36. In a shield a continual metal surface is provided around the inner conductors. The returning signal currents distribute evenly around the outgoing signal wires. The current loop between signal and ground paths is very small, and a perfectly conducting and symmetric shield will not radiate.

48

1. Noise Interactions in High-Speed Digital Circuits

CARD 1

Connector

-LCL Zo

C

Cp Connector

CARD 2

Cp

Transmission Bus Cp= parasitic capacitance between connector and bus tap.

3_

I CARD 3

"1:

Connector

3_

Zo Cp -LC L

$ Figure 1.34

Parasitic capacitance effects on connectors.

1.11. Solving Interference Problems in Connectors

49

Ground Plane

Signal Lines Figure 1.35 Proper layout of signal and ground pins (dark) in a connector.

Connector CARD Shielded Cable Zo

zo

Zo

Figure 1.36 Example of shielding a connector line.

When using a shield, make sure that the pigtail connection is as small as possible, since pigtails, also known as drain wires, work poorly at high frequencies. Furthermore, noisy wires should be used on separate shields; otherwise they would be sharing the same common return path of the shield. Best of all is to use specially designed connectors that are metal in their outer structure and incorporate grounding schemes that are internal to the connector.

50

1. Noise Interactions in High-Speed Digital Circuits Connector

Connector

CARD 1 Driver

Zo

CARD 2 ferrite beads I1

,1 cc

CL ..1_

,lcc 'T

A I

1

Figure 1.37 Common-mode and differential-mode currents flow among cards.

1.11.3

C O M M O N M O D E CHOKE

This is a series of ferrite beads that are used mostly on I/O cabling to eliminate, as much as possible, the common-mode current, which is the component of current most responsible for conducted and radiated emissions. This current should be distinguished from different-mode current, which is the return current of driver circuits. This distinction is shown in Figure 1.37. 11 and 12 are differential-mode currents and are therefore of equal magnitude. I c is a common-mode current which follows a different return path. In the figure, the abnormal return path is facilitated by the parasitic capacitance Cc between conducting wires. The use of ferrite beads with their high inductance will reduce the magnitude of I c, especially at high frequencies. Ferrite beads' effectiveness in reducing common-mode current is frequency dependent. Therefore, care must be exercised in choosing the correct bead material to eliminate the right frequencies, which are embedded in I c.

1.12

The Issue of Vias

The vias in a PCB layout have both parasitic capacitance and parasitic inductance, shown in Figure 1.38. These capacitances and inductances are usually small, but their cumulative effects can add significantly in an adverse manner. The value of such parasitic capacitance and inductance can be estimated to be [1 ] 1.41srtd 1

Cpv= d z - d ,

1]

(1.86)

References

51

pad

Z.

Lpv

VIA

v, Cpv = parasitic via /

~

inductance and capacitance

Figure 1.38 Parasitic effects in vias.

where D h Lpv t d2 d1 Cpv

= = = = = =

diameter of via, inches length of via, inches parasitic inductance of via, inches thickness of PCB diameter of clearance hole in ground plane, inches diameter of pad surrounding via, inches parasitic capacitance of via, inches.

Reference 1. Howard W. Johnson and Martin Graham, High Speed Digital Design, Prentice Hall 1993.

Chapter 2

2.0

Noise and Interference Issues in Analog Circuits

Basic Noise Calculation in Op-Amps

The noise in operational amplifiers (op-amps) is related to the passive and active components within the circuit. It is also the kind of noise that could induce errors that could not be detected by DC error analysis. Noise can be random and repetitive, either of voltage or current form, and can be at any frequency. Noise can be qualitatively classified as either white noise or color noise. Examples of white noise are Johnson (or thermal) noise and shot noise, which can exist up to a frequency of 100 GHz. Color noise has an amplitude that changes over frequency, such as flicker noise 1/f or popcorn noise. An example of a noise density spectrum is shown in Figure 2.1.

100

N

"1-

10

tr o~,~

>

01

10

I 100

I lk

I

I

I

10k

100k

1M

I 10M

Frequency (MHz) Figure 2.1 Example of noise density spectrum. 52

I 100M

2.0. Basic Noise Calculation in Op-Amps

53

The noise spectral density is the rms value of the noise voltage Vn or a noise current I n which is expressed as a voltage or current per X/-H~z. The power spectral density is defined as the derivative of noise power over frequency range" P(Watts/Hz) - dPn

(2.1)

df The power spectral density for the voltage and current are defined as Vn(rms)

(volts/X/-H-zz) (2.2)

l~(rms) In=x@

2.0.1

(amps/X/-~z).

THERMAL NOISE

Thermal noise in all electronic devices results from the random motion of free electrons in a conductor as a result of thermal agitation. Therefore, the thermal noise power is directly proportional to temperature and frequency,

Pn = KTB(Hz)

(J/sec),

(2.3)

where K = 1.38 • 10 -23 J/K is Boltzmann's constant, T is the absolute temperature (K), and B(Hz) is the bandwidth of the system. In conductors and semiconductors the thermal noise is always present. For example, an ohmic resistor can experience a thermal noise voltage given by Vn(rms ) = X/4KTRB(Hz),

(2.4)

or in terms of spectral noise density, Vn

-- 4KTR

x/-fiSz

(2.5)

(nV/X/~z).

R

"O

Vn(~ Vn=(4KTRB(Hz)) 1/2 0

Figure 2.2

m m

In = (4KTB(Hz)) 1/2 / R

0

Thermal noise representation of a resistor.

54

2. Noise and Interference Issues in Analog Circuits

Noise figures in op-amps not only reflect the noise contributions of the IC itself, but also describe the IC with its feedback network, source, and load resistance. With the use of noise figures, a gain block can be completely characterized and total system noise calculations can be obtained by summing all the noise figures of each stage. The noise figure for an op-amp is the logarithm of the ratio of the signal-tonoise ratio of the input of the amplifier to the signal-to-noise ratio at the output: Noise figure =

(S/N)in 10 log (S/N)ou t"

NF =

(2.6)

To calculate the noise figure for an op-amp gain stage, the equation is

NF=

(InRs)2) 4KTRs

10log (1 + V 2 +

(2.7)

It can be shown that the noise figure includes the voltage and current noise from the amplifier. The noise current I n flows through the source impedance R s. An important factor is the bandwidth. In order to calculate the total noise, the total output noise spectral density, which is given in nV/X/-H~z, is multiplied by the square root of the bandwidth. The calculation of op-amp noise in a sizenoninverting configuration is shown in Figure 2.3. In order to obtain the total output noise, each term is multiplied by its gain and taken to the output as a voltage. Finally, all the terms are squared and added together, taking the square root of the sum of the squares. The individual terms are

Rs___)__)X/4KTRs(1 +R_~gg)

'nl 'nl s(1 (1 In2 -')"-) In2Rf Rf Rg --->--->X/4KTRg R--gg Rf ---)---)X/4KTRf

Vout= [(4KTRs + (ln2Rs)2+ V2) (1 +-~gg)2 +

.f)] + 4KTRI ( 1 +-~g

(2.9)

(In~ Rf) 2 (2.10)

.

2.1. Op-Amp Fundamental Specifications

55

Vn

vol

as Rf

(~(4KTR s ) 1/2 In2 I

C+)----

Rg

(4KTRf)1/2 2

Figure 2.3 Intrinsic op-amp noise for an inverting amplifier.

2.1

O p - A m p Fundamental Specifications

A block diagram of a basic op-amp is shown in Figure 2.4. The input stage is basically a differential input. Op-amps with a differential input as well as a differential output have very good common mode rejection ratios. The op-amp contains a high-gain stage with a single-pole frequency response. The output is a single-ended output stage. A(s) in the figure, known as the open-loop voltage gain, is the gain with respect to the differential input voltage V = (V+ - V_). A(s) is a dimensionless quantity and is expressed in decibels in some cases, but usually as a plain number (100,000 is typical). Because of their tremendous gain, op-amps are not useful in the open-loop mode, since a small input voltage can quickly make an op-amp saturate, producing an output gout = gcc" The most useful configuration, of course, is the closed-loop configuration, when a negative feedback from Vout is fed back to the inverting input ( - ) using a feedback network as shown in Figure 2.5.

56

2. Noise and Interference Issues in Analog Circuits

v+ O

High Gain Single-Pole Frequency Response

Differential Input v- O~__.__

Vout Output Stage

-- >

1

_~,2" 4Ls( "n'jc)

(2.39)

It has been shown [2] that a general design equation for Cb is given by the expression 50 Cb = 7rfc.

(2.40)

It was previously stated that the bypass capacitor itself introduces a second resonance. The inherent parasitic inductance and resistance of capacitors can also disturb the bypass capabilities. The inductance will introduce a new resonance, and the resistance will limit the line impedance reduction. At this new resonance frequency the bypass impedance would drop to zero, except that, as before, we also have a parasitic resistance that prevents this from happening. Above the resonant frequency the capacitor's parasitic inductance overrides the capacitance. Large capacitors tend to introduce a new resonant condition that comprises the bypass effectiveness at frequencies typically within the amplifier's response range. This new resonance results from the parasitic inductance Lb. All capacitors possess this internal inductance, which depends on the capacitor's intemal conductive paths and leads. Reducing the total connecting length can diminish the parasitic inductance. This can be accomplished by minimizing the capacitor lead length, circuit board traces, and intemal path components.

2.9. Bypass Capacitors and Resonances

79

A detailed examination of the bypass capacitor's actual impedance is shown in Figure 2.30. The capacitor parasitic inductance appears in series with the intended capacitance along with a parasitic resistance. The inductance Lb is selfresonance with Cb. The parasitic resistance R b sets the capacitor impedance at resonance. This resistance comes from the same connecting path that produces the capacitor's inductance. The parasitic resistance R b causes a voltage drop that limits the impedance decline caused by the Cb-L b resonance. This parasitic impedance detunes the Cb--Lb resonance, decreasing what could have been a large phase transition in the power-supply line impedance. The transition presents a broad range of phase conditions that could degrade stability. The resistance benefits the performance of the bypass capacitor as long as it delivers the resonance. The resonance frequency at which the Lb and Cb impedance becomes equal is given by -

fRb

-

-

1

2 rrX/Lb Cbc

(2.41 )

Vc = Is / s Cbc VL =-I s / s Cbc Zo~1,~,,,,--,~-~~=~.~_

Zo

Rb > (Lb/Cbc )1/2 -'~

Capacitive Zb = 1/s Cbc

Inductive Zb = s L b

is

Lb

Cb

Rb

Cbc

I" ~

Resistive

I

Zb = Rb

fR

fc

Figure 2.30 Analysis of bypass capacitor second resonance.

80

2. Noise and Interference Issues in Analog Circuits

The minimum resistance required for detuning L b and Cb is given by

Rb =

~/~

(2.42)

Cbc"

The design limit for R b is given by

~/~bc

(2.43)

~ R b ~ 1"

We can now summarize the results of Figures 2.29 and 2.30 and develop a single plot of a single bypass capacitor behavior, which is shown in Figure 2.31. In this case a single capacitor can bypass the parasitic inductance L s of the power supply. In order for this to be effective, the capacitor must be placed very close to the operational amplifier supply lines. The supply inductance dominates the line impedance Zo at lower frequency, which increases proportionally with the line inductance (Zo ~- sLs). At somewhat higher frequencies the bypass capacitance reverses the slope of this response temporarily. First, the impedance

PSRR

f RS = 1 /2~: (L s Cb) 1/2

Zo 1/2~ (L b Cbc ) 1/2

.

I

s Lb

v

f RS

fRb

fc

Figure 2.31 Composite resonance study of single bypass capacitor behavior.

2.10. Use of Two or More Bypass Capacitors

81

response goes from Z o = s L S to Z o = 1 / s C b, with capacitive shunting diminishing the effect of the L S inductance. As the frequency increases even further, Z 0 starts rising again as the capacitor's own parasitic inductance overrides the capacitive shunting, and the impedance becomes Z o = s L b, where Lb is the bypass capacitor's parasitic inductance. The resonances fRs and fRb indicate the transition points separating the three Z o regions. It is important to carefully select the kind of bypass capacitor to be used. The bypass capacitor must bypass the Z o impedance over the entire amplifier response range. If we pick a capacitor that is quite large for the purpose of reducing the net line impedance, fR~ will move to the left in the lower frequency range, but the capacitance's own parasitic inductance L b will increase, causing thefR b frequency to be moved further to the right. A compromise can be reached by letting [2] 50 Cb = ~'fc"

2.10

(2.44)

Use of Two or More Bypass Capacitors

More op-amps these days use a wider frequency range. Greater amplifier bandwidths cover more of the high frequency. Because of the higher frequency requirements of these op-amps, a second bypass capacitor may be needed to counter the inductance of the primary bypass capacitor. When we add a smaller capacitor in parallel with the first bypass capacitor, the inductance limit of the first capacitor is bypassed. However, the second capacitor also has an inductance of its own, producing another bypass scenario at a higher frequency. Furthermore, the inductance of the first capacitor provides a resonance when combined with that of the second capacitor. Adding a secondary bypass capacitor in parallel with the first capacitor provides a low bypass impedance for the full response range of a high-frequency amplifier. The first capacitor Cbl >> Cb2 (second capacitor). The lower capacitance of Cb2 and its lower parasitic inductance produce a higher resonance frequency. Therefore, when we add a second bypass capacitor we restore the declining frequency of the bypass impedance, but there are also some minor complications with the introduction of two additional resonances: one from the self-resonance of the secondary capacitor, and the other from the interaction between the secondary capacitor and the inductance of the first capacitor. In Figure 2.32 we see an illustration of the new resonance with a circuit model and the corresponding impedance responses. There are basically two comers in

82

2. Noise and Interference Issues in Analog Circuits

zo I

,

" ~

Capacitive

1

./ ~ I

Inductive

zo_s.sA fRS

fRbl

Lb2

f fib

fc

fRb2

Figure 2.32 New and combined resonance for bypass capacitor in an op-amp.

the figure, representing the capacitor impedances Zbl and Zb2. At lower frequencies a declining Zbl (i.e., from Cbl ) provides the lower impedance bypass shunt. At a higher frequency Zbl starts resonating and begins to rise at fRbl. As the frequency increases even further, Zb2 (i.e., from Cb2) bypasses the rise and restores the declining bypass impedance. The self-resonance of Cb2 at fRb2 produces a rise, but at a lower impedance than provided by ZCb1. In Figure 2.32, the Cbl/ Cb2 parallel setup peaks at fib, which is the intercept of the rising Zbl curve and the falling Zb2. For higher frequency amplifiers this peak should fall within the amplifier's response range. At the fib intercept point, the two Zbl, Zb2 curves occupy the same value (Zbl -- Zb2 ). At this point also Zbl -- 27rfibLbi, and the capacitance impedances Zb2 -- 1/27rfibLbl and Zb2 -- 1/2 ~fib Cb2 are equal, which means that, equating these two terms, we have 1

fib = 2 ~ / ~

1Cb2"

(2.45)

Furthermore, at f,b the Zb2 impedance continues its capacitance rolloff, as shown by Zb2 = l/2rrfi b Cb2. This will result in the design equation

I Cb2 I -- I Lbl [,

(2.46)

therefore making the magnitude of the Cb2 capacitance equal to that of the Cbl shifts parasitic inductance control from Zbl to Zb2. The preceding design equation

2.11. Designing Power Bus Rails in Power/Ground Planes for Noise Control

83

requires the measurement of gbl , which is not a hard task with today's accurate impedance analyzers, which can measure the frequency response of a given capacitor. The rising part of this impedance curve will define the actual inductance by the equation Lbl -- Zcap/27rf. The dual bypass configuration can produce a critical resonance that degrades stability at certain frequencies. This can occur at frequencies that could be located either above or below the amplifier's crossover frequency ft. The Cb2 resonance in conjunction with Lbl c a n raise the net line impedance well above this level, producing oscillations. These resonances can provoke oscillation at frequencies above fc, which can diminish the parasitic feedback loop, but the resonant impedance rise can counteract this limit. Resistive detuning of the bypass impedance can also detune this resonance. Adding a small resistance series with Cbl detunes this resonance to ensure stability, as shown in Figure 2.33. In the figure, the Zo curve now makes a slow, rather than resonant, transition between Zb~ and Zb2 at the fib intercept. The addition of a resistance R s actually detunes these two resonances. The first resonance to be detuned is the self-resonance of Cbl, and then the resonance from Cbl and Cb2 combined. The addition of R s removes the resonance impedance drop and raises the impedance level to that of R s + R b. This raises the bypass impedance in the region previously that of fib- The Z 0 curve makes a smooth, rather than resonant, transition to this new limit level. The reduced Zo response slope provides a greatly reduced phase transition at the frequency of the previousfbl resonance. This scenario reduces the potential phase combinations with amplifier gain in PSRR that could degrade stability. The value of R s has been defined as [2] R s = 1 - Rbl.

(2.47)

Rbl is really a very small resistor, and choosing a different capacitor for Cbl that may contain this parasitic resistance (i.e., R s + Rbl) should be sufficient.

2.11

D e s i g n i n g P o w e r B u s Rails in P o w e r / G r o u n d

Planes

for N o i s e C o n t r o l Providing power for microprocessor-based systems is becoming an increasingly difficult job for advanced digital design. The reason is that power-supply rails have dropped in voltage over the years, from 5 V to 3.3 V and to 1.0 V in the future. From the IC process, lithography demands lower, better regulated powersupply rails and higher clock speeds, creating noise and dynamic loads. The ever-

84

2. Noise and Interference Issues in Analog Circuits

Z o ~ 0 Rs

Z~ ~

'Cb2 > Cs) is selected to provide a very low source impedance to the sample transient, while also providing a reservoir of charge. The RC time constant is chosen to be short enough to allow the sampler to settle to full accuracy in the allotted sample time. At the PCB level, proper power supply decoupling must be used for every PCB in the system. An example of decoupling the power lines is shown in

fine

I

$2

I

vos

coarse !

$1

__J

I

i

III III

S3

I

Figure 3.10 Properly buffered sampler.

I

,

Vout v

112

3. Noise Issues in High-Performance Mixed-Signal ICs Fine

s2 J _

VDD

I

cb

,,.

Coarse

s,_.L."

...L.

_[_R1

c~

Successive Approximation Registers

Dout

;5 c VDD

Figure 3.11 Properlychosen RC filter in ADC to eliminate input noise.

Figure 3.12. The power supply input is first decoupled to the large-area lowimpedance ground plane with a good-quality tantalum electrolytic capacitor. The capacitor bypasses the low-frequency noise to the ground plane. A ferrite bead reduces high-frequency noise to the rest of the circuit. Low-inductance ceramic capacitors should be used for each power pin on each IC. To minimize inductance, surface-mounted chip capacitors should be used. Multilayer PCBs with one plane just for ground are required when multiple bypass capacitors are used for bypassing the power path in ICs. When connecting to the backplane, several pins of each connector should be used for connection to ground. In this way a low-inpedance ground plane is maintained between the various PCBs in a multicard system. Furthermore, it is highly recommended to establish separate analog and digital ground planes on each PCB as shown in Figure 3.13. The separation between analog and digital ground planes is stretched all the way to the backplane using a motherboard ground plane. The ground planes are joined together at the system through a single point ground. Schottky diodes are inserted in order to prevent DC voltages from developing between the two ground systems. Analog components such as operational amplifiers, comparators, and analogto-digital converters are decoupled to the analog ground plane. All ADCs, DACs, and mixed-signal ICs should be treated as analog circuits with their ground connected to the analog ground plane. This scenario can be observed in Figure 3.14, which shows the internal block diagram of an ADC, with its parasitic capacitances, wire-bond inductance, and parasitic inductance associated with connecting the pads on the IC to the package pins.

3.2. Driving Inputs in ADCs

113

+V

c0,1; L

0

~~7 Cb2

low frequency noise current

IC

Cbl l

Cbn Backplane Ground Plane

4,

IC PCB Ground Plane

Figure 3.12 Decoupling of power bus lines in ICs.

As can be observed in the figure, there is considerable wire-bond inductance (Lp) associated with connecting the pads on the chip to the package pin charging currents in digital circuits to produce voltage at point (2), which will couple into point (1) of the analog circuits through the capacitance Cp. Furthermore, there is also some small parasitic capacitance between every pin of the chip. As was previously stated, the analog and digital ground should be connected at a point outside the analog ground plane using minimum load length. This is necessary because any extra impedance in the digital ground connection can cause more digital noise to be developed at point (2), which will cause more coupled digital noise into the analog circuit. As shown in the figure, it is advisable to place a buffer latch adjacent to the ADC to isolate the converter's digital lines from the

114

3. Noise Issues in High-Performance Mixed-Signal ICs

PCB1 An~log log ]Digital Grc ~nd ] Ground I ,.., Pla ,,, ~le t"lane

PCBn

PCB(n-1) I

II I

Analog Ground

P~._~

"//////////~

Dil ~ital

~ Aroalu:g I G' Grr)und PI~ne

Digital Ground Plane

~/////////////////~ ~ f / / / / / / / / ' J / / / / / / ~ , . .

~/////'//,~ ~////_~//'//////~

Backplane

/

Back0,ane

T

T1

Power Supply Single Point Ground

Figure 3.13 Separation of digital and analog grounds in mixed-signal ICs. noise which can be present in the data bus. The buffer latch and other digital circuits should be grounded and also decoupled to the digital ground. The noise that could exist between the analog and digital ground planes can reduce the noise margin at the ADC digital interface. The clock circuit should also be grounded and decoupled to the analog ground plane, since phase noise on the clock signal produces degradation in the system SNR. If possible (though this is not always likely), separate power supplies for analog and digital circuits should be made available. The analog power supply should be dedicated to the ADC. All DAC power pins should be decoupled to the analog ground plane, and all logic circuit power pins should be decoupled to the digital ground plane. A quiet digital power supply could also be used for an analog circuit. Clocks with low phase noise should be the main characteristic of crystal oscillators, since sampling clock jitters can modulate the input signal and raise the noise and distortion floor. The clock generator should be isolated from noisy digital circuits and grounded as well as decoupled to the analog ground plane.

3.2. Driving Inputs in ADCs Cb

() 5V

5V (

Cb

O

L

~. Lp ~"

~

+~~

!

,...

~

Circuits

Cp

VlI///ilII///II/~'/A

Lp

C

Analog

Digital GRN

Buffer Latch

Digital

Circuit~ 2~-

] VDD / Voltage Reference

"lock

I I

~

VDD

,, +

,

_1_

115

~

,~ Data Bus

DigitalGround Plane

Z

Analog Ground Plane

Analog Ground v

F////////J/////~/////////////////A Analog Ground

Figure 3.14 Proper grounding of a mixed-signal circuit.

Jitter in an ADC is simply the RMS value of the sample-to-sample variation at the point in time at which the input signal is sampled. The RMS time jitter produces a responding RMS voltage error, which is proportional to the slew rate of the input signal. The consequence of broadband jitter is to degrade the overall SNR of the ADC. Jitter for an ADC is usually attributed to the sample and hold circuits. The ADC sampling clock unfortunately is a phase and amplitude modulated by external noise sources; the sources can be wideband random noise, oscillator phase noise, power line noise, or digital noise due to poor layout, bad bypassing techniques, and bad grounding methodologies. Phase jitter on the sampling clock causes the same effect as jitter on the input sine wave. The consequences of even small amounts of jitter can be observed in Figure 3.15, where the SNR is plotted as a function of full-scale input sine-wave frequency for various amounts of RMS timing jitter using the formula SNR=201og where tj is the jitter time.

['] 2~ftj

'

(3.3)

116

3. Noise Issues in High-Performance Mixed-Signal ICs

SNR

(dB)

0.1

1.0

MHz

10

100

Figure 3.15 Example of jitter in ADC and its consequences.

A reading of the figure shows, for example, that in order to obtain an SNR of 90 dB on a 10-Mhz, full-scale input sine wave, the RMS jitter can be no more than 1 psec RMS. The total RMS jitter consists mostly of two frequency factors: narrowband and broadband. The clock will most likely have narrowband phase noise. The narrowband phase noise centered about the sampling frequency produces similar phase noise around the fundamental sinusoid frequency in an FET of the digitized sinusoid. On the other hand, the high-speed logic circuits in the sampling clock path will introduce broadband noise on the pulse edges which by itself can cause broadband jitter due to sample variations in the time at which the internal logic threshold was crossed. Clocks must have low phase noise. The crystal oscillator for these clocks should be constructed around discrete bipolar and FET devices. In other applications, additional filtering is usually needed for certain ADCs. In Figure 3.16, the bandpass filter after the crystal oscillator serves to remove any frequency noise around the sampling frequency. The low-pass filter removes any harmonics of the sampling clock frequency which may not have been attenuated enough by the bandpass filter. The output drives a low-jitter wideband comparator which converts the sine wave into a digital signal. The clock circuits should be isolated from the noise generated by digital portions of the system. It is important that the digital outputs of the ADC not be allowed to couple into the sampling clock signal. Possible coupling will cause

3.3. Filtering the Switching-Mode Power Supply

117

Low Jitter Comparator

Crystal Oscillator

Bandpass Filter

Low Pass

Filter C

I

I I

fs

fs

Figure 3.16 Bandpass/low-passfiltering needed for driving a low-jitter comparator.

an increase in the harmonic distortion due to transients coupling into the sampling clock. Finally, the sampling clock itself, which is a digital signal, should be isolated from both the analog and digital portions of the ADC.

3.3

Filtering the Switching-Mode Power Supply

Switching-mode power supplies are small and highly efficient power sources, with high reliability, that are capable of operating with a wide range of input voltages. However, switching-mode power supplies produce noise over a wide band of frequencies. The noise is both conductive and radiated in nature, producing undesirable electric and magnetic fields. When such power supplies are used to drive logic circuits, more noise is usually generated on the power-supply bus. The noise consists basically of voltage spikes in the range of 10 to 300 kHz. These voltage spikes contain frequency components that would extend into the hundreds of megahertz. Filtering switching-mode power supplies must be tackled primarily by the power supply itself, but additional external filtering as shown in Figure 3.17 should also be added. Split-core inductors on large ferrite beads should be used as inductors. Both C1 and C 2 must have low parasitic inductance and must be located as close to the power supply as possible to minimize current loops and high-frequency magnetic fields. The filter design is very important, since the power provided to analog devices must be as clean as possible. Factors that are important are (1) characterization

118

3. Noise Issues in High-Performance Mixed-Signal ICs

L1

Switching Mode Power Supply

l ol

02=

ii ,ll o3

9

il L2

Figure 3.17 Filtering noise out of switching-mode power supplies.

of output noise, (2) identification of the frequency range of interference produced by the power supply, and (3) evaluation of the component used in external filtering. An example of switching noise in the output of a switching mode power supply can be observed in Figure 3.18, where the fast voltage spikes can produce significant harmonics well into the megahertz range. Because most analog ICs show degraded power-supply rejection at frequencies only above a few kilohertz, some filtering is highly desirable. An example of a block diagram for a switching-mode supply is shown in Figure 3.19. The input voltage is first filtered to remove any input noise that might be present on the power bus. The input voltage is then converted to 30 kHz on a higher square wave, which drives a transformer. The signal is then rectified and filtered at the transformer output. Pulse width regulation to control the duty cycle of the transformer drive is used in a feedback loop. It is important to realize that noise is being generated at several stages in the switching-mode power supply. The first producer of noise occurs at the inverter stage, where fast pulse edges generate harmonics which can extend for several megahertz. Secondly, the parasitic capacitance between the primary and secondary windings of the transformer will provide a secondary path through which highfrequency noise can corrupt the DC output voltage. Finally, high-frequency noise is also generated by both rectifier stages. We now look at some defaults concerning the capacitors and inductors used in filtering the noise from switching-mode power supplies.

3.4

Capacitor Choices for Noise Filtering

Capacitors are very useful filter components in switching-mode power supplies. There are many different types of capacitors, and their use in power supplies

3.4. Capacitor Choices for Noise Filtering

119

80 mV

40 mV Switching Noise (mV) 5V

I_/

-40 mV

-80 mV Time (laSec)

80 mV I

40 mV Switching Noise (mY)

30 ~tS

I

I

I

I

I

5V

-40 mV

-80 mV Time (lasec) Figure 3.18 Example of switching noise at the output of a switching-mode power supply.

must be well understood. There are basically three classes of capacitors useful in filter design in the 10- to 100-kHz frequency range. They can be classified depending on their dielectric types: electrolytic, film, and ceramic. Table 3.1 shows a classification of several capacitors.

120

3. Noise Issues in High-Performance Mixed-Signal ICs

Vin

Input Filter

Inverter

rransfo~ "ner

"

Figure 3.19

Table 3.1

I

Pulse Width Modulator

Block diagram of a switching-mode power supply.

General Classification of Commonly Used Capacitors

Aluminum

Electrolytic (General Purpose)

Electrolytic (Switching)

Electrolytic

Size

100 txF

120 txF

100 txF

1 ~zF

0.1 IxF

Vrate d

2

25

20

400

50

ESR

0.6 ohms at 100 kHz

0.18 ohms at 100 kHz

0.12 ohms at 1 MHz

0.11 ohms at 1 MHz

0.12 ohms at 1 MHz

f(MHz)

100 kHz

500 kHz

10 MHz

10 MHz

1 GHz

Aluminum Tantalum

Polyester

Ceramic

Ceramic capacitors are usually the choice for a frequency above several megahertz. These capacitors are compact in size, low-loss, and are available up to several microfarads and with voltage ratings of up to 200 V. Multilayer ceramic chip capacitors are very popular for bypassing and filtering at 10 MHz or more. These capacitors have very low inductance, which is optimum for RF bypassing. In smaller sizes, ceramic chip capacitors have an operating frequency range of up to 1 GHz. All capacitors have some finite equivalent series resistance (ESR). Sometime these dielectric losses can help in the reduction of resonance peaks in filters and provide some degree of damping. For example, in tantalum and switching-type

3.4. Capacitor Choices for Noise Filtering

121

electronics, a broad series resonance region can be observed in an impedance vs frequency plot when Z falls to a minimum level, which is the capacitor's at that particular frequency. In most electrolytic capacitors, ESR degrades at low temperature by a factor ranging from 3 to 7 times. Figure 3.20 shows the highfrequency impedance characteristics of a number of electrolytic types. All capacitors have parasitic elements that limit their performance. The electrical network representing a capacitor and its parasitic elements is shown in Figure 3.21. The voltage across the capacitor is proportional to its net impedance, as shown in Figure 3.21, and to temperature. Capacitors also have parasitic inductance, which determines the frequency where the net impedance of the capacitor changes from a capacitive to inductive characteristic. In the frequency range from 10 kHz to 100 MHz, the parasitic resistance and inductance can be minimized with chip ceramic-type capacitors. The electrolytic capacitors are of a great variety of types. They include the general-purpose aluminum electrolytic capacitors, which are polarized and cannot support any voltage in the reversed bias direction. Also included in the electrolytic family are the tantalum-type capacitors with an upper limit voltage of 100 V and upper capacitance of 500 ~F. A subset of aluminum electrolytic capacitors is the switching type, which can handle high pulse transients in frequencies of up to

100

10

zohms, I

film 10 ~tF, 20 V

1.0 -

tantalum 101.tF, 20 V 0.1

ceramic 10~tF, 20 V

10

In 10

I

1

I

1O0

1K

1OK

I 100K

1 1M

Frequency (Hz)

Figure 3.20

High-impedance profile of electrolytic capacitors.

10M

122

3. Noise Issues in High-Performance Mixed-Signal ICs

100

_~apacitive

10 IZl in ohms 1.0

lOOm

70m

_

Resistive

I 10

I 1K

I I I I I I 1OK lOOK 1M IOM lOOM 1G Frequency (Hz)

Rp, Rs, Lp are the parasitic resitance and inductance of the capacitor

I

I lOG

! [100 • signal bandwidth], 1 where the signal bandwidth is given by BW = 5,TrRfC2. These equations for filter design and signal bandwidth for op-amps are good scenarios as long as C~ and

138

3. Noise Issues in High-Performance Mixed-Signal ICs

C2 ,

,,

II

Filter F

.

.

.

.

I R/2 i 'VVX,

VinO

, I

i

I

]_'

,,

C1

R/2

I ~/XA, I

Vout

C

R1

C2 II

R1

4;

I I 9- - - -

I

.

Vout

I I

C1 .

O

I

I- . . . . R Vi n o L , % A / ~ ,

.

.

0

filter Figure 3.35

Implemeting filtering to eliminate RFI rectification in op-amps.

3.7. RFI Rectification in Analog Circuits

139

C 2 have low inductances and the resistors have low parasitic reactance and are mostly metal-film resistors. Noise can also couple into an amplifier's input stage through its output as shown in Figure 3.36, especially in low-power circuits where operational amplifier output resistance and external resistances are large. The output resistance of operational amplifiers increases with frequency and exhibits an inductive behavior. As the output impedance increases with frequency, the high-frequency noise at the output is not attenuated and may couple to the amplifier's input, bypassing backwards through the feedback network. To prevent noise from coupling into the inputs via the feedback network, an input resistor Rin is connected between the sum node and the inverting terminal of the operational amplifier, forming a low-pass filter with the amplifier's input capacitance as shown in Figure 3.37.

C2 II

E-field

R1 Vin -I-"

Vn

Vout in -field

Figure 3.36 Noise coupling into amplifier's input.

140

3. Noise Issues in High-Performance Mixed-Signal ICs

Ii

Vin 9

R1

C2

Rin

,~/x/x,

Vout

+ Figure 3.37 Preventing high-frequency output noise coupling into input.

3.8 Op-Amps Driving Capacitive Loads Transmission lines connecting op-amps provide parasitic capacitances which tend to load the op-amp. To these parasitic capacitances, we must add load capacitances, which are predominant in many wide-bandwidth situations. Capacitive loading effects should always be considered in wideband applications. PCB capacitance can increase substantially for long signal runs over ground planes in high dielectrics. For example, it is not unusual for long runs of signal to have capacitance to ground of over 100 pF (e.g., G-10 dielectric at 0.03 inches above ground has a capacitance of 22 pF/foot). Capacitive loading of op-amps can cause the settling time to be greater than desired. One of the methods to overcome capacitive loading is to use overcompensation of the amplifier. This reduces the amplifier bandwidth so that additional load capacitance does not affect the phase margin. In general, any amplifier using external compensation can be overcompensated to reduce bandwidth, which restores more stability against capacitive loads by lowering the amplifier's unity gain frequency. Capacitive loading of an op-amp reduces phase margin and may cause instability. Another approach to reduce the instability problems is by forcing a high-gain noise, where use is made of resistive or RC pads at the amplifier input, as shown in Figure 3.38. In this technique, an extra resistor R d is added, as shown in the figure, to work against Rf to force the noise gain of the stage to a level higher than the signal gain (assume unity). If we assume that C 2 in Figure 3.37 is such that it produces a

3.8. Op-Amps Driving Capacitive Loads

Vin 0

141

Vout

,'~

O

Rd=Rf / 10 Figure 3.38

RL

~CL

Improving the stability of capacitively loaded op-amps.

parasitic pole near the amplifier's natural crossover, this loading combination could lead to oscillation due to the excessive phase lag. However, connecting Ro to a higher amplifier noise gain produces a new 1/,8 open-loop rolloff intersection nearly a decade lower in frequency. This is set low enough that the extra phase lag from CL is no longer a problem and amplifier stability is restored. A disadvantage of this method is that the DC offset and input noise of the amplifier will increase. An optional series capacitance Cd can be added to R d, and the noise is only confined to a region ~RdC d. Another approach for capacitive load compensation is shown in Figure 3.39. It is a simple isolation technique, with the use of an out-of-loop resistor R t t o isolate the capacitive load. This method can be applied to any amplifier, with the small disadvantage that there is a reduction in the amplifier bandwidth a s R t and C L work to reduce the bandwidth. In high-speed amplifiers and applications where the lowest setting time is critical, even small values in the load capacitance can be unfavorable for the frequency response, as in the case of driving analog-to-digital converter inputs. High-speed ADC inputs are usually capacitive in nature. The amplifier must be capable of driving the capacitance, but it must also keep the bandwidth and settling-time characteristics. In applications requiring the drive of high impedances, as in ADCs, we do not have the convenient back termination resistor to dampen the effects of capacitive loading. At high frequencies, an amplifier output impedance is rising with frequency and acts like an inductance, which in combination with CL causes oscillation. In general a small damping resistor R t

142

3. Noise Issues in High.Performance Mixed-Signal ICs

Rin Rt

1

Vin 0

CL-]Rb

RL

-Vcc

Figure 3.39 Isolation technique in capacitively loaded compensation.

which is placed in series with CL will help restore response. The recommended value of R t will optimize response, but CL will also degrade the maximum bandwidth and settling performance. In the limit RtCL, the time constant will dominate the response. In any given application, the value for R t should be taken as a starting point in an optimization process. The example shown in Figure 3.40 provides feedback correction for the DC and low-frequency gain error associated with R t. Active compensation can only be used with voltage-feedback amplifiers.

Rf

Cf

I1

Rin

Rt V~n

O

Rk

Vout

j_o ~

Figure 3.40 Feedback correction for the DC and low-frequency gain error.

3.9. Load Capacitance from Cabling

143

In this current, there is the DC feedback from the output side of the isolation resistor R t correcting for errors. The AC feedback is returned via Cf which b y p a s s e s R t [ef at high frequencies. With an approximate value of Cf the stage can be adjusted for a well-damped transient response. We still would have a bandwidth reduction and slew-rate reduction. However, the DC errors can be very low. There will always be a need to tone Cf and CL even if this is done well initially; any change to CL will alter the response away from the flat response.

3.9

Load Capacitance from Cabling

Transmission lines are widely used in wideband operational amplifiers such as the one shown in Figure 3.41. In the figure, an operational amplifier driver uses at its output a matched resistive impedance (R t = 93 ohms) to the transmission line connecting the driver and receiver. In the figure the line is a 93-ohm coax line. However, twisted pairs or stripline configurations (e.g., in a PCB) could have also been used. The differential receiver terminates the line also with a resistive impedance of 93 ohms. The receiver stage recovers a noise-free 1-V signal which is referenced to system ground. In this configuration there is only resistive loading to drive the amplifiers at the source, which provides amplifier stability and minimizes distortion, line reflection, and other time-domain aberrations. There is a 6-dB loss associated with the line source and load terminations, but this can be easily made up by a 2• driver stage gain. The most effective way to drive a long line is to use a transmission line, which has been standard for video signal for many years. A transmission line which is correctly terminated with pure resistances does not look capacitive, but instead a controlled capacitance and inductance exist, providing a

Single-EndedDriver

Receiver

Differential

Vin,, I~Rt-93ohms. ( ) ~

93ohmsCoax Vout

Rt GroundA

I

\

' L.

.

.

.

.

I

Figure 3.41 Properly matching transmission lines to op-amps.

144

3. Noise Issues in High-Performance Mixed-Signal ICs

characteristic impedance of Z o = 1/N/-~. Correctly terminated transmission lines have impedances equal to their characteristic impedance. Unterminated transmission lines (on either the driver or the receiver side) behave approximately as lumped capacitances at frequencies fc <

NOISE IN PHASE-LOCKED

LOOPS

Because phase-locked loops operate on the phase of signals, they are susceptible to phase noise and jitter. We examine two important cases of noise in PLL: when the signal contains noise, and when the VCO introduces noise. f ( t ) = A sin(wct + ~in (t))

(3.57a)

g(t) = B sin(wct + (J~out).

(3.57b)

166

3. Noise Issues in High-Performance Mixed-Signal ICs (o in = o) fr +

Ao~

Phase Detector

LPF

VCO

T

o) out

feedback 1/M

Figure 3.63

Phase-locked loop in locked configuration.

As previously outlined, the transfer function (Figure 3.64) is given by 2 (.O n

H(s)

s 2 + 2 P WnS 4- (O2"n

(3.58)

If ~bin(t) is varied slowly such that the denominator of the transfer function is still close to w 2n, H(s) remains close to unity, showing that the output phase follows the input phase, which is the natural PLL definition as a tracking system. If ~bin(t) varies at an increasingly higher rate, the transfer function equation shows that the output excess phase ~bout(t) drops, eventually approaching zero and providing g(t) = B sin w c t. In fast variations of the input excess phase, the PLL fails to track the input. The input phase noise spectrum of a PLL is dependent on the characteristic low-pass transfer function when it appears at the output.

O,n

LPF

VCO out

Figure 3.64

Linear model for transfer function calculation.

3.15. Basic Topology of a Phase-Locked Loop

3.15.3

167

P H A S E N O I S E I N VCOs

The phase noise in the VCO can be modeled as an additive term ~bnvco, as shown in Figure 3.65. We are assuming ~bin and ~bnvco are uncorrelated. We set ~bin(t) = 0, which means the excess phase noise of the input is zero: q~out(S)

~bnvco(S)

_

-

2 (.O n

(3.59)

2"

s 2 + 2 p WnS + Wn

This transfer function has the same poles as before, but it contains two zeros at Wzl = 0 and Wz2 = - w f, characteristics of a high-pass filter. The zero at the origin means that for slow variations in ~bnvco, ~bout is small. The rationale is that in lock, the phase variations in the VCO are converted to voltage by the phase detector and applied to the control input of the VCO to accumulate phase in the opposite directions. Because the VCO voltage phase conversion has nearly infinite gain, for slowly varying Vc, the negative feedback suppresses variations in the output phase. Let us now assume that we experience a rate increase in ~bnvco. Then, the magnitude of Kvc 0 / s and the loop gain decrease, allowing the virtual ground to experience significant variations. As the rate of ~bin approaches wf, the loop gain is reduced by the low-pass filter. As s ~ co, q~out ~ Q~nVCO, which is to be expected because the feedback loop is essentially open for very fast changes in ~bnvco. If we apply a small step to the power supply and find the time required for the input-output phase difference to settle within a certain error band, since such a step affects mainly the VCO output, we can use Equation (3.59) to predict the circuit's behavior. For a phase step of height, the output assumes the form q~out(t) = 05l

p

cos X//1 -- p2 Wnt + V'I - p2 sin N/1 - p2 Wnt] e-POint.

nvco1 1t)

out

O,n LPF

Figure 3.65

VCO

Adding phase noise to the VCO linear model.

168

3. Noise Issues in High-Performance Mixed-Signal ICs

This means that the output initially jumps to r and subsequently decays to zero with a time constant (pWn)-1. It is therefore desirable to maximize pw n for fast recovery of the PLL. We can conclude that to minimize the VCO phase noise contribution, the loop bandwidth must be maximized. Unfortunately, this may conflict with the case where the PLL input contains noise. In cases where the input has negligible noise, the loop bandwidth should be maximized to reduce both the VCO phase noise and the lock time. Other noise sources can be considered as shown in Figure 3.66. In the figure, a frequency synthesizer and a divider provide the input to the PLL. The noise sources in the figure are the phase detector noise t~pd,n, frequency divider noise ~boq,n, low-pass filter noise ~bf,n, voltage-controlled oscillator noise ~VCO,n, and feedback loop divider noise ~bdi,n. An IF filter is also used in the feedback loop to limit even more possible noise that could have been generated by the VCO.

3.15.4

LOW-PASS FILTER NOISE

If the low-pass filter is a passive one (i.e., a simple RC lag or lag/lead network), there are two major sources of noise: First, basically some types of capacitors and carbon resistors can generate a substantial amount of 1/f noise. As a result, the low-noise design would require the individual selection of low-noise capaci-

$ dq,n

~._rn fr Synthesizer

f,]Divider =fr/ Qbyt

$ pd,n

~~

$ f,n

(~~~,,~~ LPF ,~

~rn/Q

~ vco,n di,n Figure 3.66

Dividerby N Other additive noises in PLL.

~I

IFFilter ]

3.18. Phase Noise in Phase Detection

169

tors and resistors. The second source may be the decoupling resistors Rdc, separating the varactor circuit from the loop filter and the phase detector. The respective noise power density is given by

Sf = 4KTRdc = 1.66 • 10 - 2 0 Rdc

3.16

( g 2 [ Hz).

(3.60)

Phase Noise in DC Amplifiers

As shown in Table 3.2, in several cases we may need to introduce either an active lag/lead filter or a DC amplifier. The design of a low-noise amplifier is somewhat complicated. Typical equivalent input noise voltage is only several nV/X/-H-~z, with the comer low frequency between 10 and 100 Hz. Similar performance is also achieved with some modem IC operational amplifiers.

3.17

Phase Noise in High-Frequency Amplifiers

It has been found that the power spectral density of the flicker noise close to the carrier is approximately given by 10-11.2 S ( f ) -- ~ -~ S(fJwhite

f

(3.61)

for the range of 5 to 100 MHz, quite independent of the transistor type and even of the multiplication factor. Experiments proved that the intrinsic direct phase modulation of the RF carrier by transistor was responsible for the phenomenon. The improvement has been achieved by applying local RF negative feedback using a small unbypassed resistor in the emitter, typically from 10 to 100 ohms. Low amplifier currents and high voltages help to keep the 1/f noise current low.

3.18

Phase Noise in Phase Detection

The best phase detectors are double balanced mixers with Schottky barrier diodes in the ring configuration. A further improvement may be achieved by placing two diodes in each arm. Measurements performed reveal that 10-14+1 Spd(f ) ~

nt- 10 -17

f

(3.62)

170

3. Noise Issues in High-Performance Mixed-Signal ICs

On the other hand, it has also been found that noise properties of popular digital phase frequency detectors in the range from 0.1 to 1 MHz can be modeled as 1010.6+--0.3

S(f) =

3.19

.

f

(3.63)

Phase Noise in Digital Frequency Dividers

Since the frequency or phase modulation index decreases proportionally to the division factor N, the ideal noise figure is Fdivide r -- --20 log N.

However, additional noise is generated in the divider itself. The output phase noise is given by Sdi(f ) :

3.20

Sdi,in(f) 10 -14 N2 + f + 10 -16"5.

(3.64)

Phase Noise in Frequency Multipliers

The noise for properly designed transistor frequency multiplier is given by 10 -14 Smu(f ) ~" ~ - 1 -

10 -16"5.

(3.65)

f In diode frequency multipliers the flicker noise level is higher, given by 10-12.9/f.

3.21

Phase Noise in Oscillators

In accordance with several models, any oscillator can be simplified into a loop containing a resonator and an amplifier limiter. As a result, its output spectral density is given by Svco,n(W) = Sa,n(W)[1 + (090/2QL~O)2], where the amplifier limiter noise is given by Sa,n(f)

= a_ 1/f +

ao,

(3.66)

3.23. More about VCO Design and Noise

171

and the magnitude of the flicker noise constant a_ 1 has been found experimentally in the range from 5 to 100 MHz to be a-1 = F-1 • 10 -112

(rad2).

The white noise constant is the ratio of the noise power ~bnoise(t) 2 to the oscillator power Po reduced to 1-Hz bandwidth and multiplied by a noise factor Fo: a o = FoKT/P

o ~

4.0 •

lO-21Fo/Po

(rad2/Hz).

A power law relation can also be established: Svco,n(f) = f2

[]h-l7+ 7J5h~ hl- + ~ +- -~o

h2 9

(3.67)

Here, h 1 = a 1/4Q 2 _ / 2 lfo, -

-

L ,

hl=a

h o = a o / 4Q L, 2 / 2 h2 -'- ao fo,

where QL is the oscillator quality factor andfo is the oscillator resonance frequency. Finally, the general oscillator noise equation is 1 10 -11"6

Svco,n(f) = f 2 f-3

3.22

1 10 -15"6 1 10 -11 10215 ] Q2L- -~- f2 - - ~Q 2 -~ f f2 t- fo "

(3.68)

Phase Noise in Reference Frequency Generators

The reference generator in low-noise PLL systems (frequency synthesizers) is a spectrally pure crystal oscillator. A low close-to-carrier noise requires the use of resonators with the highest possible Q. For an average crystal oscillator, the following noise equation is applicable:

Sosc n(f) 1 37.25f~ 72 39.4f2 1 10 -12"15 10 -14"9 fo2 -f~10+ 10+~ ~ + f2 9

3.23

(3.69)

More about VCO Design and Noise

In the VHF region, the fabrication of VCOs using hybrid elements is still very common. Unfortunately, this approach can result in stray capacitances and parasitics which could cause problems in circuit development. The control of the output

172

3. Noise Issues in High-Performance Mixed-Signal ICs

frequency range is not an easy task in such VCO designs. For example, the equivalent series self-inductance in ceramic multilayer capacitors introduces a series resonant frequency which affects the tuning bandwidth. As the self-resonant frequency is exceeded, the reactance of the ceramic capacitors changes polarity, resulting in increased oscillation. In the circuit of Figure 3.67, a Colpits oscillator with the emitter in series with a capacitor connected to ground is shown. The reactive elements consist of capacitances C1, C2, and Ct along with inductance L 1. Ct can be realized with two varactors placed back-to-back for better AC performance. The series combination of L 1 and the varactors behaves like an inductor. The varactors are used to reduce the inductance from L 1 in order to vary the oscillation frequency. C1 is a forward-biased base-to-emitter junction capacitance that is approximately equal to C 1 -- Cje o "k- gm'/'f,

where Cjeo is the base-to-emitter capacitance in the zero-biased depletion region, grn = Ic/Vt, Ic is the collector current, Vt is the threshold voltage, and zf is the base transmit time. Notice that in Figure 3.67 C 2 has a series of parasitic inductance. This related self-resonance frequency is generally an inverse function of the capacitance. The oscillating frequency is roughly equal to fosc = 1 / [277"L1C1C 2 / ( C 1 + C 2 ) ~

(3.70)

V 2

V Figure 3.67

Colpits oscillator.

3.24. Modeling RF Interference at the Transistor Level

173

whereas the negative resistance is Rneg = gm /

w2C1C2,

(3.71)

where w is the operating frequency. A series inductor L 2 from a nonideal ground introduces an additional critical frequency given by fcr -- 1 /

[2~(L2C2)~

(3.72)

The circuit could not sustain oscillation above fcr as a result of the change in polarity of the effective reactance in the emitter branch. Therefore, the series resonance frequency acts as the upper bound of the tuning range: f~ = 1 / 2 77"(L2C2)0"5.

3.24

(3.73)

M o d e l i n g R F I n t e r f e r e n c e at the Transistor Level

In electronic circuits, the RF energy is first picked up by cables and associated wiring and then conducted directly into the circuits. In essence, the RF signal is envelope detected by the nonlinear characteristics of the semiconductor junctions. The interference problem can be modeled as the low-frequency components that are produced when high-frequency RF-induced currents flow through a nonlinear device. The low-frequency components which are dependent on the modulation of the RF signal are often within the passband of the low-frequency circuits and are processed as if they were the required signals. With the understanding of this rectification process, the interference effects in semiconductors can be simulated and circuit susceptibility in different environments can be assessed. Using a time domain approach in which RF waveforms are corrupted is very time-consuming and is more suitable to SPICE models. The approach discussed here is to develop models of semiconductors in which the low-frequency components resulting from rectification of an RF signal are included [2]. The parameters of the rectification components in the models depend on the characteristics of the semiconductor device itself and also on the external circuit of the device. Of primary importance are the device capacitances and the frequency, power level, and equivalent impedance of the interfering RF source models. These are discussed, dealing with PN junction transistors which include rectification effects. Parametric studies involving ideal diodes are described in which the expected range of each of the rectification parameters is estimated, as well as their dependence on capacitance, frequency, RF power, and equivalent

174

3. Noise Issues in High-Performance Mixed-Signal ICs

RF impedance. Reference [2] describes the use of these models in analyzing interference in integrated circuits with a SPICE-like analysis program.

3.24.1

RECTIFICATION IN PN JUNCTIONS

Rectification is the mechanism by which out-of-band RF and microwave signals are converted to in-band signals. This process is very much an envelope detector. In such cases the unwanted signals are detected by electronic devices intended to process other signals. The detected response varies with the envelope of the RF signal, which will depend on the characteristic of the RF source. These lowfrequency signals may be very similar to those normally present in a circuit. Once the RF signal is rectified and mixes with the data from the desired signal, it is difficult, probably impossible, to remove the interference effect even with additional processing. The only way to avoid this problem is through adequate shielding, preventing the interference signal from entering the rectification process. Rectification is the result of the nonlinearities inherent in semiconductor devices. Most semiconductor devices are built of PN junctions which have nonlinear current voltage characteristics. Figure 3.68 shows how this nonlinear behav-

/

Normal Diode

Characteristic

Characteristics

_.

current waveform

I I ~

Voltage Waveform

Figure 3.68 Illustration of rectification in an PN junction. The AC component of voltage causes an offset in the DC component of current flow.

3.24. Modeling RF Interference at the Transistor Level

175

ior is used to rectify an AC signal. In the figure, a continuous sinusoidal voltage is applied to the junction with a DC bias voltage. The current flows in series of nonsymmetrical pulses. The average value of the current pulses is higher than the DC value of current that would flow if only the bias voltage were present, so it appears as if the signal has caused a DC offset current to flow. As the bias voltage level is changed, the offset current also changes; thus, a locus of average current vs DC bias voltage can be obtained and plotted as shown in Figure 3.68. This can be interpreted as an RF-induced diode l-Vcharacteristic. This is probably what a low-frequency circuit sees of the diode. At a given bias voltage, the DC current flow is given by RF-induced characteristics if RF is present. In general, a biased diode or transistor junction will experience an increase in average current when exposed to RE The circuit in Figure 3.69 models the diode characteristics under RF conditions [3].

(~ Id Ix

Rx D1 ~

Id2

Idl

D2

~ld Figure 3.69

Circuit model of a diode including rectification effects.

176

3. Noise Issues in High-Performance Mixed-Signal ICs

The model of Figure 3.69 is composed of two diodes, a current source, and a resistor. The diode D1 models the diode with no RF energy on it and follows the standard diode equation

,o

(exp q 1)

(3.74)

where ID1

-'-

Va Ias q K T n

= = = = = =

current through diode D1 voltage across D1 diode reverse saturation current electron charge Boltzmann's constant junction temperature in kelvins emission coefficient.

The elements D2, I x, and R x model the offsets in the device characteristics due to RE The current source I x depends on the RF power level, frequency, and RF source impedance. For large RF signals, I x is proportional to the square root of the RF power PRF by the relation I x = K VPRF,

(3.75)

where K is a constant with power, but is dependent on the frequency and source impedance of the interfering signal. The value of the resistor R x is also dependent on the frequency and source impedance of the RF signal, but it is independent of the power level of the RF energy. In general, R x increases with frequency or increased source impedance. Figure 3.70 shows a piecewise linear approximation of RF-induced diode characteristics.

3.24.2

I N T E R F E R E N C E OF R F E N E R G Y I N T R A N S I S T O R S

Diode transistors go through a change in DC characteristics when exposed to RF. A low-frequency circuit unable to respond directly to the RF energy will exhibit changes in transistor bias points caused by RF-induced changes in transistor characteristics. The change is due to current and voltage offsets resulting from rectification of RF signals in the transistor junctions. In Figure 3.71 we see an oscillation of the DC characteristics for a 2N2369A transistor. When the transistor is stimulated by 90 mW of RF power at 220 MHz [3] on the collector lead, the characteristic curve appears to shift to the fight by

3.24. Modeling RF Interference at the Transistor Level

id/

Ix

--

177

cNh ramaa~teDi~

I

.

.

.

.

.

.

.

.

.

A

current waveform I

Vd

I

Voltage Waveform

i~

Figure 3.70

I

Piecewise linear approximation of RF-induced diode characteristics.

4.5 V. Different responses occur for different transistors at different injection points. Figure 3.72 shows the change in DC characteristics of a 2N2222A transistor stimulated on its collector with 90 m W of RF power at 220 MHz. In general, for an N P N transistor with RF conducted on its collector, the collector current will increase at voltages near saturation. The 2N2222A transistor shows this

~_/._ lc(ma)

(a)

j[~ Ic(ma)

(b)

28 21

21

F

I

14

I 0

2

4

6

8

10

VCE (volts) Figure 3.71

12

I

0

2

/I/I

4

I

I

I

i,~

6 8 10 12 VCE (volts)

Characteristic curves for a 2N2369A transistor (a) without an interfering signal and (b) with a 90-mW 220-MHz signal entering the collector.

178

3. Noise Issues in High-Performance Mixed-Signal ICs

~ lc(ma)

~ lc(ma )

(a)

(b)

28 !-

21

21

14

14

7

0

2

4

6

8

10

12

0

2

VCE (volts) Figure 3.72

4

6

8

10

12

VCE (volts)

Characteristic curves for a 2N2222A transistor (a) without an interference signal and (b) with a 90-mW 220-MHz signal entering the collector.

effect as a rounding of the characteristics at voltages near zero. These effects can also be observed at higher frequencies, but the magnitude of the effects decreases. When an NPN transistor receives RF energy on its base or emitter leads, these effects are usually accompanied by a fl decrease, and it is more pronounced at low RF power levels. Furthermore, it has been observed that the base-emitter voltage decreases as the RF power increases. If the transistor is biased in the forward region, the normal base emitter voltage is usually around 0.7 V for a Si NPN transistor. RF power on the order of 1 mW can reduce this to zero. In general, significant base-emitter decreases can occur at very low power levels, which is a great degradation in sensitive analog circuits that respond to small bias voltages. Significant voltage offsets in feedback amplifiers have been observed at power levels as low as 1 /zW [3]. The Ebers-Moll representation of a transistor model is now modified to account for RF effects. Figure 3.73 shows the standard Ebers-Moll model for an NPN transistor. The diode characteristics which represent the base-emitter and base collector junctions are given by

If:Iof(expCqV 1)e x fqVbe~ ) ,

IR = /OR ~e p ~ - ~ - j - 1

(3.77)

3.24. Modeling RF Interference at the Transistor Level

C

?; c

Ifo~f

B C)

3~ IR

Ib V

If

IR o~R

Figure 3.73

179

The standard Ebers-Moll model for an NPN transistor.

where /Of and /OR are the diode forward and reverse saturation currents. The transistor forward and reverse betas, flf and fir, are related to the values of af and a r by

fir-

af

(3.78)

ar

(3.79)

1 _ ar"

In order to account for the rectification in the transistor junction, the rectification model for diodes previously illustrated in Figure 3.69 was substituted for each diode in the standard Ebers-Moll NPN transistor model of Figure 3.73.

180

3. Noise Issues in High-Performance Mixed-Signal ICs

Figure 3.74 shows the modified Ebers-Moll model after the substitutions. Using this approach the rectification in each junction is treated separately. The current sources Ixe and Ixc are dependent on the RF level power, frequency, and RF source impedance. For large signal, they are proportional to the square root of the RF power level,

Ixe-- Ke'V/PRF lxc =

(3.80)

KcX/PRF,

(3.81)

C

Ic

B 0

IR o~R

Figure 3.74

.c ']:;

~

'xe

Re

3

E

~ Ie

IR

Ib V

The Ebers-Moll model for an NPN transistor modified to include interference effects.

3.24. Modeling RF Interference at the Transistor Level

181

where Ke and Kc are constants with power but depend on the frequency and source impedance of the interfering RF signal. In general, K e and K c decrease with increasing RF frequency. The values of R e and R c are constants with RF power at a given RF source impedance and frequency, and, of course, they increase with increasing source impedance and frequency.

3.24.3

WORST-CASE CALCULATIONS

It is often required just to get the worst-case response of a circuit under certain environmental conditions. This scenario calls for a worst-case analysis for which the Ebers-Moll transistor is well suited. The procedure calls for varying the values of components I• Re, I• and R e until a combination is found that produces the worst output response. The analysis done in [3] produces the model shown in Figure 3.75, where r includes the lossy elements within the diode itself,

Id r I

+

I

Rx C._~_

Ix

II

II Figure 3.75

D1

T D2

I I

Model of a diode or transistor junction.

182

3. Noise Issues in High-Performance Mixed-Signal ICs

such as bulk resistance, and those external to the diode itself, such as losses associated with cables and printed wiring. C is a shunt parallel capacitance across an ideal diode D1. The worst-case parameters are given by Kmax

R2)2 (1 +472)1/2] 1/2 4/}x? + (1 + ~ x ~ l - + 4r2) 1/2

8~-~[/~x(1 + R2)-

/}x

kx(min ) = 9,~ Js

~(1-

[1 + (1 27 + 4~2) 1/2]

= [1 + (1

(3.82)

+ 4~2) 1/2] 2?

Ix(max )

= KmaxV/-PRF,

where

Rx = ~oCRx ~" = ooCr. 3.24.4 CALCULATING MAGNITUDE OF OFFSET VOLTAGE AT EMITTER-BASE JUNCTIONS Measurements and calculations have shown that rectification in a bipolar transistor operating in linear mode occurs principally at the emitter base junction. Furthermore, as long as the RF voltage at the junction is not significantly greater than 26 mV, the rectified offset voltage A V follows a square law relationship and is proportional to the absorbed power [4]. The offset voltage is given by

1/2

AVpa 2KTq[RsaeogC.n.P2el]

(V/W),

(3.83)

where C.,r/Ae is the base emitter junction capacitance per unit area, R s is the base sheet resistivity, Pe is the emitter perimeter, and Pa is the absorbed power in the emitter base junction. The preceding equation is correct for the limiting case where there is severe crowding of the AC signal near the edges of the transistor emitter and the device may be viewed as a distributed circuit. At low frequencies or where the emitter width 2L is so small that sufficient crowding does not occur, the equation takes the limiting case

where VT =

KT/q

= 0.026 V.

AV

4A e

Pa

VTWC~P2,

(3.84)

3.24. Modeling RF Interference at the Transistor Level 3.24.5

183

RFI RECTIFICATION IN JFETs

For a given DC bias and a given frequency, the JFET exhibits an increase in the drain current as the absorbed RF power increases. For low levels of RF power, the drain current is proportional to the power absorbed in the device. Empirically, this phenomenon can best be explained through the use of a standard hybrid r smallsignal FET model with the addition of an RF-induced noise current source in the drain, as shown in Figure 3.76. This source generates an offset current AId. The rectification effect can be modeled in terms of the nonlinearity of the gate voltage drain current characteristics in order to calculate Ia, the average value of the drain current. An analysis done in this respect shows that V 2 dg m

I d ~ Id(Vo) +---s ~ 4 dVg'

(3.85)

where gm is the device transconductance and at bias point Vo, Vo is the quiescent gate source voltage, Vg is the gate voltage, and Vp is the amplitude of RF noise source Vp sin wt. The preceding equation shows that for low levels of absorbed RF power where Vp is small, the rectified offset current appearing in the drain is proportional to the square of the RF voltage at the gate source junction, which is proportional to the absorbed microwave power. In terms of absorbed power P~, the induced RF voltage at the junction is given by AI d _ 1 dg m Pa 2w 2 C 2g R i dVg

(3.86)

D

GO gmV9

$ Figure 3.76

The standard hybrid "rr small-signal FET model with an induced RF noise current.

184

3. Noise Issues in High-Performance Mixed-Signal ICs

where Cg is the gate-to-source capacitance, and device input impedance. Finally, from the above last two equations,

Ri

is the real part of the FET

my__ V__~dgm

(3.87)

4 gmdVg" The term gm is given by the expression

O0[1

1/2

I,

(3.88)

where G o is the conductance of the metallurgical channel, discounting the presence of depletion regions; 453 is the PN junction built-in voltage (about 0.6 V); Vp is the pinch-off voltage = N d d2/(8eeo + ~ ) ; Vg is the gate voltage; d is the channel thickness; and N d is the doping concentration in the channel. By taking the derivative of this last expression, we finally obtain

A V = 2co 2C2 Ri

1/2

2 ( q ~ - Vp)(q~B- Vg)

1/2

1-

"

(3.89)

~ - Vg

Operation of this FET device near the pinch-off voltage drives the denominator of this expression toward zero and increases the nonlinearity. Therefore, the amount of equivalent offset voltage increases. This situation becomes more serious with the higher capacitive reactance of the gate junction as its reversed bias is increased.

3.25

RFI Effects in Digital Integrated Circuits

In the previous section, the modified Ebers-Moll model for a bipolar transistor was developed for predicting RFI effects in bipolar integrated circuits. We now show that the modified Ebers-Moll model can be used with SPICE to provide useful information about RFI in bipolar integrated circuits [3]. The basic situation of interest is illustrated in Figure 3.77. Electromagnetic energy incident on the outer enclosure of an electronic system is coupled through the apertures in the skin to the interior of the electronics. The electromagnetic field inside the enclosure will couple and induce RF voltages on the system cables. The RF voltages are conducted to the semiconductor devices such as the

3.25. RFI Effects in Digital Integrated Circuits

185

FI

I I

I

Cable

Susceptible Electronics

I I I I

@

r

I

V

I

L

I I I I

_1

APERTURE I

I

\

Incident Electromagnetic Energy Figure 3.77 Incident RF energy on susceptible electronics.

IC electronics. This scenario is shown in Figure 3.78. The RF voltage induced on a system cable is modeled by the Thevenin equivalent voltage s o u r c e Vgen with impedance Rgen. The bipolar IC is a NAND gate. The case that is being modeled is the one in which the NAND gate input voltages are high and the NAND gate output voltage is low in the absence of RF energy. The RF signal is injected into the output terminal. The electronic circuit analysis program SPICE is used for analyzing ICs and has been used in the past to predict normal IC operation. Most ICs can operate in an ideal environment in which no RFI signal is present. However, in most cases there is no ideal environment, and the IC must operate in the presence of strong RFI. Standard SPICE models can be used for all IC components not affected by RFI. The transistors into which RF is injected are modeled using the modified Ebers-Moll model previously described. The modified Ebers-Moll model is implemented by using the external model function available in most SPICE programs. Similar procedures can be applied to other cases where an RF signal is injected into the terminals of a small-scale bipolar IC. Results show that NAND gate operation can be affected significantly by RF injected into several of its terminals. However, the most susceptible case is that of Figure 3.78, in which an RF signal is injected into the output terminal when the

186

3. Noise Issues in High-Performance Mixed-Signal ICs

GATE

I Thevenin I

NAND

I

Rgen Vin

vnl

V Vn:

Vgen]

Figure 3.78 Modeling noise sources in a gate.

normal output voltage is low (Vout < 0.4 V), which is when both inputs to the NAND gate are high (Vin > 2 V). When both NAND gate input terminals are high, the RF injected noise into the output terminal can cause the output voltage to change from its normal low value (Vout < 0.4 V) to an RF-induced higher value (Vout > 0.8 V). This is the situation that can be simulated using SPICE. Shown in Figure 3.79 is a circuit schematic of an NAND gate (7400). The 7400 NAND gate includes four resistors (R1-R4), four transistors (T1-T4), and three diodes (D1-D3). The dual emitter transistor T1 can be modeled by a single emitter transistor, and the diodes D1 and D2 can be modeled by a single diode Din. The RF interference can be accounted for by assuming that all the incident RF power is absorbed in the output transistor T4. One result is that the standard component models available in SPICE can be used for all NAND gate components except the transistor T4. The transistor T4 is modeled using the modified Ebers-Moll model shown in Figure 3.79. The modified Ebers-Moll model is shown in Figure 3.80. To implement the current-dependent current sources Ife and/re in the modified Ebers-Moll model, current-sensing resistors Re,sens e and Rc,sens e are placed in the emitter and collector circuit as shown in Figure 3.80. The current sources Ife(CeFIF) and IRC(CeRIR) are made to depend upon the voltage drops V12-V13 and V12-V11 across the resistors Re,sens e and Rc,sense, respectively. The result is that Ife = AF(V12-V13) and Ifr - AR(V12-V11), where the values of AF(aF) and AR(aR) are the forward

3.25. RFI Effects in Digital Integrated Circuits

187

NAND --

--

--I

I I

R1

I

> R2

R3 I I

I

,

I I

'


>

1,

(4.69) where y = 0.5772 is Euler's constant. Using this simplification in Equation (4.63) we arrive at the integral equation for the TE excited slot: - - . j _2_km

M y ( x ' ) l n l x - x ' [ d x ' + y+j--~+ In

My(x')dx'

--W

=Hv (x).

--W

(4.70) The preceding integral equation can be solved exactly to yield ,

My(x) = -2

kw

(kw)

zr

"

y + l n - - ~ - - +j-~-

~/1 - (x/w) 2"

(4.71)

A similar narrow-slot analysis can be performed for the TM case to obtain the solution for Mr(x) in the TM case:

M~(x) = j - f kw H~xc (0) + -2 -~x H~ (x)

X/1

--

(X/W)

2 .

(4.72)

x=0

Approximate solutions corresponding to Equations (4.71) and (4.72) but for a narrow slot in a screen separating two different media are available [38]. Far fields can now be evaluated using Equations (4.67) and (4.68). Hybrid Method of Moments for Apertures The method of moments definition and operator notation which was used for wire segments and surfacepatch modeling can also be used for apertures. Following the approach of Harrington, one can define a set of basis functions Mj, j = 1, 2, 3 . . . . . N, and let the surface current over the entire aperture be defined as (see Figure 4.16) N

M(r') = ~

%Mj.(r').

(4.73)

n=l

For an arbitrary shape, aperture Equation (4.73) can be substituted back into the integro-differential (4.53), for the homogeneous case, or into Equation (4.62) for

234

4. Computational Methods in the Analysis of Noise Interference

II

Aperture

I

n Aperture Surface Elements

~k z

0 /

IVl

Aperture Discretization

~

Jth Aperture Element

j.tF"

/

Figure 4.16

Example of modeling surface currents on an aperture.

the two-media (inhomogeneous) case. We can now use a weighting function Wi(r) and perform the inner product with both sides of Equations (4.53) and (4.62). If Wi(r) has the same form as M(r), then we have a Galerkin method. The MOM expression becomes

[Zij ]

[Mj] = [V/],

(4.74)

where m

m

(Wl, L(M1)) (W2, L(M1))

.-. ...

(W~, L(M N))

(4.75)

[Zij] = (WN, L(M1))

.-.

(WN,L(MN))

a2 Ot3

[~] =

(4.76)

.O~N

4.2. The Method of Moments in Computational Electromagnetics

B

235

m

(W 1, H sc (r)) (W 2, H sc (r)> [v~]

=

1

o

(4.77) (WN, H sc (r))

and

2

L(M(r')) = j - ~ (k2 + VtV" )

f

M(r')G(r, r')

d's.

(4.78)

Z

This procedure can also be used for slots using the integro-differential Equations (4.63) and (4.64), or (4.65) and (4.66). The simplification is considerable since now basis function M(r) becomes Mx(x' ) and My(y'), and the Green function becomes Hankel functions; hence, Equations (4.75) through (4.77) are much easier to evaluate. Method of moments problems that involve apertures are much more complex in topology. Consider the electrical geometry shown in Figure 4.17. Figure 4.17

Zwwr~..~~~~ /

wire Segment Modeling

/

A I I I

Zap SurfacePatch Modeling

I

Zpa

alia, 0

I Patch, I a2

Zaa

v

Figure 4.17 Hybrid thin-wire/surface/aperture modeling with the MOM.

236

4. Computational Methods in the Analysis of Noise Interference

is an extension of Figure 4.10, with the addition of an aperture region. Figure 4.17 shows the interaction matrices between wire segments, surface patches, and aperture elements. We have assumed in this example that M(r') in Equation (4.73) can be modeled as square patches of area (Af) 2 of constant magnitude given by the expression [39]

N M(r') = ~

[a'ljalj + a2ja2j]Mj(r'),

j=l where cqj and a2j are constants to be evaluated. Mj(r') = 1 for r' in patch j or 0 otherwise, a lj = a l(rj) and a2j = a2(rj) are position locations for the center point of patch j. The interactions between all the elements in Figure 4.17 will give rise to the impedance matrix of the whole problem Z T. The impedance matrix ZT will have the following interactions: (1) interactions among segments in the wire, (2)interactions among surface patches, (3) interactions among aperture elements, (4) interactions between segments and aperture elements, (5) interactions between surface patches and segments, and (6) interactions between surface patches and aperture elements. Figure 4.17 illustrates these interactions graphically by showing nine submatrices corresponding to each of the interactions involved. The term " w " refers to wire segments, the term " p " refers to patch elements, and the term " a " refers to aperture elements. For example, the submatrix Zpa is made up of elements resulting from the interactions between patch elements and aperture elements, where the patches are considered as the source of scattered fields and the aperture elements are the locations where the tangential components of such fields are computed. The submatrices Zww, Zpp, and Zaa contain the interactions which develop when the sources of scattered and the computation of the scattered fields occur within the wire segments, patches, and aperture elements themselves, respectively. The total impedance matrix [Zij] T can be written as

ww [ wa]

[Zij]T-" Zpw Zpp Zpa . Zaw

Zap

(4.79)

Zaa

The total MOM representation of the problem in Figure 4.16 can be given by

Zpw

Zpp

Zpa

ZawZapZaa

[p

[a

"-

gp .

(4.80)

ga

The calculation of submatrices Zww, Zwp, Zpw, and Zpp was previously discussed

4.3. High-Frequency Methods in Computational Electromagnetics

237

in Section 4.2.3.3. The calculation of submatrix Zaa can be accomplished using Equations (4.75) through (4.77). Submatrices Zwa and Zpa can be calculated from Equations (4.75) through (4.77), but Ei(r) is computed from the scattered fields of the wire segments and surface patches, respectively. Submatrices Z~w and Zap can be calculated from Equations (4.17), (4.21), and (4.23) for Zaw and Equations (4.42) through (4.45) for Zap, but the incident field E i in those equations is the scattered field calculated corresponding to the field generated by the aperture elements and tangential to wire segments and patch elements. For ease in computational purposes, all submatrices in the impedance matrix are calculated independently by assuming that each wire segment, each patch element, and each aperture element have current densities of unit magnitude. This way all impedance submatrices can be calculated before Equation (4.80) is solved for I w, lp, and I a.

4.3

High-Frequency Methods in Computational Electromagnetics

Although the method of moments can be used to solve electromagnetic interference problems where the electrical structures are small in terms of wavelength, high-frequency techniques should be seriously considered when modeling large electrical structures (L > > A; L is the size of the structure to be modeled). High-frequency techniques allow large electrical structures to be "split" into simpler structural shapes that can be modeled more easily. This approach provides tremendous savings for computational purposes, since large structures no longer need to be discretized as in the method of moments (i.e., wire segments, patch elements, aperture elements), but rather can be subdivided into smaller shapes for which models of electromagnetic wave propagation in the presence of such smaller structures already exist. In this section we briefly review the fundamentals of some of the most widely used high-frequency techniques: geometrical optics, geometric theory of diffraction, physical optics, and physical theory of diffraction. One of the most important objectives of this section is to show how high-frequency techniques can be combined with the method of moments in solving a large number of typical electromagnetic interference problems. These "hybrid" techniques will receive special attention in Section 4.3.5. High-frequency techniques can complement the method of moments in analyzing a variety of electromagnetic interference problems. Table 4.2 describes how these two techniques can achieve this cooperation.

238

4. Computational Methods in the Analysis of Noise Interference

4.3.1

G E O M E T R I C A L OPTICS

High-frequency asymptotics of Maxwell equations provide vectorially geometrical terms. Maxwell equations in a homogeneous medium can be written as V2E + k 2 E = 0 V. E = 0

(4.81)

V • E = j wlzH

where k = w(/ze) 1/e is the propagation constant, which becomes larger as frequency increases. For large values of k the electric field can asymptotically be expanded in a polynomial of k-1 using the Luneburg-Kline expansion, co

E(r) = e-J~S(r) ~

( - j k ) -m Em(r),

(4.82)

m=0

where S(r) is known as the phase function and VS(r) points in the direction in which the rays travel. In geometrical optics (GO), we consider the case when m = 0. If we substitute Equation (4.82) into Equation (4.81a) and equate like powers of k, we get

IVS(r)[ 2 -

1

(4.83)

1

[VS(r)] E o = ~ (V 2 S(r)) E o = 0.

(4.84)

Table 4.2 How Method of Moments and High-Frequency Techniques Complement Each Other

Computational Technique

Capabilities

Method of moments

1. Analyzes objects which are small in terms of wavelength 2. Provides numerous types of information concerning radiating elements 3. Can treat electrical structures of arbitrary shape

High-frequency methods

1. Analyze objects which are large in terms of wavelength 2. Incorporate other solutions into their formats 3. Provide very little information about radiating structures (especially wire structures) 4. Only have diffraction coefficients for a small number of structures

4.3. High-Frequency Methods in Computational Electromagnetics

239

From Equation (4.83) it can be seen that the phase velocity of the geometrical optics term is k/w, i.e., the phase variation along the ray equals the path length times k. It also indicates that rays in homogeneous media are straight lines. It can be further shown that geometrical optic fields are TEM waves, that is, the field vectors are perpendicular to the direction of ray propagation and E and H fields are perpendicular to each other. Solving Equation (4.84) for the wavefront in Figure 4.18, which consists of a Gaussian curvature, we obtain Eo(ro) = Eo(o'o) exp

[lS -~

]

V2 S(r) do- ,

(4.85)

where o-is the arc length at observation point Po as shown in Figure 4.18, and the term within the integral is given by

72 S(r) --

1 pl - o-

-t--

1

(4.86)

p2-F or'

where p~ and P2 are shown in Figure 4.18 and E 0 implies E m of Equation (4.82) for m = 0. Substituting Equation (4.86) into Equation (4.85), we obtain

1/2 EG~

[

/91/92

= E~~176 (Pl + ~

+ o-)

]

e -jk(S(ro)+ ~

(4.87)

where we have added in Equation (4.87) the phase variation with r being the position vector of P0 and r 0 being the position vector of O. Figure 4.18 shows the field strength varying inversely proportional to the o-of the sectional area in a matter dictated by Equation (4.87). Notice that at o- = - P l and o- = -P2, the sectional area vanishes and the field intensity seems to be infinite; these are

a=lOPo I

\

pl

\

\ \ \ Figure 4.18

Geometric optics ray tube.

240

4. Computational Methods in the Analysis of Noise Interference

called caustics. In Equation (4.87) the positive branch of the square root is chosen. Therefore, if Pl,2 < 0 and o- > -IP21 or o- > -]Pl [, then a caustic is crossed and (P2 + o-) or (Pl + o-) changes in sign within the square root so that a phase jump occurs at 7r/2. 4.3.1.1

The Incident Field

In considering the incident field, we first need to evaluate Figure 4.19a, where incident rays illuminate an impenetrable surface. Part of the rays are reflected from the surface, whereas others create a boundary between the illuminated region and the shadow region. This boundary is known as the shadow boundary,

Reflected Rays

Incident

J

/t

(a) \

~/\

Wedge Re

-

-

Shadow Region

it Region

I

\

-

(b) Incident Ray,,

Smooth Convex Surfaces Figure 4.19

Shadow boundaries: (a) incident shadow boundary; (b) surface shadow.

4.3. High-Frequency Methods in Computational Electromagnetics

241

and GO predicts the presence of no fields in the shadow region. There are two basic types of shadow boundary: the incident shadow boundary, as shown in Figure 4.19a, and the surface shadow boundary, which is associated with smooth, perfectly conducting convex surfaces, as shown in Figure 4.19b. Equation (4.87) can now be rewritten to represent the incident field as

Go E(Pil + ~ 2

= E~ (r~

+ ~

]

1/2

e -jk(s(r~ ~ ,

(4.88)

where " i " denotes "incident" quantities. Notice that for plane-wave illumination, f;1 = P'2 = oo and Equation (4.88) reduces to EiC;O(r) = EoCoi~

The magnetic field HiC~

is simply given by H~~

1 = -~0(~i • EiC~

(4.89)

where Z 0 is the wave impedance of the medium.

4.3.1.2

The Reflected Field

The reflected GO field is discontinuous across the reflection shadow boundary for edge-type structures as in Figure 4.19a, whereas in convex surfaces the incident and reflected shadow boundaries merge into the surface shadow boundary in Figure 4.19b. GO reflected fields vanish at the surface shadow boundary and also within the shadow region. The GO field associated with the reflected rays can be expressed as 1/2

E~~176

( ~ + trr)(fF2 + o r)

e -jk(~

(4.90)

where Pr is the point of reflection at the surface as shown in Figure 4.20 and Po is the point at which the field is to be calculated ( " o " for observation point). The other parameters are shown in the figure. The reflected field ErG~ is related to the incident field Ei~~ 0 at the reflection point Pr by the boundary condition n x [Eic~

+ Erc~

] -0,

(4.91)

242

4. Computational Methods in the Analysis of Noise Interference

~ rl \

J

P2

r

Figure 4.20

Reflection ray tube.

where n is a unit vector normal to the surface at Pr" Using the relationship between incident and reflected fields as shown in Equation (4.91), we can then say

ErC~

= Eic~

R

[

( ~ + O.r)(~ + Or)

]

1/2

e -jk~

(4.92)

where EGO(Pr) was defined in Equation (4.88) (substitute r o for Pr in the equation) and R denotes the dyadic surface reflection coefficients at Pr-

4.3. High-Frequency Methods in Computational Electromagnetics

243

The associated reflected magnetic field HGO(Pr) can simply be given by HrC~

1 = Zoo O'r

X

Er~~

(4.93)

It can be shown [40] that R can be simplified to a simple diagonal form if the fields are expressed in terms of an appropriate set of unit vectors which are fixed in the incident and reflected rays as shown in Figure 4.21. This transforms Equation (4.93) into the separable form

[1~ E ~ ~ (Po)J

]l,: -1

e-Jkcrr'

( ~ + O'r)(f~2 + Or)

EiG~ (Pr)

where EGO(Pr) -- Eill GO(Pr)el" + Eii/(Pr)e] E~~

ell i

13'

+ Eirl Po)e~

= E~~

ell r

I I I I In

Pr

Figure 4.21

Unit vectors for reflection problem.

(4.94)

244

4. Computational Methods in the Analysis of Noise Interference

as can be observed in Figure 4.21. If we further assume that the incident field is a spherical wavefront, it can be shown that (p~,2)_l = ~-i+l

1

COS /~i

[sinZO2+sin2Ol_T_ ~ R1 R2

(4.95) 1 COS 2

[sinZO2+sin201]2 /~i R1 R2

4 R1R2 '

where o-i, /~i have been previously defined, R 1 and R 2 constitute the principal radii of curvatures of the surface at Pr, and 01,2 are the angles between O"i and ul and u2, respectively (see Figure 4.22), where ul,2 are known as the principal surface directions at Pr- A more general formula for (P],2)- 1 (i.e., besides spherical wavefronts) is given in [41]. We can conclude that the total GO electric field at Po in the illuminated region is basically the sum of the incident and reflected ray fields:

ET~~

= Eic~

+ Eic~

[

R (~

+

/0~1~2 ] -jk~ O.r)(~2 -4- Or) e .

(4.96)

Similarly, HTGO(Po) = Z00er 1 i • E G~

(4.97)

txn=b

Ul 02 b

u2

~

k9' ~ ~ Z ~ - - - - ' . " " ~ V / " "

ai

Pr

Figure 4.22

Geometric description of wavefront reflection from a convex surface.

4.3. High-Frequency Methods in Computational Electromagnetics 4.3.2

245

G E O M E T R I C THEORY OF D I F F R A C T I O N

The geometric theory of diffraction (GTD) is a systematic extension of classical geometrical optics which was proposed by Keller [42] to describe the phenomenon of diffraction at high frequencies in terms of diffracted rays. Besides the usual rays, which are part of physical optics, diffracted rays are introduced. The need to introduce diffracted rays in addition to the incident, reflected rays which are present in geometrical optics is caused by the following: 1. For impenetrable obstacles, the GO rays do not exist in the shadow region (behind the obstacle). 2. The GO field is incorrect at the incident and reflection shadow boundaries (SB) where the GO incident and reflected fields will vanish; hence, highly discontinuous field behavior is observed. Because GO does not provide a solution in the shadow region, Keller developed the principles of diffracted fields, which can entirely account for the fields in the shadow region. Diffracted fields obey the generalized Fermat's principle. We can now propose that the total field (ET, HT) at a point Po in space consists of a superposition of the GO fields (incident and reflected) and the fields of all possible diffracted rays which can reach the observation point Po, that is, E T = E~ ~ + E GTD

(4.98a)

H v = H~ ~ + H GTD,

(4.98b)

where E~ ~ and H~ ~ are defined by Equations (4.96) and (4.97), and E Gyp and I-IGTD refer to the corresponding diffracted ray field components as derived by Keller's GTD. In this section we will briefly review the development of expressions for E GTD and H GTD. To better understand GTD, we must first outline three basic principles (as outlined by Keller) which all diffracted rays hold. 1. Diffraction of rays is a local phenomenon at high frequencies; hence, to study the diffraction that may occur in a complex, opaque, perfectly conducting object, we only need to look at a limited number of diffraction points on the surface of the object. 2. Diffracted rays satisfy the generalized Fermat's principle; hence, rays which are diffracted by a line of discontinuity as shown in Figure 4.23 will lie on a cone centered on an imaginary line which is tangent to the line of discontinuity. The cone half-angle/3 o is the same angle that

246

4. Computational Methods in the Analysis of Noise Interference 0

Diffracted Rays

Ah~

Line of Discontinuity

Tangent to Line of Discontinuity

Incident Ray

Figure 4.23

Diffracted rays from a discontinuity.

the incident ray makes with the imaginary line tangent to the discontinuity at the diffracted point. Furthermore, this principle guarantees that rays impacting a geodesic surface will shed along forward tangents, giving rise to surface-diffracted rays as shown in Figure 4.24.

i RSB Reflected Rays

I

I EdgeDiffraction I

ISB

Incident Rays Body

Surface-Diffracted Rays

ji

Reflected Rays

P1

Figure 4.24 Rays incident on a geodesic surface.

4.3. High-Frequency Methods in Computational Electromagnetics

247

3. At distant points from the diffraction point the fields behave as GO fields. Let us now consider the general form of GTD diffracted fields associated with diffraction edges, convex surfaces, and vertices.

4.3.2.1

(EGTD,H GTD)

Diffraction by Edges

Consider the perfectly conducting wedge illuminated by a source as shown in Figure 4.25. The total field E v at point Po outside the wedge is given by ET(Po) = EG~ where E~~

+ EGTD(Po),

(4.99)

can now be defined as ETG~

= EiG~

t~i + ErG~

Or,

where EiG~ and ErG~ (defined by Equations (4.88) and (4.92)) exist only in the illuminated region, and 0i and 0r are step functions for the incident and reflected fields. The step functions are used to identify the regions where Ep ~ ErG~ exist. In the case of the wedge, 0i and 0r are defined by (see Figure 4.25)

tgi=

}

if 7r + ~bi < ~b < nTr

4.,OOa, Source

~dent

Ray~ ~

Po DiffractedRay f f

n~

Figure 4.25 Side view of edge-diffracted ray.

248

4. Computational Methods in the Analysis of Noise Interference

and 0i =

if ~ + ~bi < ~b < n

)

"

(4.100b)

The diffracted fields E GTD exist everywhere exterior to the wedge in the region 0 < 0 < n 7r. The diffracted rays reside on a "cone" about the edge as previously described in Figure 4.23. Away from the edge, E cTD behaves as a GO field. It can be shown, using the illustration presented in Figure 4.26, that the diffracted fields can be expressed as k (~, ~1,9 ~o, k) o.ed(ped nt- o.ed) EeGTD(No) ~ EicO(Pd).Ded

e -jko-ed,

(4.101)

where Ded(~b, ~b', flo, k) is the dyadic edge diffraction coefficient. This parameter outlines how the energy is distributed in the diffracted field as a function of angles

&n

i

~

I

\\

Pd

ped

Figure 4.26

Edge-diffraction ray tube.

4.3. High-Frequency Methods in Computational Eiectromagnetics

249

~b, ~b', and/3o- The dyadic also depends on k. ped is the edge-diffraction caustic distance; O "ed is also defined in Figure 4.26. The magnetic field is given by 1 O"d HGTD(p~ ~ Z0 X E eGTD(Po)"

4.3.2.2

(4.102)

Diffraction by Convex Surfaces

Consider now the perfectly conducting convex surface of Figure 4.27, which is illuminated by a source. As for the case of a wedge, the total field ET at point Po outside the surface can be expressed as

EGO(pL) 0i -4- E GO r (PL)0r -+- EGTD(PL) ET(Po) =

E

GTD (PsH)

if Po = PL, the illuminated] region ifPo = PSD, the shadow / region j

Notice that t~i = t?r = 1 if the illuminated region is above the shadow boundary, or t~i = t~r = 0 if the illuminated region is below the shadow boundary. It can be shown, using Figure 4.28, that the surface diffracted fields r~ s , s for surface) can be expressed as k EsGTD(Po) ~-- EGO(p1) " Dsd(P1,P2) e-jkd

3W(P2) J

4103

o'sd(p sd + 0 "sd)

e -jk(rsd,

where ~W(P1) and ~W(P2) refer to the widths of the surface-ray strips at P1 and P2, respectively (see Figure 4.28). The term [SW1 / 8Wz]e -j~a indicates the energy

Caustic of Surface Ray

oJ P2

Po

P1

Scatterer

Incident Wavefront

Surface Ray

Figure 4.27

Scattering from a convex surface.

Source

250

4. Computational Methods in the Analysis of Noise Interference (b)

Po

9 Reflected

IlluminatedRegion SSB ShadowRegion

~

Ray

/ ~

......~irect Ray

~

Ps

1~

/ n

dim

[

(3"i -

~ P2

P1

Pr a

/

Scatterer ......_

Figure 4.28

~ Incident

~

Source

Surface-diffracted ray tube.

flux in the surface-ray strip from P1 to P2- The term e - j k d represents the phase delay along the surface-ray path. Notice that because the rays propagate forward on the surface, in a matter tangential to the surface-ray paths giving rise to surface-diffracted rays, that energy is lost from these surface rays and the ray fields attenuate. The term Dds(P1, P2) is the dyadic matrix for surface-ray fields at P1 which also account for the amount of diffraction on the surface-ray field from P2- The magnetic field is given in the usual fashion. The t e r m s psd and tr sd are defined as before and shown in Figure 4.28:

HGTD(p~ = Z1 trds X EGTD(Po). 4.3.2.3

(4.104)

Diffraction by Vertices

Consider the perfectly conducting corner in Figure 4.29. A ray which strikes a perfectly conducting vertex produces a continuum of diffracted rays emanating from the vertex in all directions, as shown in the figure. In a matter similar to edges and convex surfaces, diffraction by a vertex ,---v w cTD, v for vertex) can be represented in the form e

EvGTD(Po) -~ EiGO(Pv)9 Ddv(O.i, o.d,k)

--Jktrd O "d

'

(4.105)

where Ddv(O-i, o-d, k) is the dyadic diffraction coefficient for a vertex. It describes the way in which the energy in the incident field Eic~ is distributed in the

4.3. High-Frequency

Methods in Computational Electromagnetics

251

n \

\ \ O" d

Pr

Pv Corner Reflector

Figure 4.29

Corner-diffracted ray tube.

diffracted rays. Odv depends on the angles of incident, diffraction, 0 5, 0 "d, and on the wave number k. Again the associated magnetic field is given by

HGTD(p~ ~Zo1 4.3.3

~d

• EGTD(p~

(4.106)

UNIFORM GEOMETRIC THEORY OF DIFFRACTION

In Equations (4.101), (4.103), and (4.105) we did not define the expressions for Ded, Dos, and Day. We now need to address this issue. In its original form, the GTD is a purely ray optical technique, but it fails at and near caustics. The

252

4. Computational Methods in the Analysis of Noise Interference

modification of GTD which is required to calculate fields near the caustics of diffracted rays is described in [43] in terms of the method of equivalent currents, which indirectly employs the GTD to calculate these currents. The failure of the purely ray optical GTD field description at and near the shadow boundaries results from the fact that within these regions the dominant character of the true diffracted field must change rapidly but continuously from a purely ray optical field behavior outside the transition regions to a behavior which allows one to compensate for the discontinuities in the GO field at the shadow boundary such that the total high-frequency field remains continuous at these boundaries. To accomplish such a task, the diffraction coefficients and other GTD parameters cannot be allowed to be range independent, that is, the field description has to depart from a purely ray optical one. The uniform theory of diffraction (UGTD) [44] accomplishes this task in a simple and accurate manner, and it employs the same ray paths as in GTD. Thus, the uniform GTD field departs from the purely ray optical character to yield a bounded and continuous total field across the shadow boundary transition regions, whereas exterior to these transition regions it automatically reduces to the purely ray optical GTD field description. 4.3.3.1

Uniform Diffraction Coefficients for Edges

Consider Figure 4.30, which contains the diffracted distribution representation around Keller's cone. Using Figure 4.30, Equation (4.101) can be rewritten in matrix form as

E ~ TD =

0

_Duds

[E(t;TDb i _.]l o.ed(ped _[_ o.ed)

e -jktred,

(4.107)

where E~ TD and E~ TD are the orthogonal components of the uniform diffracted field. E~ ~ and E~ ~ are the orthogonal components of the incident field EiG~ as described in Figure 4.30. The "uniform-diffraction-surface" coefficient Dud s is given by [45,46] and stated here as e -J Trl4

Duds(qS, q~i,/~i) ___ -2n2X/~sin/~i

cot( +0i_ 0 + cot(~r- (~-

4,i)/an) 9F [ L i ~ a - ( ~ -

~i)]

,

(4.108)

+_ [cot(77" + (~ -4- ~ i ) / 2 n ) f [ L r n k a + (~) + ~i)]] + [cot(Tr-- (~b +

~)i)/2n)F[Lr~

+ ~bi)]]

where

a-V-(fl) = 2 cos2[(2nTrN T- - fl)/2]

(4.109)

4.3. High-Frequency Methods in Computational Electromagnetics

253

Keller's Cone

f (a) El3d

Diffraction

~lp~,

Plane

. El31 Plane

(b) .,,,.

RSB ..._

....,-

..._....-.-

ISB (;ed = nx

~ Diffraction I Edge

Figure 4.30

Geometry for uniform scattering from a convex surface.

and N + are the integers which satisfy the equation 2n ~" N -v- - ( ~b -T- ~bi) = -T- ~fl = ~b + ~bi.

(4.110)

n defines the exterior wedge angle as in Figure 4.30; hence, n = 2 for a 3

half-space, n = ~ for an exterior right-angle wedge, etc. The two faces of

254

4. Computational Methods in the Analysis of Noise Interference

the wedge are referred to as the " 0 " face for ~b = 0 and the " n " face at ~b = n rr, respectively, as shown in Figure 4.30. For spherical wave illumination on a straight wedge, L r~ = L rn = L i =

oio "d o -i + o -d sin 2 /~i,

(4.111)

where O"ed are defined in the figure. The function F[x] shown in Equation (4.108) is the Fresnel integral defined by oo

F(x) = 2 j ~ x e jx f e -j~'2 d T". v~ 4.3.3.2

(4.112)

Uniform Diffraction Coefficients for Vertices

A vertex can be formed by the truncation of at least two edges; often it is the truncation of several edges. Consider Figure 4.32, which shows a right-handed vertex in a perfectly conducting planar plate. The uniform diffraction coefficient to be used in Equation (4.105) is given by [47] _

Duav-.

e -j'rr/4

_/=---7Cuav(PE)

V Zc/'k

X/sinfll COS ]32

--

sinB: COS 181

F[kLca('rr+ r 2 - ill)i-

o" ~

Source Point

~C

Planar

Corner

PE

',ll ~

~ Receiver

132 Figure 4.31

Point

Geometry associated with comer diffraction problem.

(4.113)

4.3. High-Frequency Methods in Computational Electromagnetics

(a)

255

bl n1

I

n2

P1

b2

P2

(b)

Po Q

/

,q~~. ReflectedRay

irect Ray ~

IlluminatedRegion

! /

o i

SSB

ShadowRegion

P2

P1 Pr

Ps

o

Scatterer ..._._ ~

i~

Figure 4.32

\ ~, ~

Source

Geometry for uniform scattering from a convex surface.

For the case of a comer in planar geometry, Cudv is given by e-J Tr/4

2Xf27rk s i n / ~ i

Cudv(PE) --

f[kLa(~)

I

~

(j~i)] El kLa(ltb + (]~i)/2,~ 1

+ F[~Ca(4, + 4'1)] F[ -

~(4'

~ + 4;)/2 ~r

"

(4.114)

256 Again

4. Computational Methods in the Analysis of Noise Interference

F(x)

is the Fresnel integral; L c and L are defined as ~o~rc + or'

LC

0 "v 0 "

L = o-' + o" sin2 fl'; and a(4) -

4.3.3.3

~bi) = 2 cos2(~b __ ~bil2).

Uniform Diffraction Coefficients for Convex Surfaces

A uniform GTD solution for the diffracted coefficients Dud s in Equation (4.103) is given next for the surface scattering shown in Figure 4.32. In Figure 4.32a, t I and t 2 are unit vectors in the direction of ray incidence at locations P1 and P2. The terms n 1 and n 2 are unit vectors to the surface at PI and P2, and bl and b 2 are such that b l = t~ • n 1, b 2 = t 2 • n 2. Notice that when there is no torsion K on the surface, bl = b2. The , 'uniform-surface-diffraction coefficients" Dus d in Equation (4.103) can be given by [45,46]

~

e-J'rr/4

DusdK = -- N/m(P1)m(P2)

2~/~

] { 1 - F (x d) + P(sr) } (4.115)

1/2

8W(p2)

e

,

where P ( ( ) is a Fock-type surface-reflection function given by

P(f) - e-J~/4 i

QV('r)

QW2(T)

e-J'~rdz,

(4.116)

--oo

where Q = 1 for the soft-surface case and Q = 0/0r for the hard-surface case. The terms V(r) and Wz(z) are known as the Airy functions and are given by

2iV(T) = Wl('r)

W l ( 7 " ) -- W 2 ( T )

_ ~1 i

e -j277"/3eft-

t3/3dt

--co

Do

_

1

f e j2 77"/3ert- t3/3dt --oo

4.3. High-Frequency Methods in Computational Electromagnetics

257

The other terms of Equation (4.115) are defined as P2

m(t') dt' ( = f O-g(t') P1

xd =

kL(0 2

2m(P1)m(P2) o-io -d

L = ~ i + ~ d. For spherical wave illumination, P2

t = f dt', PI

where O-g(-) is the surface radius of curvature at P1 or P2 and O"i, Ord are shown in Figure 4.32b.

4.3.4 PHYSICAL THEORY OF DIFFRACTION In our previous work concerning geometrical optics and diffraction theory, we have treated scattering problems using a " r a y " approach which, as previously stated and derived, is a good approximation for modeling scattering fields at large frequencies. Notice that none of these approaches requires the calculation of current distribution on the surface of the scatterer (induced by an incident field) as a means of obtaining the scattered field. Such an approach would require the method of moments, which would be highly inefficient at high frequencies due to the extreme sizes of the impedance matrices involved. Such problems would require considerable computational resources in terms of memory and speed. Physical optics (PO) and the physical theory of diffraction (PTD) are somewhat of a "bridge" between MOM and high-frequency asymptotic tech-

258

4. Computational Methods in the Analysis of Noise Interference

niques (GO/GTD/UTD). PO/PTD are also high-frequency techniques that use a ray approach for calculating scattering fields; hence, they also use diffraction coefficients, but differ from the other high-frequency techniques in that the diffracted fields are computed based also on current distributions. PO/PTD differ significantly from MOM in that the current distribution is not modeled on the whole scatterer (as in MOM); rather, the only current distribution of significance is that which is present at the scattering "centers" in the scatterer, of which the edges are the most significant. Consider Figure 4.33, where a source of electromagnetic energy illuminates a scatterer surface which is perfectly conducting. The total field can be expressed as a superposition of the incident fields E i, a i and the scattered fields (E s, I-IS), which are scattered by the surface S. The total electric field E(r) at a point Po (observation point) exterior to S is given by Ev(r ) = Ei(r) + ES(r),

(4.117)

where ES(r)

-~

fR•

R • Js(r')e-Jl'RR d's.

(4.118)

S

Source

~

z Scatterer

R= Ir- r' I

r'~ W

-~

. . . .

Observation Point

~

0

Y Figure 4.33

Geometry associated with PO/PTD fields.

Po

F-'i+Es

4.3. High-FrequencyMethods in Computational Electromagnetics

259

Similarly, the total magnetic field H(r) at Po is given by HT(r ) = Hi(r) + HS(r)

jk f R • Js(r') e-JkR 417" R d's.

HS(r) -

(4.119) (4.120)

S

Js(r') in Equations (4.118) and (4.120) is the induced current density at r' on S, and d's is an element surface area at r'. R is the vector between d's and Po as shown in Figure 4.33. For near fields it would be necessary to include terms which depend on R -2 and R -3 within the integrals. In physical optics (PO) the radiation integrals in Equations (4.118) and (4.120) are calculated by employing a GO approximation for the currents induced on S; hence, Js(r)~

j6o; r,

s ~ ) =

{~n'xHi(r)

on the illuminated region on the shadow region of S.

Substituting this last expression into Equations (4.118) and (4.120), we can obtain the total expression for the physical optic field E P~ and ttP~ EP~

= EiG~

+ JkZ~ - ~ f R • R • [2n' • H i] e-YkR d's R

(4.121)

+ ~jk f R x [2n' x H i] e-JkR d's. R

(4.122)

S

HP~

= H~~

S

As can be seen from Equations (4.121) and (4.122), in PO techniques the currents which are induced on the surface of the scatterer are approximated using GO. However, it is obvious from our understanding of GO that such approximations are only valid in the area of the scatterer that is well illuminated by the source. In the shadow region, GO would yield zero for the induced surface current. The GO approximation for the surface current will also yield erroneous results in the transition regions between the shadow and illuminated regions. In the Physical Theory of Diffraction (PTD) approach, the GO current approximation is improved by including a correction which Ufimtsev [48] declared to be a "nonuniform" component of the current. These components would account for the insufficiencies present in the GO current approximation of the surface current. In his original work Ufimtsev developed these "nonuniform" components of the current only for smooth perfectly conducting surfaces with edgetype discontinuities. He neglected the effects of rays on convex surfaces. Ee~ HP~

= EiC~ = Hi~~

+ E PO s (r) PO

+ H s (r),

(4.123) (4.124)

260

4. Computational Methods in the Analysis of Noise Interference

where E PO s (r) and H PO s (r) are the second terms of Equations (4.121) and (4.122), respectively. Ufimtsev's PTD consists of adding a diffraction "correction" term Edf, ttdf ( " d " for diffraction, " U f " for Ufimtsev) to expressions (4.123) and (4.124). We can then say mathematically that Eem(r) = EiG~

+ EsPO (r) + Edf(r)

(4.125)

PO

HPTD(r) = HiGO(r) + H s (r) + Hdf(r).

(4.126)

It is important to realize that Edf(r), Hdf(r) represent only corrections to the edge diffraction field predicted by PO. Since Edf(r), Hdf(r) are ray optical fields, they become singular at the caustics of edge-diffraction rays; hence, it is more useful to express Edf(r), Hdf(r) in terms of equivalent edge currents as shown in Figure 4.34. Thus, Eric ~. jkZo 47r H~f ~ ~

jk

R X R X Ie (f')s + Y0R x Mdf')e '

R

L

[

.J R x Ie(f')e' - Yo R x R x Me(f')r

]

dr'

e-Jl'RR d~',

(4.127a)

(4.127b)

L

~i

oi ~

(Ei, Hi) Gd(l'

dl' IRI = I r - r'l

r=e / /

,'

"

I Edge Contour

Figure 4.34 Geometry associated with equivalent edge currents.

Po

4.3. High-FrequencyMethods in Computational Electromagnetics

261

Here, Ie and Me are Ufimtsev-type electric and magnetic edge currents on the edge contours given by the expressions

e-J'rr/4]

[U " Ei____(~')]

uf

"

~ i n fli sin fl DpTD (~b, q~l, ill, [~)

(4.128)

-1 e - j 77"/4/ _1 [u" Hi(~')]

N/sin B i sin B

(4.129) Dr~ D (~b, ~bi, /~i, /~),

where Uf D = Dds(#9 ' ~bi,/~i , fl) -- D PO " /3)" DpT ds (~b, ~1,9 B',

(4.130)

The first term of Equation (4.130) can be evaluated from Equation (4.108). The term D~~ is given by DdPO($, $i, fli, ~) = e -j ,rr/4

1

{tan( : i)

2X/2,rrk sin ]~i e -j'rr/4 1 { + (~b +- +~bi) 2 2"V/2,rrk sin fli _tan

e

1 {

,2X/2crk sin ~i

--tan

2

-+tan(~b+~bi)}2 tan( 2 n ~ - (~b 1 +2 ~bi))

(4.131)

_+tan(2n'n'-(q~+ qg))} 2

In Equation (4.131), the ~b = 0 face is illuminated (first expression); the second expression means both faces are illuminated; and the ~b = n ~ face is illuminated for the third expression.

4.3.5 HYBRID MOM/GTD METHODS IN ELECTROMAGNETIC COMPATIBILITY One classic electromagnetic interference problem consists of the analysis of current distribution in wire-type elements such as cables, dipole antennas (and other wire antennas), and microstrip lines which are attached to large (with respect to wavelength) structures, most of which are three-dimensional. At higher frequencies, whether wire grids or surface-patch representations are used, the modeling of both wires and structures explicitly using MOM may require

262

4. Computational Methods in the Analysis of Noise Interference

significant computer capacity, which will make the solution of the problem cumbersome. The method of moments is a low-frequency technique, since its practical use is generally restricted to bodies that are not large in terms of the wavelength. On the other hand, geometrical optics, the geometrical theory of diffraction, and the physical theory of diffraction, which are known as highfrequency techniques, cannot provide the level of detailed analysis that is sometimes needed in electromagnetic problems, such as near fields, antenna impedances, and current distributions. Both MOM and GTD are powerful computational methods in their own right. Both have inherited flexibility in a wide range of radiation and scattering problems. In this section we review a useful technique for combining the MOM and GTD for the solution of electromagnetic interference problems. In an effort to take advantage of both MOM and GTD capabilities, a "hybrid" technique is developed. To do this, we consider the more general problem of how to extend the method of moments to include a class of problems in which a threedimensional body, on or near which a radiating element is located, may be analyzed. The "core" in this MOM/GTD hybrid technique is to modify the impedance matrix, which in the MOM considers only the radiating portion of the problem, to properly account for the remaining of the problem to be solved. The MOM/GTD hybrid herein described is based on the work of Thiele and Newhouse [49] and Burnside, Lee, and Marhefka [50]. As previously stated in Section 4.2.3.1, the surface current Js is expanded into a series of basis functions J1, J2, ,13 .... on the surface of interest and defined in the domain of the L operator. We can express ,Is as N

cejJj

Js = ~

(4.132)

j=l

where cej are the unknown current coefficients to be found in the MOM. Since the L operator is linear, we can form an inner product with Equation (4.132) using weighting functions W~, W2, W3 . . . . WN to obtain N

a: (W/, L(J:)) = (W~, Ei).

(4.133)

j=l

This expression represents the jth row in a system of N equations. The term L(Jj) represents the electric field from the jth basis function of unit amplitude. Equation (4.133) can be represented in matrix form as

[Zij][Jj] where

Zij is the

= [V/],

generalized impedance matrix

Zij

(4.134) = (W/,L(Jj)).

4.3. High-Frequency Methods in Computational Electromagnetics

263

Because of the linearity of the inner product in Equation (4.134), we already know from Equation (4.135) that

: ~(J1, E> -Jr- ~(J2, E> (J1, E) = (E, J1) (JT, J1) > 0 if J1 4 : 0 (JT, J~) = 0

if

(4.135)

J1 = 0.

Using Equation (4.135) it can be shown that (J, aE 1 + bE2) = a(J, El) + b(J, E2),

(4.136)

where a, b are complex scalars. Suppose that in Equation (4.136) the term aE~ represents L(Jj) in Equation (4.133), and the term bE 2 represents an additional field contribution to Z 0 that is also due to Jj but arrives at the observation point i by a physical process which is not related to the method of moments formulation. We can then write the new impedance matrix as

ZU. - <Wi, L(Jj)) + <Wi, bL(Jj))

(4.137)

Z~j-- <Wi, g(Jj)> nt- <Wi, bL(Jj)>

(4.138)

Zb = Zij + Z g.

(4.139)

or

or

where the superscript " g " denotes that Z } is an additional impedance added as a result of physical process " g " that also contributes energy from the jth basis function to the ith observation point. Thus, we may modify Equation (4.134) as [Z,j!.l[lj] - [V~],

(4.140)

where [Z b] is the generalized impedance matrix which has been modified to account for the new process which is not part of the moment method formulation. The method of moments represents only a portion of the overall problem. The solution of Equation (4.140) can be written as [/jl-

[Z~1-1 [V~I.

(4.141)

Consider now the situation in Figure 4.35 where a monopole of height h is a distance dl away from a right-angle structure. The current [/j] in Equation (4.141) will also account for GTD scattering. In Figure 4.35, to properly determine the term Z g. it is necessary to establish all the various combinations of

264

4. Computational Methods in the Analysis of Noise Interference

Q Observation Point

Radiating Antenna \

I

\ \

/

I /

/ /

12

Z12,4

Structure Figure 4.35 Hybrid MOM-GTD problem.

reflections that occur for rays emanating from the monopole and reflected back to it, as well as the diffraction from the top edge of the structure. Using GTD, Equation (4.139) can be replaced by Zij, = Zij + ZijGTD9

(4.142)

In Equation (4.142), the impedance matrix -7.GTD is the impedance matrix modifiij cation associated with the radiation from the current elements Jj, scattered by the structure in terms of GTD mechanisms and received by the current segment i. Since the MOM current samples are only needed for the smaller structure, such as to represent a wire radiator, one can treat large objects using relatively few unknowns. In the MOM/GTD problem of Figure 4.35, each MOM element also interacts with the other MOM elements via GTD reflections, diffractions, etc., from the structure. These additional ray paths comprise the GTD portion of the interaction matrix. For elements 12 and 4, the term Z GTD 12,4 will be generated on the basis of the GTD interactions shown in the figure, as well as other GTD interactions not shown to reduce the clutter, such as double plate reflections and edge diffraction, then plate reflection. The total effects of the MOM and GTD portions of the problem are then added together to form the complete MOM/GTD interacting matrix given by Equation (4.142).

4.4. The Finite-Difference Time Domain

265

In the case of the excitation vector u (radiation problem), the division between MOM and GTD can be made on the basis of source type. Voltages are generated by MOM physics as they excite the MOM part of the structure directly; hence, u is identical to the voltage excitation vector performed for MOM-only problems. Field sources must interact with the structure and therefore must be computed with GTD techniques. We can then conclude that the total excitation vector V( is given by V( ~- V i @ V GTD.

(4.143)

The MOM/GTD method can be quite useful in electromagnetic interference applications, which often require the analysis of small EMI sources in the presence of large structures. For example, a UHF antenna mounted along the centerline of an aircraft can be represented by only a few unknown current samples, whereas the aircraft scattered fields can be represented using GTD solutions. It may have been obvious to the reader that the hybrid MOM/GTD method is a very powerful technique. However, MOM/GTD hybrid methodology can only be applied if appropriate GTD solutions are available. For example, the hybrid MOM/GTD method cannot be used for analyzing the antenna behavior of a monopole mounted on a ground plane terminated in a curved surface because no GTD solutions exist for such a surface. It is important for the electromagnetic interference engineer to realize that a MOM/GTD hybrid problem should always be modeled using geometries for which GTD solutions are available and it may be necessary to "convert" (when possible) the real geometries of the problem to one for which GTD solutions exist, even though the obtained results from the modeling will only yield approximate solutions. This point is illustrated in Figure 4.36.

4.4

The Finite-Difference Time D o m a i n in Computational Electromagnetics

4.4.0

INTRODUCTION

For an electromagnetic interference engineer accustomed to working with EMI problems of complex topology, the first sign of relief when using finite-difference time domain (FDTD) methods is that there is no need to develop a Green function or to manipulate and store large impedance matrices (as in MOM), nor is there a need to use complex diffraction coefficients for analyzing field propagation in

266

4. Computational Methods in the Analysis of Noise Interference

Observation Point \

I

\ \

/

/

/

I/

/

Radiating Antenna

Approximate Boundary Structure Figure 4.36 Tailoring a problem for use of MOM/GTD techniques.

the presence of large (compared to wavelength) unusual geometries (as in GTD/ PTD). Furthermore, FDTD is an excellent technique for dealing with penetration problems (very common in electromagnetic interference) involving structural apertures, curvatures, corners, etc. Finally, FDTD is very versatile in dealing with a variety of media with several degrees of permeability and conductivity. FDTD does have its deficiencies, which were addressed in Table 4.1. The material presented in this section is based on the pioneering work in this field by A. Taflove and K. Umashankar [55-57]. Other references will be cited as we proceed through this section. The reader is advised to consult such references for a more in-depth study in FDTD. The finite-difference time domain method is a direct solution of Maxwell time-dependent curl equations. The objective is to model the propagation of an electromagnetic wave into a volume of space containing dielectric and conducting structure. Time stepping is performed by repeatedly implementing the finitedifference curl equations at each cell of a previously developed space lattice. The incident wave is tracked as it propagates through the structure and interacts with it via surface current excitation, diffusion, penetration, and diffraction. An FDTD solution to the problem is achieved when a sinusoidal steady-state behavior is achieved at each lattice cell. The time stepping for FDTD is accomplished by a finite-difference procedure developed by Yee [58]. In Yee's procedure the space lattice is three-dimensional

4.4. The Finite-Difference Time Domain

267

(x, y, z) and is subdivided by cubic cells. Yee's procedure involves positioning the E and H components about a unit cell of the lattice as shown in Figure 4.37. E and H are then evaluated at alternate half time steps. Using this procedure, centered difference expressions are used both in space and time derivatives to obtain second-order accuracy in space and time increments without the need for solving simultaneous equations to compute the fields at the latest time step.

4.4.1

STRUCTURAL MODELING IN FDTD

The finite-difference time domain method allows the modeling of surfaces and interiors that contain a variety of dielectric surfaces. The structure to be modeled is first mapped into the space lattice by choosing a lattice space increment and then assigning values of permittivity and conductivity for each component of E. Since Maxwell curl equations generate the boundary conditions there is no need for the user to establish boundary conditions at media interfaces. Fine details of the structure can be modeled, the accuracy of which depends on the resolution of the unit cell. The FDTD method can yield substantial savings in computer storage and execution time when compared to other techniques such as the method

Ez

Hy

Y

Figure 4.37 Yee's implementation of FDTD.

268

4. Computational Methods in the Analysis of Noise Interference

of moments. In FDTD the required storage and running times increase only linearly with N, where N is the total number of unknown field components. There are three major areas of concern when adapting the FDTD method to model real problems. 1. Lattice truncation conditions: The field components at the lattice truncation planes cannot be determined in a direct fashion from Maxwell equations. The objective is to establish truncation planes (or conditions) which are as closed as possible to the structure, and yet we must also achieve the condition that such planes are invisible to waves within the lattice. Auxiliary truncation conditions must be established with care so that no spurious reflections of scattered waves are observed. These objectives can be accomplished using absorbing boundary conditions. 2. Plane-wave source condition: Simulating an incident plane wave or plane-wave pulse should not take excessive storage or cause spurious reflections. Excessive storage can be caused when the incident wave is used as initial condition. Spurious reflections are caused when the incident wave is used as a fixed-field excitation along a single lattice plain. 3. Sinusoidal steady-state information: This can be obtained either by

directly programming a single frequency incident plane wave, or by performing a Fourier transform on the pulse-waveform response. Both methods require time stepping to a tmax equating several wave periods at the required frequency. The second method has two additional requirements. First, pulses with small rise time tr tend to accumulate waveform errors due to overshoot and tinging as they propagate through the space lattice. The result is the development of a numerical noise component which needs to be filtered out before Fourier transformation. Second, Fourier transformation of many lattice cell field vs time waveforms (expanded over hundreds of time steps) will require significant computer storage. 4.4.2

YEE'S I M P L E M E N T A T I O N OF FDTD

Using a rectangular coordinate system (x, y, z) and assuming the material parameters #, e, and o-are time independent, Maxwell equations can be written in the form

Ot

/~k Oz

Oy /

at

/~\ ax

az /

(4.144) (4.145)

4.4. The Finite-Difference Time Domain

OHz at

I(OE~ p,\ Oy

=

_ l(OH

OEy~ Ox /

(4.146)

_ Oily

Ot - e \ Oy

269

)

Oz - ~

(4.147)

OEy = I(OH~ Ot e \ Oz

OH~ _ trEv) Ox

(4.148)

Ot -

Oy

Ox

)

~rEz .

(4.149)

Following Yee's formulation, a point in space in the cubic lattice can be denoted by

(i,j,k) = (i~,j~, kb')

(4.150)

and the function of space and time as

Fn(i,j,k) = (i&,j~y, k~z, n&),

(4.151)

where fi = fix = fly = & is the space increment (sometimes denoted as Ax, Ay, Az), dt is the time increment (or At), and i, j, k, n are integers. Yee used centered finite-difference expressions for the space and time derivatives which are secondorder accurate in fi and fit, respectively: 1

OFn(i,j, k) Ox OFn(i,j,k) Ot

.

1

Fn(i -k- ~,j, k) - Fn(i - 7,j, k) =

=

& F(n+l/z~(i,j,k) - Fn-1/z(i,j,k) &

+ O(&2)

(4.152a)

+ O(~t2).

(4.152b)

Similar expressions to that in Equation (4.152a) can be written for derivatives with respect to the y and z coordinates. In order to evaluate all the space derivatives in Equations (4.144) through (4.149), using the accuracy of Equation (4.152), Yee positioned the components of E and H about a unit cell of the lattice shown in Figure 4.37. To achieve the accuracy of Equation (4.152b), E and H are evaluated at alternate half time steps. For nonpermeable media a fixed time step and fixed space increment are sufficient for good results. For such problems, the quantity &/Iz(i, j, k)3 (~ = &, 3y, &) is constant for all (i, j, k) in the lattice. Yee's system of equations can then be simplified. Taflove and Umashankar defined the following constants in the process of simplifying Yee's equations:

270

4. Computational Methods in the Analysis of Noise Interference R

=

&/2s o

ga-- ~t21(~2~0s0) R b = &/tZO~, 1

--

Ro'(m)/sr(m)

Ca(m) = 1 + Rcr(m)/sr(m) Cb(m ) =

Ra er(m) --I- Ro'(m)'

where ~ refers to &, ~y, or & for calculating E x, Ey, or E z, respectively, and m is an integer which denotes a particular dielectric or conductivity medium in the modeled space. We also define the proportionality vector 1~ = RbE.

(4.153)

Using these simplifications Taflove and Umashankar reformulated Yee's difference equations9 For cubic cells ( & = 8y = & = b'), Yee's implementation yields 1

1

1

1

-n

1

H~+l/Z(i,j+~,k+~) = l-l~-l/2(i,j+~,k+~) + Ey(i,j+-i,k+ 1) ~n

9

9

(4.154a)

1

- Ey(t,j+~,k) + Ez(i,j,k+89 - E,z(i,j+ 1,k+89 1. Hyn+ 1/2(i+ 5,j,k+89

=

9 89 /~z(i+ 1,j,"k+89 I'ly,,-1/2,.+! [l 2,J,k+ ~n

-

9

1

.

~z(i,j,k+89 + Ex(t+~,j,k ) - E T ( i + 1

.

1

1

(4.154b) 1

~,j,

.

k+ 1)

.

Hz + 1/2(i,j+89189 ) = Hz+n 1/2(i+i,j+i,k ) + ~7(i +5,: +1, k) --

~F/ 9 Ex "t+l~,j,k)

+

Ey(t,J+~,k)~n" "

1

(4.154c)

_ E,y(i+ l,j+~,k)" 1

m=MEDIA(i+I/2, j, k)

~n+ *(i+89

"n. 1 . = Ca(m)Ex(,+~,J,k) +

[ Hz+ l/z(i+89 1 _Hn+l/2" ! . ! I z (t+z,J-z,k) I

q(m)|.+.y+

) !.] . ,_

(4.154d)

L - H y + 1/2(i+89189 m=MEDIA(i, j, +1/2, k)

9 . 1 , nl_+nx1/2"i t ,J"-r" 5,k-2) / !. ! I Ey+l(t,j+~,k) = Ca(m)E,z(i,j,k+89 + Cb(m)~+Hz + 1/2.(t-z,j+z,k) |

L H"+m(i+89189 Z

(4.154e)

4.4. The Finite-Difference Time Domain

271

m = M E D I A (i, j, k+i/2)

Hy +'/2(i+89 - n

~+ 1/2(i-89189 v

E~+l(i'j'k+89 = Ca(m)JE~(i'j'k+2) + Cb(m) +Hxn +1 / 2 ;t,J-5, ~)| i 9 1 k+~'t"

(4.154f)

-H~ + 1/2(i,j+{,k+89 The MEDIA array will need to be stored. The array specifies the type-integer of the dielectric and conductivity medium at the location of each E field component. The preceding rearrangement of Yee's equation eliminates the three multiplications needed to compute H X, H v, and H z. It also eliminates the need for computer storage of e and o-arrays. With Equation (4.154), the value of a field component at any lattice point depends only on its previous value and on the previous value of the components of the other field vectors at adjacent points. The choice of ~ and 3t is determined by the need of accuracy and algorithm stability. To safeguard accuracy, ~ must be small compared to a wavelength, usually ~ ..... --~ 0.6 UJ

ff o.6

RL - 9 5 R t l m s x

_

R t ,, 120 o h m s

- 0 meters

x

0.4

= 0 meters

0.4 IEzl

0.2 _ 0.0

,

-0.5

I

.

-0.3

k

-0.1

,

I

0.1

,

[

0.3

0.5

V O L U M E ( 7 5 Ml-tz) (MATCHED TERMINATION)

! -0.3

-0.5

, .

i -0.1

! 0.1

y (meters) (a) M A G N I T U D E

y (meters) (a) MAGNITUDE OF E=

Figure 4.66

tEz l IN W O R K I N G

0.2 0.0

IN W O R K I N G V O L U M E ( 1 2 5 M H z ) (MATCHED TERMINATION)

,

i 0.3

0.5

O F Ez

(a) Magnitude of vertical E z field along the longitudinal direction in the parallel-plate region of the EMP simulator, 125 MHz excitation, unit voltage amplitude. (b) Magnitude of vertical E z field along the longitudinal direction in the parallel-plate region of the EMP simulator, 75 MHz excitation, unit voltage amplitude. From Gedney and Mittra [86].

I Ey j in Working Volume (125MHz) (matched termination) 0.300 I-.

0.250

0.200

~v

0.150 0.100 ohms 0.050

0.188

0.376

0.564

0.752

0.940

Z (meters)

Figure 4.67

Magnitude of the longitudinal Ey field along the vertical direction at several longitudinal positions, 125 MHz excitation, unit voltage amplitude. From Gedney and Mittra [86].

4.7. Computational Methods at Work: Getting Numbers from Your Models

321

and the EUT is important. The total fields will be a superposition of the incident field and the perturbed field. This scenario can change not only the pulse environment but also the characteristic of the simulator (e.g., the simulator can no longer be matched). This happens when the dimensions of the EUT become comparable to half the height of the parallel plate above the ground plane. For the purpose of studying this problem a cube of half the simulator's height was modeled inside the parallel-plate region as shown in Figure 4.68 using wire mesh. Figure 4.69

0.235 m

0.47m \1

"k

I

I

, ]',oo4

\

Transition Plane

I

o,4

m

-,

PEC Ground

Figure 4.68

Cubic scatterer within the working volume of a symmetric parallel-plate EMP simulator. From Gedney and Mittra [86].

322

4. Computational Methods in the Analysis of Noise Interference

2.5 2.0 -

9

/'-"x

/ /

~

RL., 120 ohms

\

-

,

~" 1.5

1.o

9.

OBSTACLE-SIMUI.ATOR INTERACTION 0"5f (MATCHEDTERMINAl"ION,100 MHz) 0.0 ,,, I , I , t -1.0 -0.5 0.0 0.5

] ,

1.0

y (meters) (a) MAGNITUDE OF E z

Figure 4.69

Magnitude of vertical E z field along the ground plane. Comparison of fields in the empty working volume with the perturbed fields due to the scatterer.

shows the vertical E field (E z) computed along the ground plane for an empty working volume as well as a conductive cube in a 100-MHz excitation. In the presence of the EUT, the fields within the simulation are a superposition of the incident field, the scattered field, and the fields scattered between the object and simulator.

4.7.2.2

Example 2: Bistatic Model of a Stick-Model Aircraft

The radar cross section of a target is the fictitious area intercepting that amount of power which, when scattered equally in all directions, produces an echo at the radar equal to that from the target. There are two types of radar scattering: monostatic and bistatic. Monostatic scattering is more common. In monostatic scattering the field source (e.g., radar beam) and the observation point are at the same location (e.g., using the same antenna). For example, most radars on aircraft are monostatic. In bistatic scattering the scattered field is measured (observed) at a location different from that of the field source. The radar cross section can be estimated as

O'--

r power reflected source/unit solid angle = lim 4 ~R 2 E gr incident power density/4 rr R---,~

(4.252)

where R is the distance between the observation point and scatterer, E r is the reflected field strength at the observation point, and E i is the strength of the incident

4.7. Computational Methods at Work: Getting Numbers from Your Models

323

field at the scatterer. Let's consider Figure 4.70, which is a stick model representation of an aircraft. More complex configurations could have been considered (e.g., Figure 4.59), this simple model is sufficient to illustrate the concept of bistatic scattering. In Figure 4.70 an incident plane wave illuminates the target. The figure shows the (x, y, z) coordinates (z = 0 in this case) of all the points interconnecting the wire segments. The NEC code is used again to solve for the scattered field observed at angles 0 and ~b. The program will then calculate the bistatic scattering from Eq. (4.252). The input data file containing all the needed input parameters is shown in Figure 4.71. The output file generated by the NEC code is also shown following in Figure 4.71. The output file shows all the detailed calculation from the NEC code. The normalized cross sections (o-/A2) for bistatic scattering are provided in the radiation pattern sections of the NEC output file.

4.7.2.3

Example 3: Surface Patch Modeling of Man-with-Radio Model [88]

The radiation characteristics of handheld radios, cellular phones, and other personal wireless communication systems are increasingly important because of possible biological effects of electromagnetic radiation. It is also important to

(24,29.9,0) f

y

&,

I

t

(2,13.3,0)

inc

(68,0,0) (0,0,0)

(6,0,0)

Tail from (6,0,0) to / (2,0,1 O)

(2,-11.3,0)

(44,0,0)

Coordinates in Meters

(24,-29.9,0) Figure 4.70

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100 is common), which means that they have small bandwidths. The bandwidths can be increased by increasing the thickness of the dielectric, but as this is done, surface waves (instead of transverse waves) use more and more of the delivered power, which could be considered as a power loss. Furthermore, as the size of the microstrip increases, it can allow resonant frequencies of two or more resonant modes to exist, leading to instabilities. When a current is injected into a microstrip antenna, a charge distribution becomes present at the microstrip surface and ground plane. For thin microstrips, most of the current resides at the bottom of the microstrip and on the top surface

5.9. Microstrip Antennas

371

Patch Antenna

Substrate

Feed

Ground Plane

Figure 5.10 A typical circular microstrip antenna.

of the ground plane. Therefore, the component of the magnetic field which is tangential to the patch edge is small. The input impedance of the microstrip antenna has both reactive and resistive components. Its resistive components account for the power radiated by the antennas. The presence of complex poles means that the imaginary parts of these poles account for the power loss by radiation and by dielectric and conduction losses. The real part and antenna poles are dependent on the shapes of their modal distributions. If the dielectric within the cavity has a dielectric loss tangent given by 8~, then at a frequency f near a resonance it has a quality factor of

1 O-- ~

1 WRe 2Wlm

(5.41)

where WRe and Wim are the real and imaginary part of the poles. This means that to properly choose the dielectric loss tangent 8~, we must use the reciprocal of the antenna quality factor. The magnetic and electric surface currents in the presence of the grounded dielectric slab are shown in Figure 5.11.

372

5. Antennas for Wireless Personal Communications

Jt microstrip

Js

,,~n

d plane

~

Figure 5.11 Modeling the source current in a microstrip antenna.

The magnetic surface current density M is related to the electric field in the surface between the patch microstrip and the ground plane by M = - n x E - ( - 2 n x E)

if ground plane removed,

(5.42)

where n is the unit vector pointing outward. The electric surface current density Js is given by Js = n • H,

(5.43)

and the current Jt is the tangential surface current on the top surface of the microstrip. In reality both currents Js and Jt are small compared to M, which is the dominant current. The radiated fields can be obtained by treating the antenna as an aperture. Let us first consider the rectangular microstrip shown in Figure 5.12. The rectangular patch is one of the two most popular microstrip antenna types in wireless design (the other being the circular patch).

5.9. Microstrip Antennas

373

Substrate

Figure 5.12

Rectangular microstrip patch antenna parameters.

Let us assume that Eaperture =axEo is a constant (we are neglecting Equation (5.42), we can say that M = - 2 n • E t = - 2 a X X ayE 0 -- - 2 a z E o.

Ey). From (5.44)

The far fields components of the electric field are given by Er=EO=O

bhkE~

~=-~

~=~

sin 0

sin(-~-sin 0 cos ~ b ) [ s i n ( ~ ........

cos O)

L~sin0cos~ [(~cos0)

. (5.45)

For small values of h (h < < ,~), the preceding equations reduce to

si.( cos 0) E4, = - j - ~R

sin 0

cos 0

(5.46)

374

5. Antennas for Wireless Personal Communications

Notice that in both of these equations, Vs = h E o, where Vs is the voltage across the feed point. The resonance modes (or resonant frequencies) can be obtained by solving the Helmholz equation

[77.2 .+_ K m2n ] E m n -

(5.47)

O,

yielding

_

1

~(~_~)2

Kmn = (fR)mn -- 2r

m =0,

(~_~)2 +

1,2,3 ....

n =0,

(5.48)

,

1,2,3 ....

The radiated power is given by

27r 7r/2 PRad-- L f f }E4~NR2 sin e d8

(5.49)

d4~.

r/~ o o The typical radiation pattern of a rectangular microstrip antenna is shown in Figure 5.13.

-X~

~h

-Z 'V\

f" l Figure 5.13

J

E~

I Substrate Feed

Typical radiation pattern of a rectangular microstrip antenna.

5.10. Array Theory

375

5.10 Array Theory Arrays of radiating elements provide high directivity, narrow beams, low side lobes, steerable beams, particular pattern characteristics, and more efficient use of radiated power. In wireless communications, array antennas are used mainly in satellite communications systems. Array antennas together with reflector antennas are the most widely used types of antennas in satellite telecommunications. The design of an array involves mainly the following factors: 1. The selection of elements and array geometry. For example, rectangular and circular patches are the most frequently used array elements; circular and square geometries are also the most frequently used array geometries. 2. The determination of the element excitations required for a given performance. 3. Detailed knowledge of element input impedance and mutual impedance between any two elements in the array. As with other types of antennas, we are only interested in far-field theory for wireless communications. Consider the generalized array in Figure 5.14.

Array Elements

P (Observation /

Rn '

k

Y

Figure 5.14 Array of identical elements.

Point)

376

5. Antennas for Wireless Personal Communications

For any element in the array of Figure 5.14, A(r) =

tz "rre-JZ'R R f j(R,)e-J,R'

cos ~ dv',

(5.50)

V

where

J(R')

= dielectric current distribution of the array element

R

= observation point vector

R'

= source element position vector

V

= volume of source element

cos ~ = R' 9 R', k = 2'n/A, is the free space number, and jkR' cos ~ = j k - R'. The far fields are given by E(R) =

-jwA +

H(R) ~ - 1 R X E, 17

1

7-:---VV- A -~ j w (~0 + ~)~)). A where q7 =

%/tz/e,.

(5.51)

For an array of N elements, the far field can be expressed as

E(R) ~_ --i t~jO.)-jkR r..~

F(O,~),

4 7rR

(5.52)

where N F ( 0 , ~b) =

E

Fn (Oq~) = ( ~ + $ $ )

n= 1

f

Jn(ern)e -jkk'(R'-Rn) dV n. r

nth element

Here, Rn = reference point in the nth element R',, = nth element Fn(0,~b) is known as the nth element pattern function. If all the elements are the same,

F,,( O, ck) = I,,Fo( O,4,),

(5.53)

where I,, is the complex excitation of the nth element. Fo(0,~b) is the pattern function of any single element.

5.10. Array Theory

377

Equation (5.53) becomes E(R)

=

--Jt~ 4"n'R

N F~ O'~) ~ Ine-J~R'R""

(5.54)

n=l

If the array is linear as shown in Figure 5.15, with array elements separated by a distance d, then for the nth element R n = fiz nd, and for an array of N elements, N

Inejknclcos 0.

F(0, ~b) = F(0) = ~ n=l

The far-field equation becomes N

E(R) = --Jt~ 4erR

Fo( O)~ Ine-jknd cos o. n=l

1

/

R4 f

R3'I

f

I

f f f

d

f

R2]

I

f

i

f

Figure 5.15

Linear array of dipole antennas.

(5.55)

378

5. Antennas for Wireless Personal Communications

If all the excitations I,, are equal and if the reference point is the physical center of the array, then

sin( Nkdc~

N

F( O) = In ~

e j#'nd cos

o=

n=l

iN

(5.56) sin( kd c~ 2 0)

and again the far field for a linear array of N elements with the same excitation for each array element is given by E(R) =

-J~ 4~R

sin[(Nkdcos 0) / 2] F~ O)IN sin[(kd cos 0) / 2] "

(5.57)

A normalized pattern of the array factor as a function of kd cos 0 is shown in Figure 5.16 for several values of N. The term sin[(Nkd cos O)/2]/sin[(kdcos 0)/2] is known as the array factor. The beam maximum appears at 0 = 7r/2. Therefore, the array is called a broadside array. When 0 = 0, the main beam will be along the array axis, and the array is called end-fire. Some important formulas, such as directivity D, half-power beamwidth, beamwidth between first nulls, null angular position, side-lobe maximum position, and far broadside and end-fire uniform arrays are given in Table 5.1. Table 5.1

1.0

0.5

0.0

"

0.04

0.08

0.12

0.16

0.20

0.24

0.28 0.32

v

0.36

0.40

0.48

kd cos O

Figure 5.16

Normalized pattern for an array of N linear elements.

5.10. Array Theory

i

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379

380

5. Antennas for Wireless Personal Communications

also shows the respective formulas for the Hansen-Woodyard end-fire arrays. It was found [1] that for long uniform end-fire arrays when element spacing is small, the directivity in the 0 = 0 direction can be increased if the phase shift per element is

5.11

Planar Arrays

In addition to placing radiating elements along an axis as was done in linear arrays, radiation can also be placed in a rectangular grid as shown in Figure 5.17 in order to form a rectangular or planar array. Planar arrays provide additional beam patterns to control and shape the overall pattern of the array. In planar arrays, the antenna factor is given by

F(0,4,)

=~

1 sin(M~Ox / 2) 1 sin(N(py/ 2) sin(Ox/2) N sin(Oy/2) '

(5.58)

Z

I I

I l I

F~ i I ] I---I I I

I I

I "l I l I,I /

/ y/

dx

Figure 5.17

-

Rectangular grid of array elements.

v

5.12. Mutual Coupling among Array Elements

381

where M and N are the numbers of elements along the x and y axes, respectively, and 0x = 27rd~ (sin 0 cos 0 -

Ox = 27rd,. (sin

sin 0o cos ~bo)

0 sin ~ b - sin 0o sin ~bo).

Therefore, the far-field is given by

E(R)

=

Jwlze-JkR {M sin(MOx/ 2) l sin(Nd'{Y/2)} 47rR F~ q~)lmn sin(0x / 2) N sin(~. / 2) "

(5.59)

0o and ~bo are the observer angles. Notice as before that the maximum value of IFo(0,~b)[ is 1. The steering angles 0 and ~b are given by

d)= tan-l [sin Oosin cko +- nA / dy] sin 0o cos Cko +- mA / dx o=sin_~[sin~ sin ~b

(5.60)

(5.61)

Most arrays are designed using phase shifters. A phase-steered array establishes a progressive phase front to match a wave at a single frequency (Figure 5.18). The beamwidth determined by the array illumination is proportional to the inverse of the normalized array length A0 = kML with A0 in radians; K is a constant (0.886 for uniform illumination) and L is defined to be Nd, for N elements in the 0 plane.

5.12

Mutual Coupling among Array Elements

We have assumed thus far that all elements patterns are equal if we are dealing with a uniform array. However, in reality array mutual coupling leads to unequal element patterns. Consider the feed pattern of dipoles shown in Figure 5.19. The solution of wire antenna problems such as the dipole array is solved by satisfying boundary conditions at the surface of the wire. The vector potential is given by

['60 f ~ I~(yr)G(r,r') dy r , Ay(x,y,z) = -~

382

5. Antennas for Wireless Personal Communications

~=fo \ \ \ \

i

Oo/

-.Y N~\

phase shifters

wavefront \

~=0 \ dx

A~ = Kd Sin 0 = (2n / X) dx Sin 0 o

= constant phase increment

Figure 5.18

Phase shifters in a steerable array.

iz I

/

h

Figure 5.19

h

Feed pattern and array of dipole elements.

5.13. Reflector Antennas

383

where

e-jklr-r,,I Ir - rl'

G(r,r') = [r -

=

X/(x

-

r = axx + avy + azz 2

+ (y - yn)2 + (z -

(5.62)

h) 2.

The set of integral equations equating the tangential E to zero at each dipole radius is written for the nth dipole as

Ey(xn,Y,h) = - V~ 8(y - y.) = - j - ~ I OY2

-k-k2Ayl,

(5.63)

where Vn is the potential across the source antenna. These integral equations are best solved using the method of moments, which is described in detail in Chapter 4.

5.13

Reflector Antennas

Reflector antennas have been in use since World War II. Their main purpose is to converge the energy in a given direction, and therefore they tend to provide higher directivities. The most popular reflector antennas are (1) comer reflectors, and (2) parabolic and paraboloid reflectors. A comer reflector is shown in Figure 5.20. Most comer reflectors have an angle of 90 ~, but other angles are also used. The feed element of the comer reflector is almost always a dipole or an array of cylindrical dipoles placed parallel to the vertex at a distance d, as shown in the figure. Often, if the wavelength/1 > > L, the surface of the comer reflector can be replaced by a wire grid, thus reducing weight and wind resistance; in that case, the wire grid separation (i.e., the separation of wires in the grid) should be no more than M10. The aperture of the comer reflector S would range between one and two wavelengths (/1 < ~ < 2/l). The length L is usually such that L ~ 2d. The feedto-vertex distance d is usually taken such that/1/3 < d < 2M3. For a reflector with L -< 90 ~ the sides L are made larger. Finally, the height h of the reflector should be about 1.2 to 1.5 times greater than the length of the dipole feed element. The distance d cannot be made small, or the radiation resistance decreases, decreasing the antenna efficiency; on the other hand, if d is too large, the antenna produces undesirable side lobes.

384

5. Antennas for Wireless Personal Communications

Z

L~~

I

0 I

._ _

S

OP

j--"

u Figure 5.20

Configuration and geometry of a comer reflector.

It can be shown that the radiated far field of a 90 ~ corner reflector is given by

E(R,8,ck)= 2F(8,$) e-jkR [cos(kd sin 8cos ~b) R - cos (kdsin 8 sin ~b)],

(5.64)

where F(8, ~b) is the form factor of a single isolated element of the radiating feed element (most likely a cylindrical dipole), 0 -- ~b -- cd2, 0 --- 8 -< ~r, and 27r cd2 -< ~b -- 2~r. The pattern of a comer reflector antenna is shown in Figure 5.21. The array factor (AF) for the a = 90 ~ reflector is given by

AF(8,r

= [cos

(kd sin 8 cos ~)

- cos(kd sin 8 sin ~)].

(5.65)

For other angles ( a = 60 ~ a = 30~ the array factor (AF) that can be used with Equation (5.65) above is as follows. For a = 60 ~

AF(8'$)=4sin(kdsinSc~ [ c o s ( k d sin 28 cos ~ b ) _

COS

sin sin 0)] 2

5.13. Reflector Antennas

385

"d" chosen correctly chosen incorrectly

90

270

180 Figure 5.21

Pattern of a corner reflector antenna.

For ce = 30 ~

AF(O,~) -

cos(kd sin 0 cos ~b) - 2 cos 2

(~

- c o s ( k d sin O sin ~b) + 2 cos

)I .sosino)

kd sin2 0 sin ~b cos

2

( kdsin 2Ocos ~b)(X/3kdsinOsin~b)" cos 2

5.13.1 PARABOLICREFLECTORS Geometrical optics shows that if a beam of parallel rays are incident on a reflector antenna whose geometrical shape is a parabola, the array beams will converge at a spot known as the focal point. In the same manner, a radiating feed point

386

5. Antennas for Wireless Personal Communications

at the focus of the parabola will produce rays that, when bounced off from the parabola, will travel in a parallel beam. Two examples of parabolic reflectors are shown in Figure 5.22. In the figure, the feed point (a dipole and a horn) is located at the focal point of the parabola; such antennas are known as front-fed. This arrangement, though typical, can use long transmission lines, with the accompanying losses. Another arrangement, known as the Cassegrain feed, which is shown in Figure 5.23, has a dual reflector. The main reflector is a parabola, the secondary reflector is a hyperbola, and the feed is placed along the axis of the parabola at or near the vertex. The rays that emanate from the feed illuminate the secondary reflector, which is located at the focal point of the paraboloid. The rays are then reflected by the primary reflector and are converted to parallel rays. Some diffraction occurs at the edges of both reflectors. The Cassegrain feed arrangement is much easier for servicing and adjustment, since both the transmitting and receiving equipment can be located behind the primary reflector. Some formulas of interest in the design of a paraboloidal reflector like the one shown in Figure 5.24 are as follows:

R' - 1 + cos 0"

l(i)

01 = tan -1

O < 01,

2 ~

Directivity = D =

(~_~)2

~ = cos

,

02 = cos1

9

i (cot2()

01

tan()do

2)

0

where G(0') is the gain of the feed element, also known as the feed pattern;

Aperture efficiency=

cot ( )Iiv (0, tan(@)d0'[ 0

5.14

Offset Parabolic Reflectors

An offset parabolic reflector follows the general features of conic sections. The geometry of an offset parabolic reflector with focal length f, diameter D, and

5.14. Offset Parabolic Reflectors

m

n

~

~lP

x-X---

-I~

\ - --

\ \\1

--~ --I~ --

--~

Figure 5.22

Figure 5.23

Parabolic types of antenna.

The dual reflector Cassegrain antenna.

387

388

5. Antennas for Wireless Personal Communications

~02 al

Feed Point

S

r

I I I I

/R~ I ,

I v

Figure 5.24

Parabolic reflector.

offset height h is shown in Figure 5.25. Other parameters used for characterizing offset parabolic reflectors include the following: S = (d/2) + h 01 = 2 tan -1 {(d + h)/2f} 02 = 2 tan-1 {(d/2 + h)/2f } 03 = 2 tan-1 {h/2f }

04-- O1- 03[2. In some cases fl, 02, and 04 are given, and from these the terms d and h can be defined as d = 4f sin 04/(cos 02 + cos 04) h = 2f (sin 02 - sin 04)/(cos 02 + cos 04). For most offset parabolic antennas, h/d varies between 0.1 -< h/d 3 and conditions 1 through 3 are complied with. Notice that the third term of the electric field equation is the array factor. The peak gain can be empirically expressed by G = 8.3

_~)

(tan 12.5 ~ \ tan~ /

"

(5.72)

396

5. Antennas for Wireless Personal Communications

Figure 5.32 Bifilar conical spiral antenna.

A variation of the helical antenna is the bifilar conical spiral antenna shown in Figure 5.32. This antenna is independent of frequency, and its radiation mechanisms can be modeled by assuming the two spirals as transmission lines. When the two conductors' arms are fed in antiphase at the cone apex, waves travel out from the field point and propagate along the spiral without radiating until a resonant length is reached. A strong radiation occurs at that point, and very little energy is reflected by the spiral. Because of this mechanism, broadband radiation patterns can be produced.

5.16

Designing a Quadrifilar Helix Antenna

A quadrifilar antenna is a special kind of helical antenna which is becoming popular for personal communication services via low-earth-orbit satellites. The fractional-turn resonant quadrifilar helix produces a cardioid radiation pattern with a very good circular polarization over a wide angle. This type of antenna has found many applications in spacecraft, satellites, and personal communication networks. Its small size and lack of a ground plane and its insensitivity to nearby metal structures has made the quadrifilar helix a very popular antenna. Although quadrifilar antennas are similar in type, these antennas may show widely differing radiation characteristics depending on the particular design chosen as well as the quality of construction. The quadrifilar helix antenna consists of four tape helices which are equally spaced circumferentially on a cylinder and fed with equal amplitude signals with

5.16. Designing a Quadrifilar Helix Antenna

397

relative phases 0, 90, 180, and 270 ~ Figure 5.33 shows a right-handed quadrifilar helix with a ground plane and feed system. The four tapes are formed by photoetching on a plastic sheet. The sheet is wound on a polystyrene tube of small thickness. The feed system is constructed of stripline hybrids, subminiature connectors, and rigid subminiature coaxial lines. The feed system output consists of subminiature connectors soldered to the ground plane. The antenna tapes are tapered to the center conductor of the output connectors. In Figure 5.34, we observe a schematic representation of the feed system of a right-handed quadrifilar helix antenna. At the feed region, opposite elements are fed in antiphase to produce two independent bifilar helices. The bifilar helices are fed in phase quadrature to produce the quadrifilar helix. The helix can be described by its pitch distance P, P = ~ ~ - 7 (L - 2r) 2 - 4r

2,

(5.73)

where N is the number of turns and the beamwidth 0BW is shown in Figure 5.35. The quadrifilar helix antenna operates in the axial mode when the helix circumference is about C = 7rD = 0.4,t to 2.0A and the bandwidth of the

\ \

\ k

elements shorted together

L \ jJ

\

\ \

\ \ \

/J'~

\

0-270 ~ Phase

Figure 5.33

Right-handed quadrifilar helix antenna.

\

398

5. Antennas for Wireless Personal Communications

Q -90

I -270

0

-270

18o

7

!

-90

~l--~li/ 01o80 Figure 5.34

Feed system of quadrifilar helix antenna.

i

I L.._ OBW

3dB

Figure 5.35

Beam pattern for quadrifilar antenna.

I

5.16. Designing a Quadrifilar Helix Antenna

399

quadrifilar helix antenna spans that of the unifilar helix antenna. In reality, the quadrifilar helix antenna has two advantages over the more simple helix antenna: (1) increased bandwidth, and (2) a lower frequency for axial mode operation. However, we must consider what is called the "scanning" mode, which means that in the frequency range of 3fed (fed is the frequency at which broadband endfire patterns begin, which is somewhere between C = 0.4A and 0.45A), there is an increased tendency for the beam pattern to begin deteriorating, though this can be improved somewhat by adjusting the ground plane. In the frequency range of 1.6A < C < 2.7A, the beam patterns begin to deteriorate slowly, and one mode of radiation is favored over the others. Complete pattern breakup will appear when 2.7A < C < 3.0A. Characteristic impedance is satisfactory for C < 2.7A. Beam patterns for antennas of different lengths are shown in Figure 5.36 [2]. Through experimental work it has been found that the pitch angle 9 t primarily affects the bandwidth. The optimum angle is about 350-45 ~. The optimum groundplane diameter Dg is about 35 times the antenna diameter D, but ground planes as little as five times the antenna diameter are acceptable. Small ground planes tend to show poor beam patterns. Directivity tends to increase with length L, but as L increases considerably, the side lobes also increase. Shorter antennas can have lower side-lobe levels at certain frequencies and less beam splitting at the higher frequency limits. However, in general lengthening the antenna while maintaining the same number of turns increases the beamwidth and produces reduced phase center variations at low elevation angles.

5.16.1

PHASE VARIATIONS

In the preceding analysis of quadrifilar helix antennas, we have paid attention only to the amplitude pattern, not to the phase pattern, which is of great importance in satellite communications that employ such antennas in personal communications services. A quadrifilar antenna to be used for wireless communications via satellites must provide a uniform response over the entire hemisphere over which the satellites are visible. This region of coverage usually excludes the region specified by an elevation angle of 10~ or less due to multipath problems and atmospheric effects. In all other regions of coverage, the antenna must provide a uniform response in both amplitude and phase. The gain of the antenna must be enough throughout the coverage area that it can easily receive signal levels at all desired view angles and with the desired signal-to-noise ratio. The pattern cutoff must also be sharp enough with no backlobes, so that no signal is received outside the coverage area.

400

5. Antennas for Wireless Personal Communications C= 0.56

C= 0.44

0

270

90

180

180

C= 1.28 X

C= 0.88

0

0

270

L......rT,,,~_2

90

270

90

90

270

180

180

C= 1.60

C= 1.92 k

0

0

90

270

90

270

180

180 C= 2.40

C= 2.56

0

0

90

270

180

Figure 5.36

270

90

180

Beam pattems for different kinds of quadrifilar antennas.

5.16. Designing a Quadrifilar Helix A n t e n n a

401

There is also a need for a uniform phase response over the coverage area. The phase response of the antenna weights the arriving signal and produces a response that is directly proportional to the phase. This response is a function of the angle of arrival of the satellite signal. Because of the importance of phase response in the design of quadrifilar antennas, computational techniques such as the method of moments can be used in their design. A representation of the modeling is shown in Figure 5.37. The details of the method of moments modeling can be obtained from Chapter 4. The ground plane is modeled as a series of wire mesh elements that

Top View

Side View I

vo