Microwave Differential Circuit Design Using Mixed Mode S-Parameters

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Author: William R. Eisenstadt | Bob Stengel | Bruce M. Thompson

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Microwave Differential Circuit Design Using Mixed-Mode S-Parameters

DISCLAIMER OF WARRANTY The technical descriptions, procedures, and computer programs in this book have been developed with the greatest of care and they have been useful to the author in a broad range of applications; however, they are provided as is, without warranty of any kind. Artech House, Inc. and the author and editors of the book titled Microwave Differential Circuit Design Using Mixed-Mode S-Parameters make no warranties, expressed or implied, that the equations, programs, and procedures in this book or its associated software are free of error, or are consistent with any particular standard of merchantability, or will meet your requirements for any particular application. They should not be relied upon for solving a problem whose incorrect solution could result in injury to a person or loss of property. Any use of the programs or procedures in such a manner is at the user’s own risk. The editors, author, and publisher disclaim all liability for direct, incidental, or consequent damages resulting from use of the programs or procedures in this book or the associated software.

For a complete listing of recent titles in the Artech House Microwave Library, turn to the back of this book.

Microwave Differential Circuit Design Using Mixed-Mode S-Parameters William R. Eisenstadt Bob Stengel Bruce M. Thompson

artechhouse.com

Library of Congress Cataloging-in-Publication Data Eisenstadt, William Richard. Microwave differential circuit design using mixed-mode s-parameters/William R. Eisenstadt, Robert Stengel, Bruce M. Thomspon. p. cm.— (Artech House microwave library) Includes bibliographical references and index. ISBN 1-58053-933-5 (alk. paper) 1. Microwave integrated circuits. 2. Mixed signal circuits. 3. Differential equations. I. Stengel, Robert. II. Thompson, Bruce M. III. Title. IV. Artech House microwave library. TK7876.E4125 2006 621.381′32—dc22 2005057086

British Library Cataloguing in Publication Data Eisenstadt, William Richard Microwave differential circuit design using mixed-mode s-parameters. —(Artech House microwave library) 1. Microwave integrated circuits—Design 2. Mixed signal circuits—Design 3. Systems on a chip 4. S-matrix theory I. Title II. Stengel, Robert III. Thompson, Bruce M. 621.3’8132 ISBN-10: 1-58053-933-5 Cover design by Igor Valdman

© 2006 ARTECH HOUSE, INC. 685 Canton Street Norwood, MA 02062 All rights reserved. Printed and bound in the United States of America. No part of this book may be reproduced or utilized in any form or by any means, electronic or mechanical, including photocopying, recording, or by any information storage and retrieval system, without permission in writing from the publisher. All terms mentioned in this book that are known to be trademarks or service marks have been appropriately capitalized. Artech House cannot attest to the accuracy of this information. Use of a term in this book should not be regarded as affecting the validity of any trademark or service mark. International Standard Book Number: 1-58053-933-5 Library of Congress Catalog Card Number: 2005057086 10 9 8 7 6 5 4 3 2 1

To my wife, Ann, and my daughters, Abigail and Sarah —William R. Eisenstadt To my family —Robert Stengel To my father, the chief hero in my pantheon —Bruce M. Thompson

Contents xiii

Preface Acknowledgments

xv

1

Differential Circuit Technology

1

1.1

Introduction

1

1.2

Digital Versus Analog Signal Integrity

2

1.3

Signal Integrity Issues

4

1.3.1 1.3.2 1.3.3

Rise Time, Fall Time, Duty Cycle, and Period Jitter Bit Error Rate

4 5 7

1.3.4

Isolation

7

1.4

Interconnect Discontinuities

9

1.5

Differential Circuit Definitions

9

1.6

Electromagnetic Coupling

13

1.7

Common-Mode Impedance Rejection of Differential Circuits

18

Increased Distortion-Free Dynamic Range with Differential Circuits

21

1.8

vii

viii


1.9

Nonlinear Even-Order Distortion Improvement with Differential Circuits

23

Conclusions

25

References

26

2

Mixed-Mode S-Parameters

27

2.1

Introduction

27

2.2

Mode Definitions

30

2.3

Mode-Specific Waves and Impedances

32

2.4

Normalized Power Waves

34

2.5

Mixed-Mode Scattering Parameters

37

2.6

Standard S-Parameter/Mixed-Mode S-Parameter Transformation

42

Conclusions

45

References

46

3

Transmission Lines and Systems

47

3.1

Introduction

47

3.2

Traveling Waves and Transmission-Line Concepts

48

3.3

Mode Specific S-Parameters—Isolated Transmission Lines

53

3.4

Mode Specific S-Parameters—Coupled Transmission Lines 60

3.5

Time-Domain Analysis—Coupled Transmission Lines

65

3.6

Distributed Mixed-Mode S-Parameter to R, L, G, and C Model

66

3.7

Single-Ended Signal Application in Mixed-Mode Terms

71

3.8

Conclusions

78

References

78

4

Differential Low-Noise Amplifier

79

4.1

Introduction

79

1.10

2.7

Contents

ix

4.2

DLNA Implementation

80

4.2.1 4.2.2

Ideal Mixed-Mode S-Parameters Practical Matching Limitations

81 83

4.2.3

Noise Rejection

83

4.2.4

Common-Mode Gain

86

4.3

DLNA S-Parameters, Sdd

87

4.4

Neutralized DLNA

88

4.5

Passive Circuits

90

4.6

Impedance Matching

91

4.7

Cross-Mode Parameters

93

4.8

Common-Mode Rejection

94

4.9

Supply and Ground Response

96

4.10

Common-Mode Signal Postprocessing

97

4.11

Noise Figure

98

4.12

Balanced Signal Losses

100

4.13

Distortion Analysis

103

4.14

Odd-Order Distortion

106

4.15

Even-Order Distortion

108

4.16

Conclusions

112

References

112

5

Power Splitter and Combiner Analysis

113

5.1

Introduction

113

5.2

Wilkinson Impedance Transformer Splitter/Combiner

114

5.3

Splitter/Combiner Mixed-Mode S-Parameter Matrix

115

5.4

Splitter/Combiner Standard S-Parameter Matrix

119

5.5

Mixed-Mode Splitter/Combiner S mm

5.6

Splitter General-Purpose Analysis/Specifications

MS

std

M

−1

125 130

x


5.7

Combiner General-Purpose Analysis/Specifications

137

5.8

Hybrid Splitter/Combiner and Mixed-Mode S-Parameters

141

5.9

Transformer Sigma/Delta Hybrid Implementation

144

5.10

Transformer 90° Hybrid Implementation

149

5.11

Summary—Mixed-Mode S-Parameters Applied to Baluns and Hybrids

151

References

152

Mixed-Mode Analysis Applied to Four-Ports and Higher

153

6.1

Introduction

153

6.2

Impedance (Z ), Admittance (Y ), Hybrid (H ), ABCD, Chain (T ), and Scattering (S ) Parameter Network Matrix Models

153

6.3

Differential Band-Pass Filter

171

6.4

Dual Directional Coupler

184

6.5

Differential Isolator

186

References

191

7

Mixed-Mode and Time Domain

193

7.1

Introduction

193

7.2

Steady State AC Network Response

195

7.3

Impulse Response

196

7.4

Representation of Signals by a Continuum of Impulses

198

7.5

Impulse Response

199

7.6

Step Response and TDR

202

7.7

Impulse Transmission Response and TDT

207

7.8

Parallel, Cascade, and Feedback Connections

212

6

Contents

7.9

xi

Summary of S-Parameter Applications in the Time Domain

214

References

215

About the Authors

217

Index

219

Preface First and foremost, we wish to direct the reader to the accompanying CD with s-parameter design examples and IC technology. This CD holds a unique, general access, simplified 180-nm SiGe BiCMOS IC technology design kit from Jazz Semiconductor, for the Agilent ADS simulator. This software allows readers to design very realistic microwave ICs and explore prepared example circuits and problems from the design chapters in the book. The authors invite experienced circuit designers to use these ADS circuit templates and design problems to quickly come up to speed in mixed-mode design of transmission lines, LNAs, splitters and combiners, and RF systems. Educators can use the CD problems as student design assignments and the technology can be used to provide a SiGe BiCMOS design library for general graduate-level microwave instructional purposes. The need for the effective application of mixed-mode s-parameter techniques can be well illustrated in the context of IC technology, such as that provided on the CD. Balanced, quadrature, and other multiphase design approaches are enabling technologies for the increasing density, complexity, and speed of today’s integrated circuits. In these ultra-dense chips, where high-speed digital blocks, low noise analog/RF, high power RF, and other isolation sensitive circuits coexist in close proximity, virtually every interconnect becomes a study in signal integrity. It’s clear that multiport conventional scattering parameters do not sufficiently delineate differential circuit performance. Mixed-mode s-parameters are necessary to have full insight into the design and analysis of differential circuits and systems. It is the goal of this book to begin the task of explaining mixed-mode theory and illustrating its application to practical circuit design.

xiii

xiv


Mixed-mode s-parameters have an elegant structure, yielding a foursome of mode-specific 2 × 2 submatrices which are amenable to most of the tried-and-true engineering analysis techniques developed for conventional two-port circuits. Additionally, mixed-mode s-parameter simulation and measurement data can describe multiport circuit performance with surpassing accuracy. This is due, in part, to the elimination of the inherent errors connected with traditional measurement approaches using a standard two-port VNA and the splitter/balun to balanced DUT to combiner/balun method. Furthermore, interpretation of differential performance from raw multiport single-ended s-parameter data can be problematical, to say the least. Mixed-mode s-parameters, on the other hand, allow components of differential-mode, common-mode, and cross-mode performance to stand out in bold relief. At this writing, the list of circuit applications susceptible to mixed-mode analysis is long and varied. Isolation analysis of balanced systems using this approach can enable the design of novel topologies. This process can make balanced circuits much more “unilateral” and greatly expand their regions of stable operation. Heuristic understandings of familiar structures, based previously on single-ended analysis, can in some cases be replaced with theoretically complete solutions through an examination of common-mode and differential-mode matching. Indeed, the authors are confident that the reader will find mode specific network analysis to be a powerful tool.

Acknowledgments The authors wish to express their sincere gratitude to the following individuals and organizations. Primary credit and acknowledgment must go to Dr. David E. Bockelman, for the fundamental exploration of the field and the development of its rigorous mathematical underpinnings. It is a rare circumstance for a Ph.D. dissertation topic to have such broad subsequent application. Dave’s work is fundamental and will, no doubt, find increased use throughout the RF and microwave world. In addition, we recognize Charles A. Backof for supporting the development of mixed-mode theory inside Motorola Labs from the very beginning. We also wish to express our thanks to Clement Ukah, Horn Hsieh and the team at Jazz Semiconductor for providing the simplified ADS Design Kit for their Jazz 180-nm SiGe BiCMOS integrated circuit process, which is included in the companion disk to this volume. Thanks also to Frank Ditore and Keefe Bohannan of Agilent Technologies, for their support, discussion, and guidance relating to Agilent EEsof’s Advanced Design System (ADS) simulator. We also wish to acknowledge Les Besser who has believed in mixed-mode techniques, and through his educational company, Besser Associates, has disseminated information on this approach in courses and books. We want to convey our gratitude to David K. Lovelace for many useful suggestions and careful checking of

xv

xvi


the simulations. Finally, we wish to thank our editors Barbara Lovenvirth, Kate Callahan, and Mark Walsh at Artech House. Without their guidance, dedication, and constructive prodding this work would not have been possible.

1 Differential Circuit Technology 1.1 Introduction Mixed-signal/radio frequency (RF) designs with complex digital and analog functionality, called systems-on-a-chip, (SoCs) are now in production in wireless applications. Future, integrated circuit (IC) technology scaling into deep submicron transistor dimensions benefit mixed-signal and RF radio frequency ICs with increased digital clock speed, increased maximum frequency of performance, and the ability to tune analog/RF sections with on-chip digital circuits. Growth in the mixed-signal/RF and the digital IC market is driven by a doubling of complexity (roughly halving in cost per logic function) every 24 to 36 months since 1965. The International Technology Roadmap for Semiconductors (ITRS) shows for an aggressive 2007 ASIC design, a 35-nm application specific IC, (ASIC) cell pitch, 3000 I/0 pads, ∼7.0 GHz clock, 9 levels of metal, and a power supply of 0.7V [1]. However, RF microwave circuits are increasing in complexity at a much slower rate with little increase in device density. Power, noise, dynamic range, and device matching have contributed to keeping RF and microwave devices from shrinking in physical size. Migration from discrete device implementations using single-ended RF and microwave processing to integrated differential processing, is one factor enabling the proliferation of low-cost integrated wireless solutions through 5 GHz and creating the need for differential analysis tools. As a result, wireless RF communication circuits and integrated circuits are becoming more complex and packing more functionality and signals into an ever-closer space. With ICs becoming larger, incorporating mixed-analog/RF functions and dense digital logic, there is a high-level of electromagnetic interaction between circuit nodes. In addition, low-voltage power supplies in the latest 1

2


technologies make it troublesome for RF and analog circuits to meet performance parameters such as linearity, dynamic range, and output power. Electromagnetic isolation of digital and analog circuit modules from each other becomes extremely difficult in future SoC designs. New IC computer-aided design (CAD) tools have been created to deal with these problems in 130 nm and deeper submicron technologies. In the future, wireless SoC designs may not achieve electromagnetic compatibility between noisy digital and sensitive analog/RF sections with existing isolation techniques. The authors feel that it will take a combination of differential circuit design, microwave test techniques, and circuit and package analyses to reliably achieve high levels of isolation between, for example, a local oscillator and a low-noise receiver amplifier. The topic of differential RF and microwave circuit design is rich in ideas but the results are scattered throughout the literature. The goal of this book is to present conceptual structure and teach powerful new techniques in the area of differential RF circuit design. This is done through the use of mixed-mode s-parameters. Mixed-mode s-parameters were originally developed to formalize the theory of differential RF circuit design [2]. Mixed-mode s-parameters can show and separate the differential-mode and the common-mode circuit performance of a four-port RF system. RF IC designers are moving from single-ended two-port to four-port-balanced designs due to increased dynamic range and superior noise cancellation properties; they need mixed-mode design techniques. This book presents the basic mixed-mode s-parameter techniques necessary to perform high frequency differential four-port circuit design. In addition, mixed-mode techniques are used to develop design-related analyses of balanced transmission lines, amplifiers, three-port hybrids, and four terminal coupler designs. Before investigating the mixed-mode circuit techniques, it is useful to review the basic properties of signal integrity, differential circuits, and the advantages of differential circuit design as compared to single-ended circuit design.

1.2 Digital Versus Analog Signal Integrity Ideally and practically, digital logic signals are significantly more tolerant of noise than analog signals. In basic digital circuit design theory, the two possible signal states are defined as logical 1 and logical 0. In practical digital system design and test, more states such as don’t care, weak 0 and weak 1, are possible but they are not addressed here. In standard CMOS logic gates, the theoretical digital logic 1 and logic 0 states are mapped to the IC voltages, VDD and reference ground (GND). Unfortunately, CMOS implementations of digital logic provide a continuous set of voltage output values ranging from VDD to GND over time. CMOS designers use CMOS logic gates to interpret a small range of


3

valid voltages at or below the VDD power rail (typically VDD to 0.8 VDD ) and at or above GND (typically GND to 0.2 VDD) as logic “1” and logic “0”. Well-designed CMOS logic gates can easily switch to the correct output when these valid voltage values are applied at the gate input terminals. During the static logic 1 or 0 states there is a 0.6*VDD separation between their respective voltage levels. This 0.6*VDD separation represents a large noise or interference amplitude margin, that protects the logic state value. During CMOS gate-switching input, noise referenced to the circuit input impacts when switching occurs, resulting in the transition edges shifting slightly in time (called jitter or phase noise), see Figure 1.1. Amplitude noise would appear on the output static 1 or 0 states due to supply or ground noise on a buffer output stage in a digital processing path. Both the phase noise and amplitude noise are discarded by using a clock in the CMOS system to allow the undesirable transient voltages to dissipate. Cascading gates in the CMOS logic system restores logic levels to the power rail voltages (VDD and GND) at each gate output removing the “noise” in the digital system. This signal restoration process along with good design practice has made generations of CMOS logic gates immune to noise [3]. Analog signals contain a virtually infinite variation of acceptable voltage levels and this variation is present at every point of the signal’s duration, see Figure 1.2. Therefore, analog signals are degraded by any level of noise added to the original analog signal. Unlike the digital system, there is no way to restore analog signals to their original ideal values. This is why digital recording techniques can make perfect copies of music and videos while analog duplicating techniques always suffer from the addition of noise accumulated over each generation of copying. Unfortunately, in IC technologies, IC packages, and electronic circuit boards with GHz clock speeds, the CMOS digital signal voltages can be at values far from desirable (VDD and GND) at the wrong time in the clock cycle. This deviation in ideal voltage in the presence of circuit noise, undesired signal wave reflections, and signal coupling or crosstalk, can cause “dynamic” failures t1−∆t1

binary signal

t3+∆t3

t5+∆t5

vdd

“1”

Vdd/2

rail to rail

binary signal with noise

Vdd/2

“0” t 1 t2

t3

t4

t5

t6

vss

t2−∆t2

t4−∆t4

t6+∆t6

Figure 1.1 A digital signal with binary states 1 and 0 and input referenced noise added to the input transit signal; the noise results in a time shift of the rising and falling transition points in time.

4


analog signal

analog signal with noise interference

Figure 1.2 An analog signal with continuous rational time values in the graph is shown on the left. An input referenced interference noise signal summed with the analog input signal is on the right.

in digital logic operation. Many high-speed digital designs may have to be simulated as analog or RF microwave signals to assess dynamic performance. Thus, engineers that design in the highest speed digital logic sometimes worry late at night about digital signal integrity issues.

1.3 Signal Integrity Issues Real CMOS digital signals exhibit time-varying analog behavior. Therefore, digital systems use pulsed or squarewave clocks to establish the valid times when digital signal values are stable and within the proper amplitude levels. Clocked digital systems allow complex logic designs, high levels of digital design abstraction, and automated logic synthesis. As clock speeds in the modern ICs go well above 1 GHz, the issue of digital signal integrity becomes paramount. In order to discuss the issues involved in designing high-performance CMOS digital circuits, it is necessary to review the basic concepts of rise time, fall time, jitter, bit rate, and isolation. The highest performance CMOS digital systems and I/O circuits are differential in nature. Differential CMOS I/O requires microwave differential test techniques (mixed-mode s-parameters) to perform accurate signal integrity characterization and modeling of packages and board signal paths [4]. 1.3.1

Rise Time, Fall Time, Duty Cycle, and Period

The analog properties of digital signals are strongly exhibited in the voltage or current logic transitions (rise times and fall times) between logic states. The risetime for standard static CMOS logic is defined as the time it takes for a voltage to rise from 10% of VDD to 90% of VDD in a 0 to 1 logic transition. The fall


5

time is defined as the time it takes for voltage to fall from 90% of VDD to 10% of VDD in a 1 to 0 logic transition, see Figure 1.3. Nonstandard CMOS logic such as differential CMOS current-mode logic (CML) and nonratio logic (i.e., pseudo-NMOS logic) have smaller voltage output swings than VDD to GND and a modified definition of rise time and fall time. As IC clock speed increases, the logic transition time can become a significant portion of the clock period. A 4-GHz clock cycle would have over 14% of its period taken by a 35-ps logic transition rise time. Typically, a rise time or fall time may take only 10% of the clock period in a digital logic system. The rest of the clock period is budgeted by the designer for switching logic and register delays and signal transmission, also known as setup and hold times. Another important definition, the duty cycle of a squarewave clock, is the ratio of the clock logic high duration to the total period of the clock. The clock logic period can be measured from the time of the 50% VDD in an initial rising transition to 50% VDD in the next rising transition. 1.3.2

Jitter

Consider a very high-speed clock of constant duration and 50% duty cycle that is applied to a CMOS inverter digital logic gate. Random nondeterminist noise in the circuit input will add statistical variation in the charging and discharging t7 – t 5= clock perio d = 1 / clock frequency amplitude

(t6 – t 5) / (t 7– t )5= duty cycle

0.1*(VH-VL)

t7

t6

t5

VH

“1” 0.5*(VH-VL) “0”

VL t1

t2 0.1*(VH-VL) t4– t 3= fall time t2– t 1= rise time

t4 t3 time

Figure 1.3 A digital clock signal shown with analog parameters, rise time, fall time, duty cycle, and period defined using floating-point amplitude-defined time points.

6


times of the digital logic input, (i.e., CMOS transistor gate capacitors). In addition, the noise coupled from adjacent transmission lines, supply, and the substrate will modify the input signal to the CMOS inverter. This injected noise will result in a distribution of logic transitions times in which the CMOS inverter output switches in successive cycle-to-cycle periods for a repetitive input “perfect duty cycle” clock. Repetitive interval measurements of CMOS digital logic switching times will show output logic transitions with delay times that shift in time around a mean delay time. The variation in the switching time of this CMOS digital logic due to random noise is called random jitter (RJ). Typically, random jitter is characterized statistically, with a mean switching time and standard deviation in switching time. Where the mean switching time is the ideal period of the logic signal when the interference signal is nondeterministic random noise. Other common CMOS logic gate jitter components include deterministic jitter (DJ) and data-dependant jitter (DDJ). There are at least three methods of measurement associated with jitter. 1. Period jitter (Jper)–time difference between a measured cycle period and the ideal cycle period in rms or peak-to-peak statistical terms. 2. Cycle-to-cycle jitter (Jcc)–time difference of two adjacent clock periods expressed as rms or peak-to-peak, see Figure 1.4. Also called “shortterm jitter,” used to determine setup and hold times.

t6

t5

t7 tp7

tp6 amplitude

jitter

jitter

jitter VH

(VH – VL)

/2

VL time

∑ [(tpx)1/2/(tpx/n)] n

cycle-to-cycle jitter (rms) =

2

x =1

Figure 1.4 A clock signal with average period tp showing cycle-to-cycle jitter induced by noise. The noise affects the occurrence of the clock rising transit.


7

3. Accumulated jitter (Jac(n))–time displacement of edges of a clock relative to the initial triggering edge of the same clock measured as rms or peak to peak. Jitter can be related to the phase noise about the fundamental carrier associated with the clock signal under consideration, similar to the phase noise in a microwave oscillator. This is the phase noise defined in dBc/Hz and an offset from the fundamental carrier or oscillator center frequency, and assumes only harmonic spurious components make up the clock signal spectrum. Additional nonharmonically related deterministic signals will add to the jitter of a digital clock signal. The jitter in a digital ring oscillator can be determined by integrating over the phase noise measurements offset from the oscillator carrier signal, since it is ideally a squarewave with only harmonic spectrum components [5]. 1.3.3

Bit Error Rate

The most important measure of a digital communication system transmission quality is the bit error rate. That is the rate at which digital bits are incorrectly detected at a receiver divided by the total number of digital bits detected. The bit error rate (BER) is used to specify the transmission quality of digital information packets in computer networks, digital telephones, wireless LANS, disk drives, satellite communications, fiber optics, and other communication and memory systems. To characterize the bit error rate, the quantity of digital data received must be large enough to represent the statistical properties of the communication system. For robust practical communication systems which have a low BER, an alternative means of circuit testing must be used to infer BER performance. Direct statistical measurement of low-BER systems could take days, weeks, or years to transmit enough information and is cost prohibitive. An analog/RF parameter for measuring transmission quality related to BER is the “eye opening” or the statistically determined time and amplitude windows of a communication system, see Figure 1.5. The amplitude window is the magnitude between the maximum “0” state signal level and the minimum “1” state over a specified time window (about the signal sampling center). Eye diagrams graphically show the timing jitter and waveform distribution in high-speed digital signal transmissions. As the signal-to-noise ratio decreases between the digitally encoded carrier and random noise sources, the eye duration and eye amplitude decrease. 1.3.4

Isolation

In future ICs, there will be a vast array of electronic functionality within one or two cm2. Today’s state-of-the-art technologies can achieve roughly one-million-transistors per mm 2. Consumers will demand complicated and diverse

8


bit window bit 0 – “0”

bit 3 – “0” eye amplitude bit 2 – “1” bit 1 – “1”

bit 4 – “1” eye duration

Figure 1.5 A digital detector output signal—eye diagram.

digital and analog/RF functions to be performed in inexpensive electronics, for example, cell phones with built-in cameras. Separating these digital analog and RF electronics on the IC circuits by large physical distances may not be a practical or a cost effective method to provide signal isolation. Designs may require the use of costly electric or magnetic shielding or have diminishing crosstalk or coupling isolation as dimensions shrink into integrated circuit environments. An example circuit isolation problem is integrating a very small circuit that requires 120-dBv signal attenuation from transients created by high-speed digital logic located within a distance of tens of microns. Developing differential circuits that reject common-mode interference by 120 dB is not impossible. The designer must employ a combination of circuit isolation techniques and frequency planning to reduce interference between the broadcasting digital circuit and the “victim” receiver circuit. This level of isolation can be found in direct conversion communication receivers which are attractive for integration of wireless communications on CMOS technology. Given this background, it is possible to examine signal integrity issues and the related circuit elements and signaling parameters. For a CMOS digital system, signal integrity techniques seek to preserve the CMOS logic output switching behavior as the output signals propagate through interconnect in an integrated circuit. The field of signal integrity presents a large set of signal-characterization parameters which can specify transient behavior and be used to improve performance.


9

1.4 Interconnect Discontinuities A signal wire or line can exhibit many effects that challenge designers at very high frequencies. High-speed digital signal transitions such as rising and falling waveforms can acquire “ringing” at the leading edges. Physical discontinuities in the metal interconnect can produce electrical impedance mismatches at gigahertz frequencies. Signal reflections are caused by electrical impedance mismatches along interconnect. Analog circuit designers assume a wire in the circuit or a SPICE schematic is a perfect short circuit. High-speed digital circuit and digital IC designers are no longer lucky enough to use this assumption in their signal transmission systems. When the electrical length of interconnect becomes a significant part of the signal wavelength or when the inverse of the total wire resistance and capacitance product becomes large relative to the transistor switching speeds, a wire is no longer a short circuit. Instead, the wire or interconnect must be analyzed as a distributed transmission line system. For instance, a 2-GHz clock has a wavelength of roughly 4 cm for the energy at its fundamental harmonic frequency of 2 GHz on the silicon integrated circuit (for transmission in first-level metal with no nearby neighbor lines). A 1-cm interconnect will exhibit strong distributed transmission line affects (a quarter wavelength section). To exhibit primarily “analog transmission” a wire should be less than one-twentieth the signal wavelength or in this case < 2-mm long. To achieve sharp risetime and falltime transitions it is necessary to transmit at least the fifth harmonic of a squarewave clock. This 5th harmonic signal (10 GHz) for a 2-GHz clock may behave as a strictly analog signal for only 400-µm lengths of IC interconnect. A variety of microwave transmission line characterization techniques serve as a measure of interconnect system quality. Time-domain reflectometry (TDR) measurements (similar to radar but guided by a transmission line) characterize the discontinuities and impedances seen along a transmission line path. For example, time-domain reflectometry is used extensively in locating breaks in buried cable used in cable TV, Internet and telephone transmission. Frequency-domain measurements can extract microwave and RF interconnect performance, or if taken over a wide enough bandwidth (and the circuit behavior is linear and time invariant) can be transformed into equivalent TDR signals.

1.5 Differential Circuit Definitions Differential signal transmission and analog/RF signal processing has been used in the telephone industry for a very long time. The basic wired telephone circuit in the residence or the commercial workplace includes differential transmission and reception circuits with twisted pair wire connections that help reject

10


common-mode noise. Now differential techniques have found their way into RF transceiver systems throughout the analog and high-frequency signal processing. This includes the transceiver integrated circuits in the transmitter, the receiver, and right up to the antenna. In a differential circuit, signals with equal magnitude and opposite phase relative to reference ground potential are transmitted and processed across a matched two-conductor system. In the ideal differential circuit, the ground or dc supply path is not the path for the signal currents or the signal ground return currents to travel to the signal source. The reference ground terminal is ideally at a constant midpotential level between the voltage potential associated with the differential input signal. Figure 1.6 displays a simple balanced differential circuit comprised of two equal amplitude and opposite phase single-ended signal sources, VS1 and VS2 connected to a common ground reference at node 5. The sources have internal source resistances RS1 and RS2 in series with them. The output of the source VS1 at node 1 is connected to load RL1 and output of the source VS2 at node 2 is connected to load RL2. Both loads connect to a common ground at node 6. The electrical relationships for the sources and loads in Figure 1.6 are: RS 1 = RS 2

(1.1)

R L1 = R L 2

(1.2)

V S 1 = −V S 2

(1.3) load

source

IS 3 1

RS1

VN1

RL1 IN 1

VS1 5

6

VS2 RS2 2

VN2

IN 2

RL2 4

Figure 1.6 A balanced circuit representation of a differential source and load, where the reference grounds can be real or virtual. There is a constant voltage potential, ideally, at the midlevel between nodes 1 and 2 and nodes 3 and 4.


11

The signals that flow along the differential two-conductor system do not require a ground path or a dc supply path. In the differential circuit of Figure 1.6, the current IS flows from VS1 through RS1, RL1, RL2 and into RS2 and VS2. A pair of single-ended circuits would have separate currents, IS1 and IS2; IS1 flowing from ground node 5 through VS1, RS1 into RL1 and ground node 6 and IS2 flowing from ground node 6 into RL1, RS2 and VS2 ground node 5. For the differential circuit, IS = IS1 = IS 2

(1.4)

This shows that a balanced differential circuit with the conditions of (1.1) through (1.4), will not have any currents applied to the ground-reference-circuit branches at nodes 5 and 6. In contrast, the single-ended circuits, IS1 and IS2, ground return currents flow as shown in the center of the Figure 1.6. Even when conditions of (1.1) through (1.4) are not perfectly balanced in a differential circuit, the ground reference currents can be two orders of magnitude lower than an equivalent single-ended circuit. A block diagram of a circuit or a schematic can be added between the voltage source elements, VS1, VS2, RS1, and RS2, and the load elements RL1 and RL2 in Figure 1.6. This yields the circuit of Figure 1.7.

1

3

RL1

RS1 VS1

CUT

2

RS2

4

RL2

VS2

Figure 1.7 A four-port network driven with a differential signal source across terminals 1 and 2. The differential source is implemented with two single-ended signal sources with equal amplitude and opposite phase relative to a reference ground.

12


In Figure 1.7, a four-terminal black box, the circuit-under-test (CUT), represents a differential or balanced network. The input single-ended sources and source resistances VS1, VS2, RS1, and RS2, are placed at nodes 1 and 2 relative to ground reference, while the load resistances RL1 and RL2, are placed at circuit nodes 3 and 4 relative to ground reference. If the CUT is linear and time invariant, then the superposition of the CUT responses to the applied single-ended independent signal sources solves the overall circuit transfer function. In other words, the two signal sources VS1 and VS2 are applied separately, one at a time, with the unapplied signal source terminal terminated in load RS1 or RS2 during the measurement. This works because a single-ended signal applied to any terminal relative to reference ground, results in a differential wave applied across the single-ended terminal and any other terminal associated with the CUT. A further simplification of a balanced differential circuit is shown in Figure 1.8. The input and output ports are paired as a two-terminal conductor set. For a single-ended circuit, differential terminals 2 and 4 would be set to the zero voltage ground (GND) reference. For the differential circuit of Figure 1.8, VS and RS are split in two equal and opposite phase parts, to find the ground reference point on the source side. In addition, RL can be divided into two equal parts and the load GND reference node is found between these parts. The equations for this circuit as related to (1.1), (1.2), (1.3), and (1.4) and Figure 1.8 become R S = R S 1 + R S 2 = 2R S 1

(1.5)

R L = R L 1 + R L 2 = 2R L 1

(1.6)

V S = V S 1 + V S 2 = 2V S 1

(1.7)

3

1

RS CUT

RL

VS

2

4

RS = RS1 + RS2 RL = RL1 VS = 2VS1 IS = IS1

Figure 1.8 A two-port-differential network with four terminals, port 1 consists of terminals 1 and 2 while port 2 consists of terminals 3 and 4.


IS = IS1 = IS 2

13

(1.8)

In summary, the ideal differential or balanced system has eliminated all the ac signal currents between the ground reference terminals that are seen in the single-ended system. This is a key feature in analog, RF, and microwave differential circuits, where a nonzero ground impedance can introduce noise and crosstalk into the circuit via the ground node. In an ideal balanced differential network, all the RF/microwave interference signals introduced through the ground reference nodes are eliminated. In addition, the ac voltage potential drop across the ground node is drastically lowered making the balanced circuit introduce much less noise into nearby circuits.

1.6 Electromagnetic Coupling Interference signals can be introduced into the simple balanced differential circuit of Figures 1.6, 1.7, or 1.8, either by conductive means or by electromagnetic crosstalk. Conduction paths via the ground reference or power rails are most common since circuits often share a ground reference or a dc power supply. Careful circuit design controls this crosstalk. Electromagnetic coupling through electric means, magnetic means, or a combination of both is much more difficult to avoid. The IC environment is particularly susceptible to coupling since shielding of circuits is not an attractive option; shielding requires large amounts of very costly IC circuit area. Figure 1.9 shows how capacitive single-ended interference signals, V7 from node 7 couple into a differential circuit as VN1 and VN2. Figure 1.9 shows that the interference signal V7 is coupled through the differential transmission line circuit via capacitors C17 and C27. In the metal conductor transmission lines, C17 and C27 represent the area plate capacitance and the fringe capacitance between the interference source conductor V7 and the balanced differential line conductors. Two simple voltage divider relationships below describe the noise voltages, VN1 and VN2 induced into the differential circuit from the interference source V7. The impedances, Z1 and Z2 for the differential lines include all coupling mechanisms between the lines and are dependent on each other’s value. Z1 and Z2 include the parallel combination of the transmission-line source resistance, load resistance, and any additional parasitic component connected to the source and load. In (1.9) and (1.11), ZCoupling17 and ZCoupling27 represent the impedance of the coupling capacitances C17 and C27, V N 1 =V 7 =

Z1 Z 1 + Z Coupling 17

(1.9)

14

Microwave Differential Circuit Design Using Mixed-Mode S-Parameters Differential balanced pair

C17

3

4

Z1

Z2

7

C27

V7

Interference source

2

1

VN1

VN2

Figure 1.9 An electric or capacitive coupling or crosstalk model of a differential pair and a single-ended conductor.

V N 1 =V 7 =

Z1 1 + 1 j ωC Z 17 1

V N 2 =V 7 =

Z2 Z 2 + Z Coupling 27

V N 2 =V 7 =

1 1 + 1 j ωC Z 27 2

(1.10)

(1.11)

(1.12)

To find the differential noise of the coupled Vdn system, subtract VN1 – VN2, and use the Taylor’s series expansion,

V dn

    1 1 =V 7  −  j  1 − j 1 − ωC 17 Z 1 ωC 27 Z 2  

(1.13)


15

j j   V dn ≈ V 7 1 + ωC Z − 1 + ωC Z     17 1 27 2

(1.14)

j j V dn ≈ V 7  ωC Z − ωC Z   17 1 27 2

(1.15)

Electric coupling of an interference signal into a differential pair can be reduced or eliminated as the differential pair approaches a perfectly balanced circuit, designed with equal coupling to an externally applied interference signal. Mixed-mode scattering parameters can be used to determine the level of perfection achieved in the design of a differential pair. By including the third conductor with node 7, shown in Figure 1.9, into the mixed-mode s-parameter characterization, the crosstalk or coupling can be determined and optimized for reduced signal integrity impact. Figure 1.10 shows the case of magnetic interference coupling of a single-ended interference current loop field across the open area of a differential current loop. In Figure 1.10, a noise source V3 creates a current, I3 from node 8

3

VN1 = jωM31I3 Z1 1

Z

9

Noise source

Z3 8

V3

Z2 I3 4

Z

2

VN2 = jωM32I3

Figure 1.10 A magnetic or inductive coupling or crosstalk model of a differential pair and a single-ended conductor.

16


to node 9. The current I3 creates a magnetic field which couples into the two transmission lines of a differential pair shown on the right of Figure 1.10. A noise source V N 1 = jωM 31 I 3 is induced into the top line and a second noise sourceV N 2 = jωM 32 I 3 is induced in the lower transmission line. The magnetic coupling area of the loops in the differential circuit will determine the amount of interference or crosstalk. When the interference signal loop V3 is aligned in parallel with the differential circuit as shown in Figure 1.10, the maximum electromagnetic field area is present and the crosstalk interference is greatest. Magnetic field penetration into the differential loop is indicated by the large dots inside the differential loop of nodes 1, 3, 4, 2, and by closing the loop back at node 1. Figure 1.10 shows this magnetic field coupling with penetrating magnetic field lines within the differential loop. Rotating the differential circuit by 90° (so the circuits are perpendicular) will minimize the interference signal area of the electromagnetic field coupling. This will drastically reduce the magnetic coupling factors, M 31 and M 32 in the differential circuits, but this fix is frequently not physically possible. Since the area of the conductor loop determines the magnetic coupling, designing the differential pair with a smaller loop area will reduce the interference crosstalk. An alternative differential pair design twists the differential circuit conductors together (creating a twisted pair conductor), causing the magnetic coupling to reverse direction in each nearby differential pair coupling loop. This concept is shown in Figure 1.11, in which there is one twist in the differential transmission circuit receiving the magnetic noise from V3. The total noise between nodes 3 and 1 is V Node 31 = j ωM 39 I 3 − j ωM 39 I 3 = 0

(1.16)

In addition, the total noise between nodes 4 and 2 is V Node 42 = j ωM 48 I 3 − j ωM 48 I 3 = 0

(1.17)

This shows that the magnetic field coupling can be eliminated by constructing equal areas for successive twists in differential loops to capture equal magnetic field patterns but induce noise of opposite polarities. Elimination of the crosstalk induced by coupled magnetic fields is limited by the imbalances in the twisted pair differential loops and by differences in the proximity of the interference source. Figure 1.12 shows an equivalent transformer circuit model for a singleended inductive (magnetic) coupled interference source to the differential conductor transmission lines derived from Figure 1.10. In Figure 1.12, I3 has mutual coupling M48 and M39 to create two noise sources, VN1 and VN2 with opposite polarities. The noise sources have the same source impedance, Z, and


17

9

Noise source

Z9

4

8

VN2 =− jωM48I3 V8

I3

Z4

VN1 = jωM39I3

1

Z3

Z

3

VN1 =− jωM39I3

Z VN2 = jωM48I3 2

Figure 1.11 A magnetic or inductive coupling or crosstalk model of a differential twisted pair and a single-ended conductor.

the added load impedance, Z1 plus Z2. Because this is a differential circuit, the noise sources are applied as a common-mode signal to the load and only the differences in the noise sources’ coupling parameters create a differential current. The total differential noise, Vdn, becomes V dn = j ωI 3 ( M 48 − M 39 )

(1.18)

18

Microwave Differential Circuit Design Using Mixed-Mode S-Parameters 4

M48

VN1 = jωM48I3

8

I3

2 1

Z Z

Z1 + Z2

9

VN2 = jωM39I3

M39 3

Figure 1.12 A transformer model of single-ended coupled interference to a differential coupler pair.

1.7 Common-Mode Impedance Rejection of Differential Circuits In typical RF/microwave integrated circuit design, there are many circuits as possible tied together on power lines and ground lines to keep the total circuit area small (cost low). A high-power microwave circuit can cause problems by injecting signals into the power and ground lines. The conductor impedance associated with the power and ground lines will result in voltage drops across these lines and induce signals into nearby circuits. It is important to design microwave circuits that reject common-mode impedance coupling from common-ground lines, dc supply lines, and common-bias lines. It is also important to design sufficient on-chip bypass capacitance to connect between power lines and ground lines and control the level of these injected signals. The injected voltage drops in the power supply lines will vary in time and will be a function of the bias current variation over time. Figure 1.13 shows the case of two circuits sharing a common power supply and ground connections. If circuit 1 is switched off and on at different times as often happens in a portable wireless circuit then the bias current i1(t ) can go from full bias current, i1(t ) = iimax to potentially zero current, i1(t ) = 0 in submillisecond intervals. This results in a changing voltage developed across the conductor impedance, ZS that will be proportional to i1(t ) + i2(t ). If i2(t ) exhibits a constant bias over time as in the case of a low-noise amplifier in a receiver circuit front-end section, the power supply voltage (VSS+) will be modulated by the time varying current of circuit 1, i1(t ). There can be a corresponding ground reference voltage, (VSS−) modulation if the two circuits share a common impedance to the ground conductor, ZG as well. There are several methods to reduce this form of interference: (1) use separate power supply and ground conductors for sensitive circuits, known as a star connection, (2) keep


19

Power supply

Common interconnect impedance

i1(t)+i2(t) i1(t)+i2(t) Zs

Zg

i2(t)

VSS+ = Zs(i1(t) + i2(t)) VSS− = Zg(i1(t) + i2(t))

i1(t)

Circuit 2

Circuit 1

Receiver/Source

Source/Receiver

Figure 1.13 A common-mode impedance coupling model.

the power supply conductor impedance small, ZS ≈ 0 and ZG ≈ 0, and (3) reduce the time varying dc currents in each of the circuits 1 and 2. These methods are not always practical. At best these methods improve the common impedance interference but the techniques give diminishing returns as the demand for microwave circuit dynamic range increases. By processing signals differentially in a microwave circuit, there is an inherent rejection to both power supply and ground reference common-mode interference signals. Figure 1.14 shows a differential microwave circuit with a supply interference noise source, VNS or ground interference noise source, VNG represented as a noise signal in series with the bias voltages. In this example, two ideal singleended low-noise amplifiers (LNAs) paired together are used to represent a differential low-noise amplifier (DLNA). The RF/microwave input signal is applied in a differential fashion across the two single-ended LNA inputs. The expected circuit output without noise is the difference between the LNA’s outputs,

20

Microwave Differential Circuit Design Using Mixed-Mode S-Parameters DC supply

VNS

+Vin

−Vin

G1

+VinG1 + x1VNS + y1VNG

G2

−VinG2 + x2VNS + y2VNG

VNG

Figure 1.14 Common-mode model of supply and ground reference interference rejection by a differential circuit.

V out = (+V in G 1 ) − ( −V in G 2 )

(1.19)

Here, G1 and G2 are the gains of LNA1 and LNA2, respectively. If the two LNAs have equal gain, G1 = G2 = G, then the output is V out = 2V in G

(1.20)

To simplify the noise rejection analysis of this circuit, small signal, time invariant, single-frequency signal and noise sources are assumed. Then, a simple transfer function will model the noise injection at the supply and ground reference to the output of the LNAs. This LNA output response is represented by a linear function with the new parametric coefficients x1, x2, y1, and y2 shown on the right of Figure 1.14. If the LNA designs are on the same IC and in close proximity, then the coefficients should have the same magnitude and phase values, (x1 ≈ x2, y1 ≈ y2). The designer must connect the LNA supply and ground conductors to ensure each amplifier has the same supply and ground reference


21

impedances as well. The resulting desirable signal and common-mode interference signals will present themselves at the output with the following relationship: V out =

[(+V

in

] [(+V

G 1 ) + x 1V NS 1 + y 1V NG 1 −

in

]

G 2 ) + x 2V NS 2 + y 2V NG 2 (1.21)

If all the key differential common-mode parameters are carefully balanced, the common-mode supply and ground interfered signals are eliminated or cancelled. In practical IC designs, it is possible to achieve balancing between some circuit elements in close proximity (capacitors) to within 1% or better. As mentioned earlier in this section, common-mode impedance in the power supply connections improves with the use of bypass capacitance, also called supply decoupling. The supply and ground conductors associated with each circuit would be routed individually to a common point closest to the supply terminals, referred to as a star connection and shown in Figure 1.15. This reduces the value of the series resistance common to the conducting path of both circuits. A separate bypass capacitor for each circuit, is placed across the supply and ground terminals as close as possible to the circuit. There are two ways of considering the value of the bypass capacitor, as a frequency-domain RC filter that isolates the two circuits, or as a time-domain charge storage reducing the supply and ground voltage change due to the circuit supply loading changes with time. Isolation improves by maximizing the series impedance between the two circuits while minimizing the shunt low-impedance bypass across each of the circuit’s star supply connections.

1.8 Increased Distortion-Free Dynamic Range with Differential Circuits Power levels of a wireless communication system cannot be scaled like a digital system because of communication-link-noise margins. Lowering supply voltage of an analog circuit signal must be compensated with an increase in the current to maintain a constant peak output power level into a given load impedance. However, an increase in current means an increase in the common-mode crosstalk or signal coupling between circuits. Converting a single-ended circuit to differential offers a 6-dB output-power-level increase: This offsets effects of lowering the supply voltage by a factor of two. An additional benefit of differential microwave circuits is an increase in the dynamic range compared to a similar single-ended circuit implementation (for a given supply voltage). This can be critical in an IC market in which supply voltage decreases through scaled IC technologies to reduce digital circuit power consumption. In addition, reducing supply voltage decreases the number of battery storage cells and thus cost in portable circuits. The dynamic range in a

22

Microwave Differential Circuit Design Using Mixed-Mode S-Parameters Star connections

Power supply

C

Zg2

Zg1

Zs2

Zs1

C1

C2

bypass caps

Circuit 2

Circuit 1

Receiver/Source

Source/Receiver

Figure 1.15 A common-mode model of supply and ground reference interference with separate supply and ground star connections.

communications RF/microwave circuit is defined as the ratio of the largest distortion-free signal to the smallest noise free signal in the circuit. The noise power of a circuit is a function of the circuit resistances, the circuit transistor noise sources, and the bandwidth of the signals being processed. In contrast, the maximum distortion-free signal power that can be processed by a circuit is directly related to the circuit supply voltages for a given load value. Figure 1.16 shows a comparison of a single-ended circuit dynamic range and a differential circuit dynamic range. In a well-designed single-ended circuit, the maximum output voltage swings over nearly the entire supply range, from VSS+ to GND. If two circuits are used in a differential application, the output voltage range is doubled, or increased by 6 dB. To understand this concept,

Differential Circuit Technology +Vin

23

V(supply to ground reference) G

RS

+Vin

V (reference +/− supply) G1 RS V (reference) G2 RS

−Vin

Figure 1.16 A demonstration of differential signal dynamic range improvement by 6 dB.

compare one output voltage relative to the other in the differential circuit; that is consider one of the voltages as the reference. The nonreference output voltage can range from positive VSS+ to −VSS+ relative to the reference voltage. This differential circuit exhibits a factor of two times the single-ended output voltage range.

1.9 Nonlinear Even-Order Distortion Improvement with Differential Circuits An important additional benefit of differential circuits is the cancellation of the even-order harmonic distortion terms as compared to the even-order terms of a single-ended circuit. The output frequency response of a stable nonlinear time-invariant circuit at a single dc operating point to a single (or multiple) frequency input signal can be represented as a power series of harmonics. This power series is a mathematical expansion of the nonlinearities that occur at the bias point of the nonlinear circuit. Each harmonic term in the power series expansion of the output signal has a unique coefficient. For the purposes of illustrating harmonic even-order cancellation using simple mathematics, real coefficients (a0,a1, ..., aN) are assumed for the power series (Taylor series) expansion, V out = a 0 ( x ) + a 1 ( x ) + a 2 ( x ) + a 4 ( x ) + K 2

3

4

(1.22)

24


x

a0(x)0 + a1(x)1 + a2(x)2 +a3(x)3 +a4(x)4 + ...

G

Figure 1.17 The transfer function f (x) of a nonideal gain stage.

This is shown for an LNA in Figure 1.17. The input variable x in this figure is typically replaced with a single sinusoid or a pair of sinusoidal inputs in order to analyze the gain compression behavior and the two-tone intermodulation response of the nonlinear LNA circuit. To demonstrate the improvement in the even-order harmonic response, x is replaced by a single sinusoidal signal of amplitude A, radian frequency ω(t), and phase θ(t), x = A sin ( ω(t ) + θ(t ))

(1.23)

Inserting (1.23) into the second term on the right side of (1.22) produces the second harmonic term, a2(x)2 in the nonlinear circuit, a 2 ( x ) = a 2 ( A sin ( ω(t ) + θ(t )) ) 2

2

2  A a 2 ( x ) = a 2   (1 − cos( 2 ω(t ) + 2 θ(t )) )  2

(1.24) (1.25)

In the above equations, a2 is the power series second-term coefficient. Differential circuits extend this single-ended example to a differential implementation of two independent LNAs driven with equal magnitude and opposite phase input signals x and −x. Figure 1.18 shows this with −x representing a sinusoid of magnitude A, frequency ω(t) and phase 180° and x representing a sinusoid of magnitude A, frequency ω(t) and phase 0°. Both x and −x travel through LNAs (G1 and G2) and undergo the same nonlinear power series expansion, of (1.22). The second harmonic output of G1 and G2 is shown in Figure 1.18 for the differential circuit, where the differential output is determined by subtracting the two output terminal voltages for all the terms of the power series of (1.22), for two ideal-matched LNAs a21 = a22. The difference between the second-order harmonic terms is


25

a21A/2 (1−cos(2ω(t) + ap1 + 2*0°))

x = A sin(ω(t) + 0°) G1

−x = A sin(ω(t) + 180°)

a22A/2(1−cos(2ω(t) + ap2 + 2*180°)) G2

Figure 1.18 Differential even-order nonlinear signal processing model with second-order relationships.

 A V out 2 =   [(a 21 − a 22 ) + a 22 cos( 2 ω(t ) + 360°) − a 21 cos( 2 ω(t ) + 0°)](1.26)  2 For the ideal perfectly balanced LNAs, Vout2 = 0 and there is no secondharmonic term present in the differential output signal. There is equal amplitude and phase second-order terms at each of the single-ended LNA outputs; this cancels when processed differentially. The same canceling result occurs for all even-order terms higher than second-order terms with properly matched LNA specifications and distortion behavior.

1.10

Conclusions

After examining all the benefits of using differential circuits, one can ask, “Why aren’t differential circuits more popular with circuit designers?” The signal processing that occurs in differential circuits provides improvement in rejection of electromagnetic interference, increased common-move signal rejection from supply and ground conductors and 6-dB increase in dynamic range rejection of even-order harmonic distortion. While the disadvantages of differential circuits include an increase in transistor drain (or collector) current of between 1.2 to 2, doubling of circuit complexity and an increase in design and verification time over single-ended circuits. Some of these disadvantages are subjects of strong debates. For example, it may be difficult to achieve a common-mode supply rejection specification with single-ended circuits and require excessive design time as compared to designing with differential circuits in the first place.

26


However, there was one disadvantage that was the most significant disadvantage for microwave differential circuits; microwave differential circuits could not be directly measured. There were no direct methods of measurement that led to the determination of the balanced parameters that can be used to optimize microwave circuit performance. This was true until the development of differential-mode and common-mode s-parameters. These new parameters along with cross-mode parameters are incorporated together as mixed-mode s-parameters. The mixed-mode s-parameters provide a means of representing a differential circuit as a four-port set of s-parameters. This 4 × 4 set of s-parameters transforms into four sets of 2 × 2 s-parameters representing four modes of microwave operation. These modes are differential-mode input to differential-mode output, differential input to common-mode output, common-mode input to differential-mode output, and common-mode input to common-mode output. The rest of this book is devoted to presenting the theory, analyses, and circuit design examples of mixed-mode s-parameters for microwave design. Chapter 2 presents mixed-mode s-parameter theory and examples. Chapter 3 presents balanced transmission line basics, Chapter 4 shows balanced small-signal amplifier theory, Chapter 5 reviews mixed-mode techniques applied to three-port hybrid splitters and combiners, Chapter 6 discusses mixed-mode s-parameters applied to four-terminal components and Chapter 7 concludes with mixed-mode analysis applied to the time domain. The reader is directed to the accompanying CD with s-parameter design examples and IC technology. This CD holds a unique, general access, simplified 180-nm SiGe BiCMOS IC technology design kit from Jazz Semiconductor, for the Agilent ADS simulator. This software allows readers to design very realistic microwave ICs and explore prepared example circuits and problems from the design chapters in the book.

References [1]

International Technology Roadmap for Semiconductors: 2004 Update, “Overall Roadmap Technology Characteristics,” pp. 16–20, http://public.itrs.net/.

[2]

Bockelman, D. E., and W. R. Eisenstadt, “Combined Differential and Common-Mode Scattering Parameters: Theory and Simulation,” IEEE Trans. on Microwave Theory and Techniques, Vol. 43, No. 7, July 1995, pp. 1530–1539.

[3]

Rabaey, J, M., A. Chandrakasan, and B. Nikolic, Digital Integrated Circuits, 2nd ed., Chapter 5 “The CMOS Inverter,” Upper Saddle River, NJ, Prentice Hall, 2003.

[4]

Signal Integrity, Star-HSpice Manual, Release 1998, Chapter 20.

[5]

Hajimiri, A., and T. H. Lee, The Design of Low Noise Oscillators, Boston, MA: Kluwer Academic Publishers, 1999.

2 Mixed-Mode S-Parameters 2.1 Introduction Scattering parameters (s-parameters) greatly assist in the design, analysis, simulation and measurement of many linear RF and microwave active devices such as transistors and diodes, and of many passive components such as transmission lines, resistors, capacitors, inductors, and others. Moreover, s-parameter measurement techniques characterize active devices terminated in finite impedances (typically 50Ω) commonly seen in microwave systems. Other small-signal parameters used in linear analog circuit design such as z-parameters and y-parameters require opens and short circuits during measurement. These parameters are defined and developed in Section 6.2. Microwave design requires s-parameter-based impedance matching to optimize noise and gain. Proper microwave circuit analysis can require designers to calculate parameters such as two-port simultaneous conjugate match (Gt max) and stability (K ). These calculations are complex without the simplification of s-parameters. Moreover, the measured data that can be used for these calculations comes in the form of s-parameters. This chapter extends the definitions of standard single-ended two-port s-parameters to more complex four-port (differential) microwave circuits and signal processing applications. Single-ended RF/microwave systems have an input port and an output port both referenced to ground. In contrast, differential microwave circuits have even numbers of ports taken in pairs. A four-port differential circuit has one pair of ports at the input and one pair at the output. Signal levels are referenced between the inputs of the pairs of ports. The four-port differential system can be a far more “natural” system for the microwave IC designer. For example, modern WLAN and Bluetooth 27

28


transceivers must use differential signal processing to reduce common-mode noise and maintain gain in a low-voltage environment. Four-port systems can be analyzed as four separate ports in a single-ended fashion or as two pairs of differential ports in a mixed-mode fashion. This chapter presents the circuit and signal transmission theory behind the mixed-mode s-parameters for differential microwave IC design. Figure 2.1 shows the signal flow of mixed-mode power waves used to characterize the response of a two-port differential device-under-test (DDUT). In Figure 2.1, the ad1, ad2, ac1, and ac2 and power waves are incident on the DDUT at mixed-mode ports 1 and 2 and the bd1, bd2, bc1, and bc2 power waves are reflected from the DDUT at mixed-mode ports 1 and 2. The designer can determine the DDUT input impedance and gain by knowing the definition of these power waves in terms of the circuit voltages and currents and by taking the ratios of these power waves. Sections 2.2 through 2.5 will develop the theory behind mixed-mode power waves and s-parameters. A key feature of mixed-mode s-parameters is that they naturally decompose into a differential-mode signal representation and a common-mode signal representation. These signal representations can be directly interpreted using a microwave engineering background in two-port s-parameter circuit design and analysis. This is not true for single-ended four-port s-parameters. Examples of microwave-design applications that benefit from this new mixed-mode approach include low-noise differential amplifiers, splitter/combiners, four-port couplers and RF transformers. In addition, package, board and interconnect performances of high-speed digital I/O systems are best characterized using mixed-mode s-parameters. The signal processing of a microwave mixed-mode application is different than that found in a two-port single-ended application. For differential circuits, x = x1

x = x2

ac1

ac2

ad1

ad2

bc1

bc2

DDUT bd1

bd2

Port 1

Port 2

Figure 2.1 Incident and reflected waves in a differential two-port device-under-test (DDUT).


29

the microwave designer maximizes the gain and minimizes the noise of the differential-mode signals but introduces strong attenuation to the common-mode signals in the circuit. This eliminates noise coupled to input ports or output ports from entering the microwave circuit and also helps remove noise introduced through the power supplies. Single-ended microwave circuits do not have this built-in mode of noise cancellation. This chapter will develop a set of s-parameter definitions that apply to differential-mode, common-mode, and mixed-mode signal propagation in microwave circuits. Mixed-mode s-parameters include differential-mode, common-mode, and cross-mode signals. Cross-mode signals occur when there are imbalances in microwave circuits, often due to manufacturing imperfections, and signal energy is converted from differential-mode to common-mode or common-mode to differential-mode. To illustrate this concept, a 4 × 4 matrix of sixteen standard s-parameters representing a four-port DLNA can be transformed to a set of four 2 × 2 mixed-mode s-parameter submatrices as in (2.1). Here, the four 2 × 2 submatrixes represent four possible mode-specific wave circuit responses, differential-mode input to differential-mode output, differential-mode input to common-mode output, common-mode input to differential-mode output, and common-mode input to common-mode output. This transformation is presented in Section 2.6: S 11 S  21 S 31 S  41

S 12 S 22

S 13 S 23

S 32 S 42

S 33 S 34

S 14  S dd 11 S S 24   ⇔ Transformation ⇔  dd 21 S 34  S cd 11 S 44  S cd 11

S dd 12  S dc 11 S dd 22  S dc 21 S cd 11  S cc 11 S cd 11  S cc 21

S dc 12  S dc 22  (2.1) S cc 12  S  cc 22

Mode-specific wave responses refer to a circuit’s differential-mode input to differential-mode output response, the common-mode input to common-mode output response, the differential-mode input to common-mode output response, and the common-mode input to differential-mode output response. For the balanced LNA example, the desired mode-specific response is a high-gain differential-mode input to differential-mode output, with all other mode-specific waves repressed (attenuated). Mixed-mode s-parameters provide a set of tools to analyze how well this DLNA design attenuates the undesired common-mode wave while enhancing the desired differential signal gain. The authors’ experience is that a truly differential signal-processing measurement system has a large inherent dynamic range improvement over a singleended measurement system. A custom-build pure-mode s-parameter measurement system was developed from commercial network analyzer equipment [1]. To realize this dynamic range improvement, this measurement system applied

30


differential-mode and common-mode signal sources across the input and output ports of the device-under-test (DUT). The pure mode network analyzer block diagram is reported in Section 2.5 and there is a detailed description in [1]. Fortunately, improvements in dynamic range of modern network analyzers make a matrix transformation of four-port single-ended network analyzer data to mixed-mode s-parameters useful for most microwave test applications (see Section 2.6). This chapter will develop the full mathematical details of the definitions of mixed-mode s-parameters in terms of voltage and currents. In addition, the transforms that go between mixed-mode s-parameters and standard singleended s-parameters are presented.

2.2 Mode Definitions An n-port mixed-mode RF circuit consists of an even number of n terminals arranged in n/2 sets of two-port pairs. It is possible to mix single-ended ports and mixed-mode ports in a device such that there are m single-ended ports and n/2 mixed-mode ports (in two-terminal pairs) in which the total number of device ports are m+n. This is addressed in Chapter 5. For the sake of simplicity, however, this mathematical development will focus on purely mixed-mode RF circuits. A two-port mixed-mode system is shown in Figure 2.2. The port on the left side of Figure 2.2, for this discussion, is designated as the “input port,” while the port on the right-hand side of the figure is the “output port.” Voltages V1 and V2 are applied to the mixed-mode input port resulting in currents, I1 and I2. In addition, voltages V3, and V4 are applied to the mixed-mode output port resulting in currents, I3 and I4. The differential voltage applied to the input port x = x2

x = x1 b1 a1

b3 ν3

ν1

i1

DUT

b2 a2

ν2

i3 b4 ν4

i2

Port 1

Figure 2.2 RF differential two-port or single-ended four-port circuit.

a3

i4 Port 2

a4


31

is defined as V1 – V2. The output port differential voltage is V3 – V4. There is an interesting physical difference in this differential circuit compared to a singleended circuit. The differential circuit does not require any portion of the signal current into or from the port input terminal to return from or into the port ground conductor; while the single-ended circuit does. A RF differential signal source produces balanced signals or waves into the mixed-mode input ports of the DUT. These are two equal amplitude signals or waves with equal magnitude voltages and opposite phases as referenced to ground that are applied to the input terminal pair. When applying a differential signal in vector terms, v1 = –v2 and i1 = –i2. The total applied differential voltage is 2v1 and the total differential current is i1. Given an arbitrary source, the differential-mode voltage between a pair of port terminals is defined as the difference between voltages applied to the terminal pair. In a similar manner, the differential-mode current is defined as a difference between the currents entering the pair of terminals divided by two. From this assumption, (2.2), (2.3), and (2.4) define the differential voltage vd(x), the differential current id(x), and the differential impedance zd(x) of the input port 1 as a function of the terminal voltages and currents and the physical distance, x in the circuit. The differential voltage and current vary as a function of the distance x because a transmitted wave varies in phase and magnitude with distance in a distributed circuit: v d ≡ (v 1 − v 2 )

(2.2)

1 (i 1 − i 2 ) 2

(2.3)

v df i df

(2.4)

id ≡

Zd ≡

In (2.4), the superscript f represents forward-wave propagation or voltage or current waves going into the circuit and the subscript r represents reverse-wave propagation or waves going out of the circuit. A common-mode signal can be applied to the circuit inputs in the same fashion as the differential-mode signal. In this case, identical voltages and currents are applied to the mixed-mode ports; in vector terms, v1 = v2 and i1 = i2. Given an arbitrary source, the common-mode voltage between a pair of port terminals is defined as the average of the voltages applied to the terminals. In a similar manner, the common-mode current is defined as the sum of the current entering the pair of terminals. Equations (2.5), (2.6), and (2.7) define the common-mode voltage vc(x), the current ic(x), and impedance zc(x) of the

32


mixed-mode input port one as a function of arbitrary input terminal voltages and currents. Common-mode signals can be relationships composed of forward, f and reverse r waves denoted in a manner similar to differential-mode relations, vc ≡

1 (v 1 + v 2 ) 2

i c ≡ (i 1 + i 2 ) Zc ≡

(2.5) (2.6)

v cf i cr

(2.7)

2.3 Mode-Specific Waves and Impedances The voltage and current wave properties in an RF/microwave transmission lines are defined by the Telegrapher’s equation. This equation describes propagation in two directions in a microwave system. For convenience, one direction is described as the forward direction and the second direction as the reverse direction, with v f ( x ) being the amplitude of the forward wave and v r ( x ) being the amplitude of the reverse wave. In Figure 2.2, forward propagation is toward the input and mixed-mode port 1 and reverse propagation is away from the input at mixed-mode port 1. Differential-mode and common-mode s-parameter relationships are composed of forward-power waves and reverse-power waves as defined in Section 2.4. In fact, the dominant signal-propagation modes in most systems with two parallel conductors can be broken into even-mode and odd-mode waves. These even-mode and odd-mode waves can be directly measured through common-mode and differential-mode s-parameters. By using the forward-wave and reverse-wave definitions, mixed-mode s-parameters can be mathematically related at a physical point in the microwave circuit to the standard voltages and currents of an analog circuit. Figure 2.3 shows how the forward and reverse differential-mode-specific waves interact in a mixed-mode two terminal port. Figure 2.3 uses microwave notation in which voltage waves v 1f and v 2f at terminals 1 and 2 are launched toward the DUT. These waves interact with the DUT and voltage waves v 1r and v r2 are reflected from the mixed-mode input port. At an arbitrary point x, the magnitudes of the forward and reverse waves can be added to produce standard analog voltages v1 and v2 as shown in (2.8) and (2.9). v 1 = (v f 1 + v r 1

)

(2.8)


33

x

v1f

v1r DUT v2r v2f

Port 1

Figure 2.3 Differential mixed-mode port-specific wave model.

v 2 = (v f 2 + v r 2

)

(2.9)

In (2.8) and (2.9), vf 1 and vf 2 represent the forward waves shown in Figure 2.3; vr1 and vr2 represent the reverse waves shown in Figure 2.3. Combining (2.8) and (2.9) with (2.2) defines the forward and reverse differential-mode waves:

)

v d = v 1 − v 2 = (v f 1 + v r 1 − (v f 2 + v r 2

)

(2.10)

v fd = v f 1 − v f 2

(2.11)

v rd = v r 1 − v r 2

(2.12)

The total differential-mode-specific voltage wave is then v d = (v fd + v rd

)

(2.13)

A similar procedure develops the differential-mode-specific current waves. This procedure gives the total differential-mode-specific current wave as i d = (i fd − i rd

)

(2.14)

34


The differential port impedances are found by dividing the differential voltage wave by the differential current wave at a point x in the microwave circuit, Zd =

vd id

(2.15)

A similar procedure obtains the common-mode-specific voltage and current wave relationships and the common-mode impedance, Zc =

vc ic

(2.16)

2.4 Normalized Power Waves Normalized power waves are used for the definition of single-ended s-parameters. First, the normalized power waves that occur in a uniform transmission line are presented. These are developed by normalizing voltage and current waves (V and I ) of a single-ended microwave circuit. Lowercase notation is used to describe the normalized power waves (v and i ), v=

V

i=

I

Z0 =

Z0

Z0 V (x ) I (x )

(2.17)

(2.18)

(2.19)

Here, Z0 is defined in a single physical point x on a transmission line for the single-ended case. The normalized forward and reverse waves are composed of the forward and reverse subcomponents, a(x ) =

b (x ) =

V f (x ) Z0 Vr (x ) Z0

(2.20)

(2.21)


35

Here, a(x) is the normalized power wave propagating in the forward direction (positive x toward the DUT) and b(x) is the normalized power wave traveling in the reverse direction (away from the DUT). The normalized voltage and current waves can be found easily from the normalized power waves in the single-ended system, v = (a + b )

(2.22)

i = (a − b )

(2.23)

A more formal definition of the generalized forward and reverse waves of a multiport system at port n with characteristic system impedance, Zn at port n is given in the literature [2], 1

an =

bn =

2 Re( Z n

)

1 2 Re( Z n

)

(v n + i n Z n )

(2.24)

− i n Z n* )

(2.25)

(v n

The differential-mode-specific normalized power wave definitions across a pair of single-ended terminals as shown on port 1 of Figure 2.3 are: 1

ad 1 =

bd 1 =

2 Rd1 1 2 Rd1

(v d 1 ( x ) + i d 1 ( x )R d 1 ) x = x

1

(v d 1 ( x ) − i d 1 ( x )R d 1 ) x = x

1

(2.26)

(2.27)

In (2.26), (2.27), (2.28), and (2.29), Zd Re [Zd] Rd and Zc Re[Zc] Rc. The common-mode-specific normalized power wave definitions across a pair of single-ended terminals as shown on port 1 of Figure 2.3 are: ac 1 =

bc 1 =

1 2 Rc1 1 2 Rc1

(v c 1 ( x ) + i c 1 ( x )R c 1 ) x = x

1

(v c 1 ( x ) − i c 1 ( x )R c 1 ) x = x

1

(2.28)

(2.29)

36


The normalized power wave elations for differential-mode-specific and common-mode-specific waves have different impedance values when extended from single-ended definitions. For a typical single-ended microwave system, Z0 50 but for the related differential-mode-specific wave, Zd 100 and for the related common-mode-specific wave, Zc 25 . Mixed-mode parameters can be analyzed and measured with single-ended models and single-ended s-parameter measurement equipment. The necessary transformations from single-ended s-parameter data to mixed-mode s-parameter data are reported in Section 2.6. The simplest method of acquiring standard four-port s-parameter data for mixed-mode analysis is to use a four-port network analyzer and connect the four single-ended network analyzer ports to the four mixed-mode terminals. One pair of single-ended ports will go to each mixed-mode port. The system can be calibrated using common s-parameter measurement standards and the multiport network analyzer readily acquires the sixteen terms of standard four-port s-parameter data. The sixteen-term four-port s-parameter data matrix is shown in (2.1). To measure standard s-parameter data for two-port mixed-mode circuit responses with a standard two-port network analyzer requires a “round robin” of six test setups with two-port single-ended s-parameter equipment. One possible (brute force) sequence of single-ended measurements would be to attach the network analyzer, calibrate and take data at single-ended ports 1 and 2, ports 1 and 3, ports 1 and 4 and ports 2 and 3, ports 2 and 4 and ports 3 and 4 in succession. The ports not connected to the two-port network analyzer are connected to 50Ω loads. This procedure is tedious, can acquire some redundant measurements of port input impedances and is not recommended since it is hard to keep track of the test data and combine the data from the different measurement setups. Four mixed-mode test setups using single-end s-parameter equipment with modified signal sources, signal detection, and signal paths (differential-mode and common-mode) can provide direct mixed-mode measurements [1]. This is shown in Figure 2.4. The differential-mode-specific-wave responses (higher waves) are in opposite polarity and “subtract” from each other to get the total response. The common-mode-specific wave responses (lower waves) “add” with each other at the terminals and are averaged to obtain the total common-mode response. The input differential source can produce differential-mode wave reflections, common-mode wave reflections, differentialmode wave transmission (the desired response) and common-mode wave transmission. Moving the differential signal source to port 2 of Figure 2.4 would create a second measurement setup. Replacing the differential-mode source with a common-mode source at ports 1 and 2 makes a total of four test setups.

Mixed-Mode S-Parameters Differential-Mode Input Reflection Signal Reverse wave bd1

37

Differential-Mode Output Signal Reverse wave bd2

"subtract" "subtract"

Differential-Mode Input Signal Source Forward wave ad1

2

DUT

1

"add" Common-Mode Input Reflection Signal Reverse wave bc1

Common-Mode Output Signal Reverse wave bc2

"add"

Figure 2.4 Mixed-mode circuit response with differential-mode input.

2.5 Mixed-Mode Scattering Parameters As in the previous section, the development of mixed-mode s-parameter theory begins with a review of single-ended s-parameter circuits. The general singleended s-parameter matrix relation is defined in (2.30) and (2.31) in terms of power waves for the four-port circuit shown in Figure 2.2: b 1  S 11 b  S 21  2= S b  3   31 b  S  4   41

S 12 S 22 S 32 S 42

S 13 S 23 S 33 S 43

S 14 S 24 S 34 S 44

a1   a   2   a 3   a   4 

b = [S ]a

(2.30)

(2.31)

In (2.30) and (2.31), [S ] is the four-port s-parameters matrix and b and a are the reflected and input power wave vectors at the four ports. Expanding the single-ended [S ] matrix into standard input/output algebraic relations results in: b 1 = S 11 a 1 + S 12 a 2 + S 13 a 3 + S 14 a 4 b 2 = S 21 a 1 + S 22 a 2 + S 23 a 3 + S 24 a 4 b 3 = S 31 a 1 + S 32 a 2 + S 33 a 3 + S 34 a 4 b 4 = S 41 a 1 + S 42 a 2 + S 43 a 3 + S 44 a 4

(2.32)

38


In (2.31), the individual s-parameter matrix elements are calculated numerically in a simulator or measured by test equipment under the following conditions: S xy =

bx ay

(2.33) a (s ≠ y ) = 0

In (2.33), all the a power-wave sources are turned off except ay and then the bx power wave is characterized. In an S11 measurement, the a1 power wave source is applied and the b1 reflection from the circuit is measured as shown in (2.34). S 11 =

b1 a1

(2.34) a 2 , a 3 ,K = 0

The same relationships can be applied to normalized mixed-mode-power waves to develop the mixed-mode s-parameters, b d 1 = S dd 11 a d 1 + S dd 12 a d 2 + S dc 11 a c 1 + S dc 12 a c 2 b d 2 = S dd 21 a d 1 + S dd 22 a d 2 + S dc 21 a c 1 + S dc 22 a c 2 b c 1 = S cd 11 a d 1 + S cd 12 a d 2 + S cc 11 a c 1 + S cc 12 a c 2 b c 2 = S cd 21 a d 1 + S cd 22 a d 2 + S cc 21 a c 1 + S cc 22 a c 2

(2.35)

The subscript naming convention used for the mixed-mode s-parameters follows the naming convention used in single-ended s-parameters, S m om i po pi = S ( output − mode ) ( input − mode ) ( output − port ) ( input − port )

(2.36)

The Sdd21 mixed-mode s-parameter would represent a differential-mode output signal measured at mixed-mode port 2 with differential-mode input applied at mixed-mode port 1. A power wave diagram that can be used to characterize mixed-mode Sdd12 is shown in Figure 2.5. Correct terminations must be put on the ports in order to perform the mixed-mode measurements. The diagram has two equivalent differential source and load terminations for this Sdd12 measurement; these are single-ended terminations in the top figure and pure differential terminations in the bottom part of the figure. Single-ended forward wave terms a1 and a2 are used to generate the differential forward wave term ad1, while the reverse single-ended wave terms b1, b2, b3, and b4 are used to extract the differential reverse


39

x

x

180°

ν1

a1

a3 =0

b1

50Ω

ν3

b3

50Ω

b4

50Ω

DUT b2 0°

180°

ν2

a4 = 0

a2

ν4

Port 1

Port 2

x

x

ν1

a1

a3 =0

b1

50Ω

ν3

b3

50Ω

b4

50Ω

DUT 50Ω

b2 0°

ν2

Port 1

a2

a4 = 0

ν4

Port 2

Figure 2.5 Two models of differential-mode: the input at port 1 with differential output at port 2. The top portion of Figure 2.5 shows the Sdd12 measurement in a singleended system and the bottom portion of Figure 2.5 shows the Sdd12 measurement in the differential system.

waves bd1 and bd2. This mixed-mode s-parameter extraction from single-ended data is presented in Section 2.6. For a pure differential-mode signal source, the a2 with a zero common-mode wave term ac1 would be equal to zero since a1 sum. With an ideal termination on port 2 single-ended forward wave terms a3 and a4 are zero resulting in mixed-mode wave terms ad2 and ac2 also equal to zero. Thus, this system only generates signals that characterize the mixed-mode circuit response to a differential-mode stimulus at port 1. None of the mixed-mode reverse wave terms (bsR) is restricted to zero magnitude for the example shown in Figure 2.5. This is true for the differentialmode and common-mode terms for both mixed-mode port 1 and 2 (bd1, bc1, bd2, and bc2). What this implies is that the example test setup of Figure 2.5 could be used to solve for Sdd11, Sdd21, Scd11, and Scd21. The pure differential mixed-mode scattering parameters have the designation Sddxy, while the Scdxy terms represent

40


cross-mode scattering parameters where the source and output have different modes. Figure 2.6 is a block diagram showing a measurement system with the differential-mode input setup described in Figures 2.4 and 2.5. In Figure 2.6, a differential LNA is the DUT.

RF source ad1

bd1

ad2 =0

S1

Difference

Difference 1 2

ac1 = 0 Sum bc1

bd2

1 2

180° 0°

ac2 = 0 Sum

1 2

1 2

b2 a2

a3 b3

RF in

b1

a1

RF in

S2

port 1

b4

S3

port 2

Mixed-mode Port 1 2

a4

bc2

port 1

port 2

Mixed-mode Port 2

1

3

Port 1

Port 3

Port 2

Port 4

4

Figure 2.6 Mixed-mode test set with differential-mode input at port 1 with differential output at port 2.


41

Mixed-mode s-parameter input/output relations are shown in (2.35) and can be expressed as 16 s-parameters arranged in a 4 × 4 matrix, 4 forward-power-wave terms as a 4 × 1 matrix, and 4 reverse-power-wave terms as a 4 × 1 matrix. The 4 × 4 mixed-mode matrix can be partitioned into a set of four 2 × 2 matrices shown in (2.36). These 2 × 2 matrices represent differential-mode (Sddxy) and common-mode (Sccxy) input/output circuit responses, and two cross-mode circuit responses. These cross-modes are differential-mode input to common-mode output (Scdxy) and common-mode input to differentialmode output (Sdcxy): b d 1  b  S  d 2  =  dd  b c 1   S cd b   c2 

a d 1   S dd 11 S dc  a d 2   S dd 21  = S cc   a c 1   S cd 11  a   S cd 11  c2 

S dd 12  S dc 11   S dd 22  S dc 21 S cd 11  S cc 11   S cd 11  S cc 21

S dc 12   a d 1   S dc 22   a d 2    S cc 12    a c 1   S cc 22    a c 2 

(2.37)

Sdd : Differential-mode s-parameters; Sdc : Common-mode to differential-mode; Scd : Differential-mode to common-mode; Scc : Common-mode s-parameters. This mixed-mode matrix partitioning is further illustrated in Figure 2.7 which shows the 100Ω source and load port impedance for a s-parameter measurement system applied to a differential-mode circuit. For a common-mode source and load the system impedance is 25Ω (two 50Ω loads in parallel) while differential-mode system has two 50Ω loads in series. The cross-mode terms Sdc and Scd would all be zero value for an ideal DLNA. That is all of the differential input signal would be processed by the DLNA circuit and result in an output differential signal. There would be no energy loss due to mode conversion of the differential-mode input signal to a common-mode output signal at either mixed-mode port. In addition, common-mode signals coupled to the DLNA input would be rejected by the circuit signal processing. The circuit output would be only a differential-mode signal, (scc21 = 0). This balanced circuit signal processing is known as common-mode rejection, which is a specification parameter on low-frequency differential amplifiers. With the use of mixed-mode parameters, this low-frequency specification parameter can be measured and applied to RF and microwave frequency applications. Obtaining ideal (zero magnitude) cross-mode signals for the DLNA may be impractical. However, with the use of mixed-mode s-parameter measurements a DLNA design can be evaluated to determine what the cross-mode values are and their impact on the desired circuit performance. If the cross-mode

42


180° 50Ω

+

100Ω

50Ω 0° 180° + 50Ω 0°

25Ω

Sdd

Sdc

Scd

Scc

180°

0°

100Ω

50Ω

25Ω

Mixed-mode s-parameters

+ 0°

0°

0° 25Ω + 0°

25Ω

Figure 2.7 Partitioned mixed-mode s-parameter matrix.

terms are very small compared to the differential-mode and common-mode s-parameter terms, the cross-mode terms can be neglected. What this means for this DLNA example is that the gain, stability, and matching can be evaluated using only the four Sddxy mixed-mode s-parameters. This design approach can be extended to more complex applications, such as a balun where the desired circuit response is to generate cross-mode signals.

2.6 Standard S-Parameter/Mixed-Mode S-Parameter Transformation Does a transform between standard s-parameters and mixed-mode s-parameters exist and what are the limits and issues? Yes, there is a very simple transformation that can be applied in two directions, standard s-parameters to mixed-mode parameters and mixed-mode s-parameters to standard s-parameters. The implication is that a standard four-port s-parameter measurement can be made on a differential circuit and transformed to the relevant mixed-mode s-parameter. It also means a mixed-mode s-parameter measurement can be made on a standard four-port microwave circuit and transformed into single-ended four-port s-parameters. Is there an advantage or significant limitation for one set of s-parameters over the other? The answer, found in the following discussion,


43

depends upon the microwave test specifications and the test equipment capability,

S dd S  cd

S 11 S S dc   21 ⇔ ⇔ Transformation S cc  S 31 S  41

S 12 S 22 S 32

S 13 S 23 S 33

S 42

S 43

    S 44 

S 14 S 24 S 34

(2.38)

Details of the transformation proof are reviewed in the literature [3] and will not be presented here. The transformation from standard s-parameters to mixed-mode s-parameters is shown in (2.39), (2.40), and (2.41). It is a simple process to use the relationships in (2.39), (2.40), and (2.41) to obtain the transformation of mixed-mode s-parameters (S mm ) from standard s-parameters (S std ). S mm = MS std M −1 1 − 1 1 0 0  M = 2 1 1 0 0 

0 1 −1  0 0 1 1  0

M (M * ) = 1 T

(2.39)

(2.40)

(2.41)

Expanding this transformation to algebraic form is shown in (2.42), (2.43), (2.44), and (2.45). For a measurement system with no noise, no data inaccuracies and no calibration inaccuracies, the linear descriptions of circuit behavior must be equivalent through these mathematical transformations. This is a fundamental mathematical requirement for linear matrix transformations. For real measurement data containing deterministic and random errors, these equations can be used to identify the issues and limitations of this transformation. What is significant about this expanded transformation is that each of the mixed-mode s-parameter terms are a sum of four standard s-parameter terms: S dd =

1 S dd 11 = (S 11 − S 12 − S 21 + S 22 ) S dd 12 = (S 13 − S 14 − S 23 + S 24 )    2 S dd 21 = (S 31 − S 32 − S 41 + S 42 ) S dd 22 = (S 33 − S 34 − S 43 + S 44 )   (2.42)

44

S dc =

S cd =

S cc =


1 S dc 11 = (S 11 + S 12 − S 21 − S 22 ) S dc 12 = (S 13 + S 14 − S 23 − S 24 )    2 S dc 21 = (S 31 + S 32 − S 41 − S 42 ) S dc 22 = (S 33 + S 34 − S 43 − S 44 )   (2.43) 1 S cd 11 = (S 11 − S 12 + S 21 − S 22 ) S cd 12 = (S 13 − S 14 + S 23 − S 24 )    2 S cd 21 = (S 31 − S 32 + S 41 − S 42 ) S cd 22 = (S 33 − S 34 + S 43 − S 44 )   (2.44) 1 S cc 11 = (S 11 + S 12 + S 21 + S 22 ) S cc 12 = (S 13 + S 14 + S 23 + S 24 )    2 S cc 21 = (S 31 + S 32 + S 41 + S 42 ) S cc 22 = (S 33 + S 34 + S 43 + S 44 )   (2.45)

If the magnitudes of the single-ended s-parameter data are all similar, then the errors during transformation are contributed with equal proportion. However, if the single-ended data consist of two large approximately equal (canceling) single-ended values of opposite sign with two important smaller values, the transformation accuracy can be significantly compromised in the presence of data errors. In addition, there is a possible numerical problem related to the limited accuracy of some computers. The main cause of mixed-mode transform inaccuracy relates to the measurement equipment error and the calibration standard error. One objective of microwave differential application circuits is to have extended dynamic range over equivalent single-ended circuits. The measurement accuracy of extended dynamic-range circuit performance could be compromised with the application of standard s-parameter measurements transformed to mixed-mode s-parameters. For a DLNA, the optimized cross-mode terms would be very small compared to the differential-mode and common-mode terms. The same issue exists for the reverse transformation, conversion of mixed-mode s-parameters to standard s-parameters. However, the expectation of extended dynamic range performance is not typical for single-ended microwave circuits. A mixed-mode measurement would be the more general application tool, providing the extended accuracy requirement of differential applications and sufficient accuracy for single-ended applications. Unfortunately a mixed-mode s-parameter measurement tool is considered significantly more expensive to build than a single-ended measurement system. There are other uses for a mixed-mode measurement system such as applications which are sensitive to even-mode and odd-mode stimulation (directional couplers). These will be presented in more detail in Chapter 6 as directional


45

coupler and electromagnetic field applications. However, the most general s-parameter measurement tool would provide a single-port stimulation option for single-ended four-port applications, and dual-port differential-mode and common-mode stimulation for mixed-mode applications. The equipment may even include an analysis option to determine which pair of terminals are the proper ones for application of the dual-port signal stimulation.

2.7 Conclusions Applications with more than two ports are becoming more common in integrated microwave circuits. Many of these applications have simultaneous modes of propagation along a common pair of conductors. Mixed-mode s-parameters (also referred to as multimode s-parameters) have been developed in this chapter. These mixed-mode s-parameters completely describe the small-signal behavior of an RF differential amplifier circuit and other mixed-mode applications. In addition, a matrix transformation has been shown for the conversion between standard s-parameters and mixed-mode s-parameters. Matrix-transformation-accuracy limitations make differential circuit stimulation through a mixed-mode dual-signal source stimulation desirable. Once the principles of mixed-mode s-parameters are understood, they can be used to calculate mixed-mode performance specifications such as gain, stability, and matching optimization. This approach brings a set of single-ended two-port analysis tools to mixed-mode applications where they have not been used before. An example of this is the development of differential circuits in RF applications (a rapidly growing demand) where circuit-to-circuit isolation is needed in high-density integrated implementations. Mixed-mode technology is important in such IC implementations where each RF design pass has a long and costly cycle time. It is expected that the extension of s-parameter design techniques to mixed-mode circuits will fundamentally change the way RF multimode circuits are designed and analyzed. Using mixed-mode techniques, RF components which have had limited success in RF circuits due to their complex parameters and greater than two terminal requirements, (i.e., transformers, IC transformers with active components) will be simplified and become practical RF components. These mixed-mode principles can also be applied within microwave analysis tools. When a single-ended standard set of four-port s-parameters is transformed to mixed-mode s-parameters, insight into mixed-mode applications becomes intuitive. Differential gain is directly related to S dd 21 , which is difficult to interpret with standard four-port s-parameters. Traditional time-domain simulation tools such the many commercial and university variants of the SPICE circuit simulator can also utilize mixed-mode tools where frequency-domain transfer functions can be used to determine standard or mixed-mode s-parameters directly.

46


References [1]

Bockelman, D. E., and W. R. Eisenstadt, “Pure-Mode Network Analyzer for On-Wafer Measurements of Mixed-Mode S-Parameters of Differential Circuits,” IEEE Trans. on Microwave Theory and Techniques, Vol. 45, No. 7, July 1997, pp. 1071–1077.

[2]

Gonzalez, G., Microwave Transistor Amplifiers: Analysis and Design, 2nd ed., Upper Saddle River, NJ: Prentice Hall, 1997, pp. 28–29.

[3]

Bockelman, D. E., and W. R. Eisenstadt, “Combined Differential and Common-Mode Analysis of Power Splitters and Combiners,” IEEE Trans. on Microwave Theory and Techniques, Vol. 43, No. 11, Part 4, November 1995, pp. 2627–2632.

3 Transmission Lines and Systems 3.1 Introduction Scattering parameters or power-based (large-signal) scattering parameters are widely used in the RF and microwave fields to represent circuits and devices with distributed elements such as coax transmission lines. A distributed element can be implemented, modeled or analyzed as a large set of basic unit length structures connected in series. Although each basic element may be approximated as a lumped circuit, the cascading of a sufficient number of basic elements gives distributed circuit characteristics (see Figure 3.1). The application of an incident-electromagnetic signal-wave stimulation to a distributed-circuit terminal results in a scattering or separation of the signal into reflected-electromagnetic and transmitted-electromagnetic waves. Scattering-wave descriptions of circuit networks are very important when operating at frequencies that are high enough that circuit-element-electrical-transmission lengths become a significant fraction of a wavelength (approximately one-tenth of a wavelength). Scattering parameter techniques originate from transmission-line concepts and are defined with respect to a transmission-line-characteristic impedance, or reference impedance. The primary benefit of s-parameters is the ease of measurement compared to voltage or current derived Z- or H-parameters. Device s-parameters are measured with all ports terminated in the characteristic impedance rather than short-circuit or open-circuit terminations. At RF and microwave frequencies short-circuit and open-circuit terminations are impractical. In general, physical implementations of microwave and RF distributed circuit designs, models, analyses or systems must be related to s-parameter test data at some point in the design cycle. Thus, s-parameter measurements and theory drives the design and test of microwave circuits, devices, and products. 47

48


This chapter begins with a brief development of the single-distributedelement-transmission-line scattering and propagation model parameters. This provides insight into transmission-line or conductor-wave properties and assists in defining generalized s-parameters. Coupled-distributed line analysis will be followed by the use of a generalized-mixed-mode-scattering-parameter definition. Coupled-distributed-transmission line or conductor analysis can be used for sampled or injected signals on physically isolated conductors. Mixed-mode s-parameters are an effective tool for analysis of unintentional signal coupling on physically isolated conductors. This unintentional coupling is referenced to as interference or crosstalk and is an important part of increasingly complex mixed-signal integrated circuit environments. Independent data, RF, and analog mixed-signals within close physical proximity, require crosstalk and interference design and analysis to insure reliable system signal integrity. This chapter will focus on the tools associated with mixed-mode s-parameters and their application to coupled conductor mixed-signal transmission networks. In addition, there are a number of multiport RF and microwave functions, such as splitter, combiners, and baluns with specified phase relationships, which are well characterized by mixed-mode s-parameter analysis. Splitter and combiners are three-terminal components with one single-ended terminal and a mixed-mode pair of terminals forming a mixed-mode port. Single-ended to mixed-mode conversion or mixed-mode to single-ended conversion is an example function performed by baluns. These components are an interesting, more traditional s-parameter analysis area that will be covered in detail in a later chapter of this book.

3.2 Traveling Waves and Transmission-Line Concepts The voltages and currents along a transmission line are functions of position and time. For sinusoidal excitations, the instantaneous voltage and current can be expressed in the forms of v ( x ,t ) = Re[V ( x )e jωt ]

(3.1)

i ( x ,t ) = Re[I ( x )e jωt ]

(3.2)

In (3.1) and (3.2), Re[x] gives the real part of the complex number x. The complex quantities V(x) and I(x) are phasors and express the variations of the voltage and current as a function of position along the transmission line. The phasor analysis presented here is inherently single-frequency analysis.


49

These voltage and currents along a transmission line satisfy the set of differential equations (3.3) and (3.4) that are known in the literature as the wave equation [1]: d2 V ( x ) − γ 2V ( x ) = 0 dx 2

(3.3)

d2 I (x ) − γ 2I (x ) = 0 dx 2

(3.4)

In (3.3) and (3.4), γ is the propagation constant. The general solution of (3.3) and (3.4) is well known and shown in (3.5) and (3.6) in which A and B are complex constants and Z0 is the characteristic impedance: V ( x ) = Ae − γx + Be γx I (x ) =

A − γx B γx e − e Z0 Z0

(3.5) (3.6)

The propagation constant and the characteristic impedance can be expressed in terms of the distributed parameters R, G, L, and C which are the resistance, conductance, inductance, and capacitance-per-unit-length of the transmission line. The term R represents the conductor series resistance, while G represents the dielectric loss conductance. A lossless transmission line neglects the lossy R and G terms by setting them both equal to zero. Extraction of the R and G values can be used to determine the need for increasing conductor thickness or dielectric volume to improve losses in the transmission line physical implementation. These parameters are not the same as the lumped R, L, C, and G elements used in analog circuit analysis which have no per-unit-length dimensions (see Figure 3.1). γ = α + jβ =

(R +

jωL ) ∗ (G + jωC )

(3.7)

In (3.7), α is the attenuation constant given in Nepers per meter and β is the phase constant in radians per meter. For a lossless transmission line the attenuation constant (α) is neglected and set to a value of zero. Equation (3.8) shows the characteristic impedance as a function of the transmission-linedisributed-model elements, R, G, L, and C.

50

Microwave Differential Circuit Design Using Mixed-Mode S-Parameters port 2

rfect

pe sume

ro nd ze

grou

as

port 1

Rn+1 Rn

Gn

e

tanc

resis

Ln+1

Ln N*∆x = Length Cn

Cn+1

Gn+1

∆x ∆x = unit length in meters

x=0

Figure 3.1 Equivalent unit-length lumped-circuit of microwave transmission line.

Z0 =

R + jωL G + jωC

(3.8)

For a lossless transmission line the relationship for characteristic impedance (Z0) of (3.8) becomes Z 0 =

L . C

From (3.5) a new phasor notation is typically used in which V + ( x ) = Ae − γx and V − ( x ) = Be γx . In this notation for the transmission line, V + ( x ) is the forward-propagation component and V − ( x ) is the reverse-propagation component. Both waves coexist on the transmission line. Assuming a lossless transmission line (i.e., Z 0 = Re[Z 0 ] ), important normalized voltage and current waves are defined in (3.9) and (3.10). This lossless or low-loss assumption is reasonable for transmission over short distances in a microwave circuit. v (x ) =

i (x ) =

V (x ) Z0 I (x ) Z0

(3.9)

(3.10)


a(x ) =

b (x ) =

51

V + (x )

(3.11)

Z0 V − (x )

(3.12)

Z0

The a(x) and b(x) power waves defined in (3.11) and (3.12) are the incident, reflected or transmitted normalized-power waves, and they are the primary quantities defining s-parameters [2]. Inserting (3.11) and (3.12) into the wave equation solutions (3.5) and (3.6) gives (3.13) and (3.14). ν( x ) = a ( x ) + b ( x )

(3.13)

i (x ) = a(x ) − b (x )

(3.14)

When the relations of (3.13) and (3.14) are applied to a n-port circuit, the a and b power waves result in the s-parameter matrix relationship of (3.15). b 1   S 11 b   S  2  =  21 L   L b  S  n   n1

S 12 S 22 L Sn 2

L S 1 n  a1  L S 2 n a 2    L L L  L S nn  a n 

(3.15)

For the one-port transmission system shown in Figure 3.2, the s-parameter matrix reduces to (see Figure 3.2). Load

Z0 ZL

port 1

a1 incident wave

x=L

I + V −

b1 reflected wave

I

x=0

Figure 3.2 One-port coax transmission line with characteristic impedanced Z0 and termination impedance ZL.

52


[b1 ] = [S 11 ][a1 ]

(3.16)

Assume in (3.16) the transmission line is terminated in a load impedance, ZL, equal to the characteristic impedance, Z0, and the incident-signal-source impedance, ZS. Under these conditions the reflected signal b1 will be equal to zero because there are no reverse-wave reflections from a matched-impedance circuit (where the source and load impedances equal the characteristic impedance). This is shown next. S 11 = b 1 a 1 = 0

(3.17)

This simple intuitive result is easily extended to a two-port seriesconnected transmission line shown in Figure 3.3. Here, the stimulus-input signal is applied to port 1 and the s-parameter terms for lossless transmission are reported next. S 11 = b 1 a 1

a2 = 0

S 21 = b 2 a 1

a2 = 0

=0

(3.18)

=1

(3.19)

a2 reflected wave = 0

port 2 port 1

test signal applied at port 1

a1 incident wave

I2

Z0

ZL +

I1

−

I2

−

I1

b1 reflected wave

x=0 a1 incident wave

port 2 port 1

I2

Z0

ZL a2 reflected wave = 0 + V1 −

b2 transmitted wave

b2 transmitted wave

x=L

ZS

V1

+ V2

I1

I2 x=L

ZS I1

+ V2

b1 reflected wave

− test signal applied at port 2

x=0

Figure 3.3 Two-port series-connected transmission lines shown with two state-stimulus signals applied to port 1 in the top figure and port 2 in the lower figure.


53

The same assumptions for (3.17) are true for (3.18) and (3.19); these include an attenuation constant, α equal to zero, so the transmitted signal b2 is equal to the incident signal a1. The lower diagram shown in Figure 3.3 has the stimulus signal applied to port 2 resulting in s-parameter terms described by (3.20) and (3.21). S 22 = b 2 a 2

a1 = 0

S 12 = b 1 a 2

a1 = 0

=0

(3.20)

=1

(3.21)

Under the conditions of a lossless two-port series-connected-transmission line, the s-parameters form the very simple matrix shown here: b 1  0 1 a 1  b  = 1 0  a   2   2 

(3.22)

In practical circuits, transmission lines can come in groups of two or more that interact together and Section 3.3 presents the analyses of these cases.

3.3 Mode Specific S-Parameters—Isolated Transmission Lines In a practical RF or microwave-circuit implementations, a differential circuit is based on pairs of coupled conductors or transmission lines as shown in Figure 3.4. In the previous single coaxial-transmission line, the signal propagates port 2 port 1 differential test signal applied at port 1

Ig − 0 − V1 +

I3

I1

bd1 reflected signal

− V3 + ac2 = ad2 reflected signals = 0

bc2 transmitted signal I4 V4

bd2 reflected signal

bc1 reflected signal I2 ad1 incident signal + V2 −

Figure 3.4 Pair of coax transmission lines used to implement a differential-signal-propagation system. A differential signal is applied at port 1 across terminals 1 and 2. While differential-mode and common-mode reflection occurs at port 1, and differential-mode and common-mode transmission occurs at port 2.

54


between the center conductor and the ground shield. A pair of coaxial-transmission lines can be used to implement differential-signal propagation. Here, the differential signal is described by a difference of voltages between two coaxial-center conductors at the input and the output ports. Assume a nonzero differential voltage, ∆v d ,in is the input-differential voltage between the two coaxial-center conductors, ( ∆v d ,in ≠ 0 ), and assume ∆v d ,out is the output-differential voltage between the two conductors, ( ∆v d ,out ≠ 0 ). Typically, a current flows between the individual-center conductors for a differential-input signal. This signal-transmission mode is also called odd-mode propagation in transmission-line theory. With this definition, the signals are not referenced to a ground potential, but rather the signals on the center-conductor pair are referenced to each other. Furthermore, this differential signal should propagate in a transverse-electromagnetic mode (TEM) or a quasi-TEM fashion (almost TEM with a very small electromagnetic field in the propagation direction) with a well-defined characteristic impedance and propagation constant. For an ideal coaxial-transmission-line pair this propagating differential signal can exist with no current flow on the coaxial-ground conductors. This example can be generalized to other differential-propagation systems such as a pair of parallel metal lines over a ground plane. In addition to the differential-propagation mode, a second mode of propagation (common-mode) is supported with equal signals applied to each of the center conductors with respect to their ground conductors. Conceptually, the common-mode wave applies equal signals with respect to ground at each of the individual lines in a coupled pair such that the differential voltage at each center conductor is zero. Again, ∆v d ,in is the input-differential voltage between the two coaxial-center conductors and ∆v d ,out is the output-differential voltage between the two output-port conductors, ∆v d ,in = 0 and ideally ∆v d ,out = 0. In transmission-line theory this mode of propagation is also called even-mode propagation. The complete treatment of the microwave-circuit propagation that includes the characterization of all simultaneously propagating modes (common-mode and differential-mode signals) is known as mixed-mode-propagation theory. Figure 3.4 shows a more detailed view of the propagation in two coaxial conductors which can be used to derive the mixed-mode-transmission properties. The differential-mode voltage at port 1 in Figure 3.4 displays the difference between voltage, v d 1 on terminals or nodes 1 and 2 as shown here: v d 1 (x ) = v 1 − v 2

(3.23)

where v d 1 is a signal no longer referenced to the coaxial ground shield. For an ideal differential signal with equal magnitude and opposite phase applied to V1 and V2, the ground is always at zero voltage potential, between the differential


55

potential V1 minus V2, or a “virtual” ground. With zero voltage potential there will be no current flow on the ground shields of the coaxial pair, shown in Figure 3.4, which are connected together. In a differential circuit, one would expect equal current magnitudes to enter the positive-input terminal (port 1) and leave the negative-input terminal (port 2). Therefore, the differential-mode current is defined as one-half the difference between currents entering terminals 1 and 2 as shown here: i d 1 (x ) =

1 (i 1 − i 2 ) 2

(3.24)

The common-mode voltage in a differential circuit is the average voltage at a differential port. Hence, common-mode voltage, vc1 is one half the sum of the voltage on terminals 1 and 2 as reported here: v c 1 (x ) =

1 (v 1 + v 2 ) 2

(3.25)

The common-mode current at a port is simply the total current flowing into the port. Therefore, the common-mode current is the sum of the currents entering terminals 1 and 2, ic 1 (x ) = i1 + i 2

(3.26)

The differential current includes the return current back to the signal source, while the signal-source-return current for the common-mode signal flows through the ground plane. This accounts for the one-half factor associated with the differential-mode current not found in the common-mode-current relation. Equation (3.27) shows, given these differential-mode and commonmode definitions, that the sum of the modal power is equal to the total power in (3.27). These power values can be expressed as average, peak, rms, or peak-to-peak, as long as they all have the same format. P d 1 + Pc 1 = P1 + P 2 = PT

(3.27)

In (3.27), Pd1 is the differential power, Pc1 is the common-mode power, P1 is port 1 power, P2 is port 2 power, and PT is total power. Energy is conserved by the definitions of the common-mode and differential-mode voltages and currents. Solving for the general-transmission expression for the differential-mode and common-mode voltages and currents at any point along the coaxial-transmission pair with applied differential-mode and common-mode signals across terminals 1 and 2 yields (3.28) to (3.31).

56


V d ( x ) = 2( A d e − γ d x + B d e γ d x ) I d (x ) =

Ad − γ d x B d γ d x e e − Zd Zd

V c ( x ) = Ac e − γ c x + B c e γ c x I c (x ) =

1  Ac − γ c x B c γ c x  e  e −  Zc 2  Zc 

(3.28) (3.29) (3.30) (3.31)

This solution results in unique complex-propagation constants, γd and γc for the differential-mode and common-mode propagation waves. This wave equation solution develops unique R, L, G, and C values for each mode as well as separate characteristic differential-mode and common-mode impedance values, Zd and Zc that are shown in (3.32) and (3.33). These separate solutions indicate that there are different wave-propagation properties, including wave speed, and attenuation for differential-mode and common-mode waves. Zd =

Zc =

v d+ ( x ) i d+

v c+ ( x ) i c+ ( x )

=

=

2v 0+ ( x )

v 0+ ( x ) Z 0 v 0+ ( x )

(2v 0+ ( x ))

Z0

= 2Z 0

= Z0 2

(3.32)

(3.33)

In expressions (3.32) and (3.33), v 0+ ( x ) is a voltage applied relative to ground for each terminal in Figure 3.4 for either the differential-mode or the common-mode stimulus. Thus, the normalized-power waves are defined and generalized mixed-mode s-parameters are developed for coupled-transmissionline pairs. With the ideal (lossless) transmission-line assumptions of matched-termination impedances and the applied differential signal shown in Figure 3.4, four of the mixed-mode s-parameter are defined in (3.34) to (3.37). S dd 11 =

S dd 21 =

bd 1 ad 1

ad 1 = ac 1 = ac 2 = 0

bd 2 ad 1

ad 1 = ac 1 = ac 2 = 0

=0

(3.34)

=1

(3.35)


S cd 11 =

S cd 21 =

bc 1 ad 1 bc 2 ad 1

57

=0

(3.36)

=0

(3.37)

ad 1 = ac 1 = ac 2 = 0

ad 1 = ac 1 = ac 2 = 0

In (3.36) and (3.37), the common-mode-transmitted and reflected-power waves (bc1 and bc2, respectively) are expected to be zero when a differential-mode signal is applied to port 1. This is true as long as the coaxial-transmission lines mm , for the are identical. The complete set of ideal mixed-mode s-parameters, S TL identical lossless-coaxial lines of Figure 3.4 are shown here:

mm S TL

S dd 11 S dd 21 = S  cd 11 S  cd 21

S dd 12

S dc 11

S dd 22

S dc 21

S cd 12 S cd 22

S cc 11 S cc 21

S dc 12  0 S dc 22  1 = S cc 12  0 S cc 22  0

1 0 0 0 0 0  0 0 1 0 1 0 

(3.38)

An alternate view of the mixed-mode s-parameter matrix representation is shown in Figure 3.5. The pair of coaxial-transmission lines used in the above mixed-mode transmission-line analysis satisfies the limiting case of a coupled-line structure in which the coupling is zero or the two transmission lines are uncoupled. This

Differential-mode stimulus Terminal one

Differential-mode response

Common-mode response

Terminal two

Common-mode stimulus Terminal one

Terminal two

Terminal one

Sdd11

Sdd12

Sdc11

Sdc12

Terminal two

Sdd21

Sdd22

Sdc21

Sdc22

Terminal one

Scd11

Scd12

Scc11

Scc12

Terminal two

Scd21

Scd22

Scc21

Scc22

Figure 3.5 Mixed-mode s-parameter, Smode response, mode stimulus, terminal response, terminal stimulus.

58


uncoupled pair would be seen in the practical implementation of a mixed-mode-signal source and s-parameter-measurement system. For this example, the set of characteristic impedances have the relationship of Z d 2 = Z 0 = 2 * Zc

(3.39)

where Zd is the differential-mode impedance, Z0 is the single-ended-mode impedance, and Zc is the common-mode-characteristic impedance. In contrast, the complex-propagation constant v is equal for the differential-mode, common-mode, and single-ended-mode power-wave signals on a pair of coaxial-transmission-lines with no coupling. This is intuitively correct, since all three modes of wave propagation are within a homogeneous-dielectric material with an equal relative-dielectric constant. However, the parameters R, G, L, and C will be unique to each mode of propagation as shown by the characteristic impedance relationships of (3.40), (3.41), and (3.42). Zd =

R d + jωL d G d + jωC d

(3.40)

Zc =

R c + jωL c G c + jωC c

(3.41)

Z0 =

R 0 + jωL 0 G 0 + jωC 0

(3.42)

Since the differential-mode and common-mode networks are built using the parameter set of the single-ended-coaxial line, it is simple to construct the mode-specific-parameter networks. The three-parameter networks shown in Figure 3.6 can be reduced to a set of parameter values with the relationships in (3.43) to (3.46). 2∗ R d = R 0 = Rc 2

(3.43)

2 ∗ L d = L 0 = Lc 2

(3.44)

2∗G c = G 0 = G d 2

(3.45)

2∗C c = C 0 = C d 2

(3.46)

Transmission Lines and Systems R0

G0

59

L0

Single ended-mode parameter network

C0

Ground conductor assumed perfect Common-mode parameter network

R0

Differential-mode parameter network

R0

G0

C0

G0

L0

C0 R0

G0

C0

R0

L0

G0

L0

C0

L0

Figure 3.6 Per-unit-length single-ended-network-parameter circuit used to build differential-mode and common-mode-parameter circuits assuming an ideal-uncoupled-transmission-line pair supporting mixed-mode wave propagation.

In (3.43) to (3.46), the current and voltage-divider relationships between the source and load impedances and the parameters G and R are the same for all three parameter networks. For coaxial-transmission-line pairs used as a signal-transmission system, all three propagation-mode waves will have the same losses. The trade-off between the benefits of the three propagation systems are: 1. The differential/common/single-ended characteristic impedance values, Z: For example, a high-power transmitter would be more compatible with lower characteristic impedance, while high impedance is more compatible with a small-signal-receiver system. 2. Interference rejection or interference generation: the differential-mode provides far lower interference generation and much higher noise rejection than common-mode or single-ended modes. 3. Differential information transfer can provide a lower voltage or current difference between logic states: A lower voltage or current can be used to reduced power dissipation or increase data transmission rate.

60


In summary, uncoupled-transmission-line pairs require a simple analysis to show the parametric values associated with transmission-line networks. In addition, the analysis shows that the uncoupled-transmission-line pairs provide good mixed-mode source and load signal delivery systems for evaluation of multiport network response; this is true either in a measurement or simulation environment. The example also demonstrates the extension of single-ended-mode s-parameter analysis for mixed-mode devices. This single-ended standard s-parameter analysis is valid for mixed-mode devices that are linear and time invariant. The standard multiport s-parameter conversionto-mixed-mode s-parameters (see Chapter 2) are sufficient for this case as long at the required accuracy is within the limits of the equipment and calibration accuracy [3]. For evaluation of nonlinear multiport devices, a mixed-mode-based stimulus and response measurement system is better. A mixed-mode stimulus-signal source presents a unique piece of hardware that provides a broadband-pure-mode differential and common-mode-signal source and response-measurement system.

3.4 Mode Specific S-Parameters—Coupled Transmission Lines Although an uncoupled transmission-line pair can be used for transmission of differential-mode and common-mode signals, the coupled-transmission-line pair is more practical and interesting. Coupled-transmission lines are used to build filters, baluns, hybrids, and other microwave-circuit elements. Moreover, applications with paired-transmission lines or paired-conductors are not limited to RF and microwave applications. Applications include digital data transmission at Gb/s rates in high-speed I/O systems and in RF and microwave systemson-a-chip (SoCs). Unintended coupled-transmission lines and conductors can be a cause of dynamic logic failure in high-speed digital ICs. Designers must often use signal-integrity-IC design tools to simulate and avoid these dynamic faults in layout. High-speed digital-transmission-line applications are expanding the analysis of microwave elements beyond the linear frequency-domain into the time-domain where s-parameters are not easily processed. Harmonic balance is a time-domain analysis where s-parameters at a single-tone or a multitone set of frequencies and their harmonics can be solved by equating time changes in linear and nonlinear circuits. However, harmonic balance does not determine unconstrained voltage or current time-domain (transient) signals; there are a limited number of harmonic frequencies analyzed, unlike the signals associated with high-speed digital transmission. The SPICE circuit simulator does analyze digital signal transients with very broad frequency content. One SPICE compatible transmission-line model is built from the R-, L-, G-, and C-lumped unit-length


61

parameters, shown in Figure 3.1. Some care is needed to select the unit length small enough to accurately represent the transmission line without increasing the SPICE simulator analysis requirements beyond the computational time or computer resources available. The impulse response is an alternate time-domain response representation that models a passive linear component. Convolution is used to determine the device output for a given stimulus and impulse response. Determining the impulse response requires a time-domain-impulse characterization or frequency-domain s-parameters over a bandwidth sufficient enough to accurately represent the time-domain features of the high-speed digital signals. All of these techniques have trade-offs in speed, accuracy, and types of transient problems they best solve. However, all techniques benefit from good coupledtransmission-line modeling which is developed in this section. To demonstrate coupled-transmission line or coupled-conductor applications, the authors will employ a structure with three adjacent conductors supported above a ground plane by an insulating dielectric material. This structure will be organized into one pair of conductive-coupled lines and an adjacent single-ended line. Figure 3.7 displays this circuit which has a set of two ports at the left side (input) of the conductors (terminals 1 and 2 form mixed-mode port 1 and terminal 5 forms single-ended port 3) and two ports at the right side (output) of the conductors (terminals 3 and 4 form mixed-mode port 2 and terminal 6 forms single-ended port 4). A mixed-mode port is comprised of two nonground

t 3 L

port 4 upled

e co -mod

6

tran nded

-e

single

port 3

plain tor -

5 Ground terminal

e

ion lin

smiss

2

W

port 2

port 1

1

4

lines

mixed h

8

sula ric in

.6

εr = 4

conductor

ground

ct

diele

Figure 3.7 A three-conductor-coupled transmission-line example with terminals 1 and 2 comprising mixed-mode port 1, and terminals 3 and 4 comprising mixed-mode port 2. In addition, terminals 5 and 6 are a two-port single-ended-mode signal system.

62


terminals, while a single-ended port is comprised of two terminals with one being a ground terminal. The ground-plane conductor forms a separate ground terminal. In addition, Figure 3.7 shows labels for all of the conductor-system-physical dimensions, (L, h, s, w, and t) which are variable dimensions. L is the conductor length, h is the substrate height, s is the coupled transmission-line slot width, w is the conductor width, and t is the conductor thickness. The three coupled-line analysis begins with a standard 6 × 6 set of s-parameters. This s-parameter set is measured by stimulating each port one at a time and measuring the response at all six terminals. This analysis results in a set of 36 s-parameters in (3.47) that represent the complete linear time-invariant response of this three-coupled-conductor network with any signal or set of signals applied to the six terminals. However, these standard s-parameter values do not allow the designer to intuitively interpret the microwave-circuit-differential-signal response and or to view the circuit undesired signal-interference effects

S std

S 11 S  21 S 31 = S  41 S 51 S  61

S 12

S 13

S 14

S 15

S 22

S 23

S 32 S 42

S 33 S 43

S 24 S 34 S 44

S 25 S 35 S 45

S 52 S 62

S 53 S 63

S 54 S 64

S 55 S 65

S 16  S 26   S 36  S 46   S 56  S 66 

(3.47)

The next step in this analysis is the development of a mixed-mode/ single-ended-mode s-parameter matrix for the example-transmission lines that represents the four-terminal mixed-mode and two-terminal single-ended-modesystem response. Chapter 2 showed how the two-port-mixed-mode s-parameters are derived from the standard four-port s-parameters, S std. This conversion equation is S mm = MS std M −1

(3.48)

However, (3.48) can also be used for converting standard s-parameters, S to a combination of mixed-mode and single-ended s-parameters. The organization of the new mixed-mode matrix, S mm is shown in Figure 3.8 with the s-parameter response rows and stimulus columns identified as single-endedmode, differential-mode and common-mode signals. Now a conversion matrix M is built to process the standard s-parameters of (3.47) into the mixed-mode s-parameters of Figure 3.8. The appropriate conversion matrix M is std


Differential-mode stimulus

Single end-mode stimulus

Single endmode response

Differentialmode response

Commonmode response

63

Common-mode stimulus

Terminal five

Terminal six

Terminal one

Terminal two

Terminal three

Terminal four

Terminal five

Sss11

Sss12

Ssd13

Ssd14

Ssc15

Ssc16

Terminal six

Sss21

Sss22

Ssd23

Ssd24

Ssc25

Ssc26

Terminal one

Sds31

Sds32

Sdd33

Sdd34

Sdc35

Sdc36

Terminal two

Sds41

Sds42

Sdd43

Sdd44

Sdc45

Sdc46

Terminal three

Scs51

Scs52

Scd 53

Scd 54

Scc55

Scc56

Terminal four

Scs61

Scs62

Scd 63

Scd 64

Scc65

Scc66

= Smm

Figure 3.8 Mixed-mode s-parameters representing three-conductor-coupled transmission-line network of Figure 3.6. One conductor pair comprises a mixed-mode set and a second single conductor is a propagating transmission line.

0 0 0 0  1 1 − 1 M =  2 0 0  1 1 0 0 

0 0

0 0

2 0

0

0

0

1 −1 0 0

0 0

1

0

1

0  2  0  0   0  0 

(3.49)

The lower-right section of M contains a 4 × 4 submatrix that is the conversion matrix for standard four-port s-parameters to two-port mixed-mode s-parameters. Again, mixed-mode port 1 is defined by terminals 1 and 2, and mixed-mode port 2 is defined by terminals 3 and 4. These terminal labels aid with building the conversion matrix of (3.49). Equation (3.50) shows the expanded matrix of S mm of Figure 3.8.

64


  S 55   S 65   S15 − S 25  std −1 2 M ∗S ∗ M =   S 35 − S45  2  S15 + S 25  2   S 35 + S45  2

S 56 S 66 S16 − S 26 2 S 36 − S46 2 S16 + S 26 2 S 36 + S46 2

S 51 − S 52 2 S 61 − S 62

S 53 − S 54 2 S 63 − S 64

S 51 + S 52 2 S 61 + S 62

2

2

2

S dd 11

S dd 12

S dc 11

S dd 21

S dd 22

S dc 21

Scd 11

Scd 12

Scc 11

Scd 21

Scd 22

Scc 21

S 53 + S 54   2 S 63 + S 64   2   S dc 12   S dc 22    Scc 12   Scc 22  

(3.50)

In the lower right section of (3.50), a 4 × 4 matrix of the mixed-mode s-parameters that represent the coupled-line pair are solved in terms of the standard s-parameter terms of (3.47). The conversion from standard s-parameters to mixed-mode s-parameters is shown in (3.51) to (3.66). S dd 11 = (S 11 − S 12 − S 21 + S 22 ) 2 S dd 12 = (S 13 − S 14 − S 23 + S 24

)

(3.51)

2

(3.52)

S dd 21 = (S 31 − S 32 − S 41 + S 42 ) 2

(3.53)

S dd 22 = (S 33 − S 34 − S 43 + S 44

)

2

(3.54)

S dc 11 = (S 11 + S 12 − S 21 − S 22 ) 2

(3.55)

S dc 12 = (S 13 + S 14 − S 23 − S 24

)

2

(3.56)

S dc 21 = (S 31 + S 32 − S 41 − S 42 ) 2

(3.57)

S dc 22 = (S 33 + S 34 − S 43 − S 44

)

2

(3.58)

S cd 11 = (S 11 − S 12 + S 21 − S 22 ) 2

(3.59)

S cd 12 = (S 13 − S 14 + S 23 − S 24

)

2

(3.60)

S cd 21 = (S 31 − S 32 + S 41 − S 42 ) 2

(3.61)


S cd 22 = (S 33 − S 34 + S 43 − S 44

)

65

2

S cc 11 = (S 11 + S 12 + S 21 + S 22 ) 2 S cc 12 = (S 13 + S 14 + S 23 + S 24

)

(3.62) (3.63)

2

(3.64)

S cc 21 = (S 31 + S 32 + S 41 + S 42 ) 2

(3.65)

S cc 22 = (S 33 + S 34 + S 43 + S 44

)

2

(3.66)

This 6 × 6 set of s-parameters of (3.50) is a complete linear-time-invariant parameter set that defines the small-signal response of the three-coupled-conductor transmission lines. Figure 3.7 shows an example of a four-port six-terminal component. Terminals 1 and 2 define port 1 of a mixed-mode conductor pair and terminals 3 and 4 defining port 2 of the same mixed-mode conductor pair. Terminals 5 and 6 define a single-ended-mode-transmission line. This coupled-line system might represent a differential-data-line pair and a power-supply line or clock-signal line. The initial set of standard s-parameters shown in (3.47) could be measured or determined from an electromagnetic-field solver simulation. The conversion of the three-conductor-transmission system (see Figure 3.7) standard s-parameters of (3.47) into the mixed-mode s-parameters of (3.50) provides frequency-domain interference information and crosstalk design and analysis parameters.

3.5 Time-Domain Analysis—Coupled Transmission Lines High-speed data transmission is a critical design issue that forces the partitioning of integrated circuits into separate RF and digital processing ICs. As the information-data rate increases to provide video with high resolution, the digital or binary processing-information bandwidth has far exceeded the bit rate of the wireless RF communication signals being decoded. A digital-processing channel is almost always a conducted on a wired transmission-line medium unlike the radiated channel of wireless RF communication systems. This digital-channel data-transmission waveform is a unique RF/microwave signal unlike the signals on the traditional constant-carrier-transmission lines that are completely described in the frequency-domain with standard or mixed-mode s-parameters. Analysis of the signal integrity associated with high-speed data applied to conductors or transmission-line systems will require additional tools beyond the single-carrier analysis of frequency-domain s-parameters.

66


Digital-signal integrity has become a specialized style of RF design and is best measured in the time domain. Digital-signal integrity is characterized by time-domain parameters such as time-delay distortion, group delay, jitter, time skew, or eye-diagram-opening distances. There are a number of approaches to develop models and tools for these time-domain analyses associated with coupled conductors or transmission lines. Chapter 7 will review the impulse-response and step-response theory and present the conversion of the frequency-domain mixed-mode s-parameters to time-domain mixed-mode impulse responses for a differential-data-transmission application. A timedomain model will also be developed for a coupled-conductor-transmission-line system that will represent the differential-mode, common-mode, or singleended-mode signal processing. The authors’ objective is to extend mixed-mode s-parameters into time-domain applications and handle more complex signals of interest.

3.6 Distributed Mixed-Mode S-Parameter to R, L, G, and C Model A transmission-line model was briefly introduced in (3.40) to (3.46) for a pair of uncoupled-transmission lines, shown in Figure 3.4. This is a limited example in which the values of the characteristic impedance, Z and the mode-specific distributed-model parameters R, L, G, and C for common-mode, standardsingle-ended, and differential-mode transmission are within a factor of 4 of each other. These transmission-line parameters, Z, R, L, G, and C are more difficult to determine when there is a nonzero coupling factor, such as the transmission lines of Figure 3.7. Conversion of the mixed-mode s-parameters to ABCD- parameters, shown in Figure 3.9, provides a direct representation of the coupled conductors in terms of mode-specific characteristic impedance and propagation values of (3.7) and (3.8). The conversion of mixed-mode s-parameters to ABCD-parameters is exact and equivalent assuming the system is linear and time invariant. The relationships used to solve mode specific propagation constant and characteristic impedance in terms of ABCD-parameters is shown in Figure 3.9 and (3.67) through (3.72). An electromagnetic-field simulation of a coupled-conductor system would be an ideal place to start for the evaluation of a particular transmission-line design with no microwave parasitic components. The simulation could also be used to evaluate the transmission-line sensitivity to parasitic components such as interconnections, bends, and vias. The even mode and odd mode are used in many reference articles to describe the two simultaneous signal-propagation modes on coupled-transmission lines. These even-mode and odd-modes are respectively equal to the common-mode and the differential-mode propagation of mixed-mode


180

Cosh(γL)

Z0odd γoddL

0

Measurement

Sdd

Sdc

Scd

Scc

Mixed-mode s-parameters

Z Sinh(γL)

Sinh(γL)/Z Cosh(γL) ABCD (odd) Extracted design parameters Z00 =

Conversion to Mixed-mode

67

Z0oddZ0even

1− c= 1+

Z0odd

2

Z00 Z0odd

2

Z00

Simulation ABCD (even) Z0even γevenL

Cosh(γL)

Z Sinh(γL)

Sinh(γL)/Z

Cosh(γL)

Figure 3.9 Flow diagram of mixed-mode s-parameters converted to even-mode and odd-mode ABCD-matrix parameters for extraction of distributed-coupledtransmission-line parameters.

s-parameters. Figure 3.10 shows the odd-mode and the even-mode current directions and the electromagnetic-field lines associated with each propagation mode. The odd-mode current flows on the two parallel conductors in opposite directions resulting in an opposing voltage potential on the conductors and the electromagnetic-field lines extend from the more positive conductor to the more negative conductor. The current flow is equal and in the same direction for both conductors with even-mode propagation shown in Figure 3.10. The ground planes at the top and bottom of the differential-mode example support no current conduction. While the top and bottom ground conductors of the common-mode-transmission example are conducting the ground return current Differential-mode or odd-mode

current in

Common-mode or even-mode

current in current out

current in

Figure 3.10 A broadside-coupled-transmission-line pair sandwiched within ground planes showing odd-mode and even-mode conductor-current conditions equal to differential-mode and common-mode behavior.

68


equal to the center conductor current. The ground-plane current of the even-mode transmission results in electromagnetic-field lines originating on the center conductors and ending on the top and bottom ground-plane conductors. There are no electromagnetic-field lines shown between the two inner conductors of the even-mode transmission example since both conductors are at the same voltage potential. For the coupled-transmission line mode-specific propagation parameter extraction, common-mode and differential-mode are best extracted using an ABCD matrix (3.67). An ideal transmission line can be defined in an ABCD matrix with a mode-specific complex propagation constants (γe and γo), an attenuation constant (α) in nepers-per-meter, a phase constant (β) in radians-per-meter, and characteristic impedances (Z0e and Z0o) in Ω, and an electrical length in meters. Mixed-mode differential-mode and common-mode s-parameter matrices are converted to separate differential-mode and common-mode ABCD-matrix parameters using [2]. This is shown in the flow diagram in Figure 3.9 in which Z0 is the standard single-ended-characteristic impedance and Z00 and Z0e are the odd-mode and even-mode characteristic-impedances equal to Zdd and Zcc the differential-mode and common-mode-characteristic impedances. The value L represents a length of the coupled-transmission-line system and c is the coupling coefficient. Coupling coefficient, c should be a real value between zero and one (0 ≤ c ≤ 1), with a c = 0 creating the isolated uncoupled case described in Figure 3.4. Smaller coupling coefficient values, c < 0.2 are practical for edge-coupled structures like the coupled lines shown in Figure 3.7. The broadside-coupled pair of transmission lines of Figure 3.10 can have a higher coupling-coefficient value such as c = 0.707 needed for a 3-dB coupled-line hybrid splitter. The four ABCD-parameters for each propagation mode (differential-mode and common-mode) are used to solve for the four distributed-lump parameters R, L, G, and C via (3.67) through (3.73).  A B   cosh( γL ) ABCD TL =  = C D   sinh( γL ) Z Z = [B C ]

12

X = [BC ]

Z sinh( γL ) cos( γL ) 

= [(R + jωL ) (G + jωC L

)]

12

[ A _ or _ D ] 12 = {Z sinh( γL )∗ sinh( γL ) Z } = tanh( γL )

(3.67)

(3.68)

12

Gamma = γ = tan −1 ( X ) L =

1 Log e {(1 − X ) (1 + X )} 2L

(3.69)

(3.70)


= ( α + jβ ) = [(R + jωL ) ∗ (G + jωC L

69

)]

12

(3.71)

R + jωL = γ ∗ Z

(3.72)

G + jωC L = γ Z

(3.73)

These distributed-lump coupled-transmission-line parameters are expected to be frequency dependent and can provide intuitive insight into the physical properties of the coupled-transmission-line system. If the distributed parameters are derived from s-parameter measurements, these frequency-domain-parameter values can be extrapolated via a fitting function beyond the upper and lower frequency measurement ranges to extend the transmission-line-frequency models. Note, transmission-line parameters are generally not strongly varying functions of frequency. Limited frequency-range extrapolations of parameters beyond the measurement range can be performed with some confidence if collaborative electromagnetic-field simulations are also performed. In conclusion, the distributed-coupled-transmission-line model provides at least three benefits: 1. Practical insight into coupled-transmission-line physical implementations and relationships between conductor loss, dielectric loss, and reactive-transmission-line values. 2. Verification of simulated and measured transmission-line-parameter values and extension of the distributed-transmission-line model beyond the s-parameter measurement equipment frequency limits. Frequency extension of the transmission-line model can be useful in applications where knowledge of higher harmonic characteristics is important. 3. Models for the coupled-transmission-line pair that can be used in time-domain simulations as a differential-mode or a common-mode propagation system. It is well known that a transmission-line model can be roughly approximated from a small set of equivalent lumped-circuit elements if the transmissionline elements are fixed and do not vary with frequency. If the designer uses one of the circuits of Figure 3.6, a lumped-circuit approximation could be made with one or more copies of the appropriate lumped circuit in series. The circuit-element-parameter values would be determined by dividing the total R, L, C, and G of the transmission line by the number of lumped sections. The authors’ experience is that 100 R, L, C, and G cascaded sections can achieve good magnitude and phase accuracy for transmission lines. The microwave-circuit engineer must

70


work hard to insure acceptable accuracy and efficient simulations with sufficient but not too many lumped sections. This can be impractical for circuit simulation because it can require too much simulation time for more than a few dozen transmission lines and can cause convergence problems with the time-step algorithm of a time-domain circuit simulator such as SPICE. This approach does not solve the transmission-line simulation problem if the transmission-line circuit elements vary with frequency. For a transmission line with element parameters that vary with frequency, [R( f ), L( f ), C( f ), and G( f )] using the lumped-element approach becomes very difficult. Indeed, the use of a lumped-circuit model for transmission lines is not practical for most of these applications. A big problem is the subjective nature of the accuracy associated with any implementation of a few sections of this lumped transmission-line model. One possibility is that the lumped-model accuracy could be defined as its deviation from the frequency domain measurements of the transmission-line system. Unfortunately, this does not easily translate to accuracy specifications in time-domain simulations. The lumped model propagation would of represent a small signal bandwidth in the frequency-dependent transmission-line system. A time-domain analysis would require all source signals to be represented in the frequency domain, using a Taylor series or another expansion or transfer function method (i.e., harmonic balance, asymptotic waveform approximation, and so forth). In a relatively simple frequency-domain approach, each of the frequency-domain-signal elements would be processed through the frequency-dependent-lumped-component values and summed at each node and branch within the transmission-line network. An inverse Fourier transform calculates the time-domain waveform. Accurate time-domain analysis of a transmission-line system using a frequency varying lumped-component model requires a subjective partition of the transmission-line system into small lengths relative to the maximum signal frequency being evaluated. There is a careful balance required so as not to make the lengths too small, thereby increasing the analysis resources required to an impractical level of computation time, matrix size, or processing power. As the transmission-line system complexity is increased to represent common-mode, differential-mode, and cross-mode signals, lumped-component model time-domain analysis becomes difficult to manage. Add adjacent crosstalk-transmission lines into the system and the time-domain analysis becomes impractical even for an experienced microwave designer. There is a need for an alternative time-domain analysis that will accurately represent a mixed-mode transmission-line system including crosstalk and interference. This alternative-analysis tool should not require any subjective transmission-line-model-partition decisions, knowledge of frequency-dependent parameter models, or an expert user of transmission-line-circuit simulators. It may be possible to use the transmission-line-impulse response to provide the


71

proper time-domain analysis much more simply than using lumped-model parameters.

3.7 Single-Ended Signal Application in Mixed-Mode Terms Every signal can be decomposed into differential-mode and common-mode components, similar to a vector decomposed into X and Y components. One or both of the mixed-mode components can be equal to zero. When one of the two mixed-mode components is zero while the other is nonzero, the signal is referred to as pure-mode. However, pure-mode differential-mode or common-mode signals are difficult to produce and maintain through networks that are not perfectly balanced. Voltage and current are the basic circuit-node and circuit-branch values of any electrical network. Current is more difficult to measure, requiring the circuit to be opened or there to be a known coupling factor into the circuit branch. Voltage is a measure of a circuit-node potential relative to a second circuit-node potential. Single-ended-voltage measurements are defined with a reference-voltage node as ground (a voltage with zero potential). Single-ended-voltage waves (a signal relative-to-ground or zero potential) are supported by a distributed-microwave waveguide or transmission line. The signal-ended signal supported on a microwave-transmission line, is a composite of the incident and reflected-voltage waves at a port or a physical point of the waveguide or transmission line. These incident-voltage and reflected-voltage waves are separated and sampled with the use of directional couplers. If the waveguide or transmission-line port is terminated with its characteristic impedance, reflections from reverse-voltage waves exiting a port are absorbed by the characteristic-termination impedance. The reverse-current-wave can be determined using the characteristic impedance, (3.5) and (3.6). The voltage and current relations of (3.23) through (3.26) determine the mixed-mode voltage waves and current waves transmitted from a single-ended port-injected-signal source or stimulus to an output single-ended port. This applies to the terminals of a pair of single-ended ports that are uncoupled or coupled. The ports of a conventional two-port or four-port network analyzer are an example of an uncoupled set of single-ended ports. Mixed-mode waves can be introduced in a pair of single-ended ports from a network-analyzer signal applied to an input single-ended port. Figure 3.11 shows a single-ended port with a 2-V incident or forward-wave-single-ended stimulus applied at port 1 while port 2 has a 0-V incident or forward-wave-single-ended stimulus. The 2-V peak-to-peak single-ended-sinusoid signal is represented as a 1-V magnitude-sinusoid signal symmetric about zero-potential-horizontal axis on port 1, while port 2 has a constant-zero-potential signal.

72


V1 = 2V Differential circuit

single ended

V2 = 0V

Figure 3.11 Single-ended signal applied to port 1 while uncoupled port 2 has zero singleended stimulus applied.

Using the differential-mode-voltage relation of (3.23), V i 12 dd , the incident-differential-voltage wave is equal to 2V to 0V, or 2V peak-to-peak. Since the differential-mode-voltage wave is defined as two equal-amplitude signals with opposite phase, the differential-mode waves are each 1V peak-to-peak sinusoids on ports 1 and 2 with opposite phase. The common-mode voltage relation of (3.25) results inV i 12cc equal to, (2V + 0V ) / 2, or 1V peak-to-peak. A common-mode signal applied to two ports is defined as two equal-amplitude signals with zero-phase between the two-port terminals, or two equal amplitude 1-V waves on ports 1 and 2 with the same phase. These differential-mode and common-mode incident or forward-voltage waves are shown in Figure 3.12. Figure 3.12 shows these signals as individual mixed-mode waves with a resulting composite wave equal to the single-ended-voltage waves of Figure 3.11. The mixed-mode differential-mode and common-mode-voltage waves are incident on port 1 with equal amplitude and the same phase. When the mixed-mode signals at port 1 are summed, these two voltage waves are equal to

differential-mode plus common-mode equals

V1 = 2V

1V

V2 = 0V

Differential circuit mixed-mode

equals differential-mode plus common-mode

Figure 3.12 Mixed-mode incident or forward-wave signals across ports 1 and 2 introduced by a single single-ended incident or forward stimulus applied to port 1.


73

the single-ended incident-voltage wave applied to port 1. However, the mixed-mode-voltage waves on port 2 are equal amplitude with opposite phase, with a sum that is equal to zero; this defines the single-ended incident-voltage wave on port 2. This example demonstrates that a single-ended signal applied to a two-port input is comprised of both differential-mode and common-mode components. Even when the single-ended signal at a particular paired-input port is zero, it can be comprised of subtracting differential-mode and common-mode components. Each of the single-ended or mixed-mode waves shown in Figure 3.12 is a forward-voltage wave injected into the differential circuit ports 1 and 2. With the single-ended forward signal applied as in Figure 3.12, a set of directional couplers will sample the reverse single-ended voltage-wave outputs from ports 1 and 2. Using (3.23) and (3.25) these reverse single-ended voltage-wave outputs from ports 1 and 2 can be processed to determine the reverse-differential-mode and common-mode voltage-wave outputs between ports 1 and 2. These differential-mode and common-mode reverse waves are representative of the differential circuit with the single-ended forward-wave signal applied to port 1 while port 2 is unstimulated. Each of the reverse mixed-mode-voltage waves is composed of a component originating from the input differential-mode and common-mode-voltage waves. One of these two components comprising each of the differential-mode and common-mode-reverse-voltage waves is a cross-mode component. In the example of Figures 3.10 and 3.11, there are four unknown reverse-voltage waves. These four unknown reverse-voltage waves are the differential-mode-voltage wave originating from the differential-mode-forward-voltage wave, the differential-mode-voltage wave originating from the common-mode-forward-voltage wave, the common-mode-voltage wave originating from the common-mode forward-voltage wave, and the common-mode-reverse-voltage wave originating from the differential-modeforward-voltage wave. To solve for all four unknown reverse-voltage wave terms, a second set of equations are needed to construct the four equations and four known terms. Since the test conditions with a single-ended signal provides both differential-mode and common-mode-input waves (ad and ac), the mixed-mode-flow diagram can not be isolated to only two of the four mixed-mode s-parameters. This is not the case for the port 1 single-ended-stimulus standard s-parameter-test condition; because the a2 forward-voltage-wave term is zero when port 2 is terminated with the characteristic impedance (see the flow diagrams of Figures 3.13 and 3.14). With a2 equal to zero both single-ended standard s-parameter terms, S22 and S12 are zero. The measurements of b1 and b2 reflected and through voltage waves are entirely accounted for by the signal flow from the a1 forward-voltage wave. With a single-ended stimulus on port 2 the forward wave a1 is zero and the single-ended s-parameter terms, S22

74

Microwave Differential Circuit Design Using Mixed-Mode S-Parameters bd

b1 Port 1

Sdd

S11 a1

ad

S21

single-ended

b2

S12

mixed-mode Port 1

Scd

bc S22

Port 2

Sdc

Scc

a2

ac

Figure 3.13 Flow diagram for two-port single-ended network and the dual one-port mixed-mode network flow diagram.

bd2

bd1

Sdd

Sdd

ad2 = −ad1

ad1

Sdc

Sdc

Scd

Scd

bc2

bc1

Scc ac1 mixed-mode single-ended stimulus at single-ended port 1

Scc ac2 = ac1 mixed-mode single-ended stimulus at single-ended port 2

Figure 3.14 Two single-ended stimulus-flow diagrams described in terms of mixed-mode voltage waves. The same magnitude and phase single-ended stimulus are applied to each single-ended port.


75

and S21 are determined from the measured reverse-voltage wave b2 and the through-traveling-voltage wave b1. The dual measurement process for a mixed-mode s-parameter network requires a pure-mode-signal stimulus with only one of the two mixed-mode forward-voltage waves having a nonzero value. The other voltage-wave magnitude is equal to zero. It becomes a two-step signal-stimulus process with two different mixed-mode s-parameters being determined from the two measurements. Most network-analysis equipment is designed with a single-signal source for single-ended stimulus at only one port at a time. Thus, mixed-mode s-parameters will be determined with a single-ended-stimulus source and single-ended measurements until a cost-effective mixed-mode stimulus can be implemented. The mixed-mode-voltage waves are defined from single-ended voltage waves in (3.74) to (3.77). a d = [a 1 − a 2 ]

2

(3.74)

a c = [a 1 + a 2 ]

2

(3.75)

b d = [b 1 − b 2 ]

2

(3.76)

b c = [b 1 + b 2 ]

2

(3.77)

The next step is to express these voltage-wave-conversion relations into a pair of matrix-conversion relations as in (3.78) and (3.79). a d a  c

 1 1 −1 a 1   = 2 1 1  a   2   

(3.78)

b d b  c

 1 1 −1 b 1   = 2 1 1  b   2   

(3.79)

These are simplified to (3.80) and (3.81). a mm = Ma std

(3.80)

b mm = Mb std

(3.81)

where M is the transformation matrix described in (3.81),

76


M =

1 1 −1 2 1 1 

(3.82)

The mm superscript represents the mixed-mode voltage waves, while the std superscript represents the standard-voltage waves. The standard s-parameter relation is defined as b std = S std a std

(3.83)

Replace the standard voltage-wave terms in (3.83) with those of (3.80) and (3.81) to yield (3.84) to (3.87). M −1b mm = S std M −1 a mm

(3.84)

b mm = MS std M −1 a mm

(3.85)

b mm a −mm = MS std M −1

(3.86)

S mm = MS std M −1

(3.87)

Solving for the mixed-mode s-parameters in terms of the complete set of single-ended s-parameters results in S mm =

1 S 11 − S 12 − S 21 + S 22 2 S 11 − S 12 + S 21 − S 22

S 11 + S 12 − S 21 − S 22  S 11 + S 12 + S 21 + S 22 

(3.88)

To obtain the complete set of mixed-mode s-parameters the flow diagram would be modified as shown in Figure 3.14. For the first single-ended stimulus applied on single-ended port 1, the reverse and through measured mixed-mode voltage waves have the mixed-mode relations shown in (3.89) and (3.90). b d 1 = S dd a d 1 + S dc a c 1

(3.89)

b c 1 = S cc a c 1 + S cd a d 1

(3.90)

The second single-ended stimulus results in a second set of mixed-mode voltage-wave reverse and through measurement relations of (3.91) and (3.92). b d 2 = S dd a d 2 + S dc a c 2

(3.91)


b c 2 = S cc a c 2 + S cd a d 2

77

(3.92)

Assuming the first and second single-ended-stimulus signals have identical amplitude and phase, the incident-voltage waves in mixed-mode terms yield (3.93) and (3.94): ac 2 = ac 1 = ac

(3.93)

a d 2 = −a d 1 = −a d

(3.94)

with four resulting equations in (3.95) to (3.98). b d 1 = S dd a d + S dc a c

(3.95)

b c 1 = S cc a c + S cd a d

(3.96)

b d 2 = −S dd a d + S dc a c

(3.97)

b c 2 = S cc a c − S cd a d

(3.98)

Now the four mixed-mode s-parameters can be solved in terms of mixed-mode reverse and through voltage-wave measurements using (3.99) through (3.102): S dd =

1 (b d 1 − b d 2 )a d−1 2

(3.99)

S dc =

1 (b d 1 + b d 2 )ac−1 2

(3.100)

S cd =

1 (b c 1 − b c 2 )a d−1 2

(3.101)

S cc =

1 (b c 1 + b c 2 )ac−1 2

(3.102)

The calculated results will be identical for single-ended s-parameter conversion to mixed-mode s-parameters or mixed-mode s-parameter conversion to single-ended s-parameters. However, numerical calculation issues and calibration errors make this process less accurate. When two large approximately equal numbers are subtracted from each other to obtain a small result (approaching

78


zero), the accuracy of the almost zero result term is degraded due to errors in the large number. This accuracy issue occurs in the determination of the cross-mode terms, Sdc and Scd for a differential-mode or common-mode-signal processing component. For both differential-mode and common-mode-signal processing the cross-mode component terms are expected to approach zero in an ideal design.

3.8 Conclusions A differential circuit can be analyzed with a system using a single-ended-signal source if it is a linear time-invariant circuit. A linear time-invariant mixed-mode component does not require a two terminal stimulus to measure its differentialmode and common-mode performance. Passive or active differential circuits do not require pure-mode stimulus to provide accurate mixed-mode s-parameters. A pure-mode signal is defined as differential-mode only or common-mode only signal. Single-ended s-parameter-matrix-functions such as stability analysis and simultaneous matching can be applied to mixed-mode Sdd and Scc s-parameters. Mixed-mode s-parameters are a unique parameter solution for a linear system with an even number of single-ended ports that define simultaneous orthogonal set of propagating waves. Assuming a small-signal time invariant component, the behavior can be completely defined by a set of single-ended or mixed-mode s-parameters. Either set of s-parameters can be transformed into the other set of s-parameters with the aid of transformation matrix M. Network design and analysis tools can be applied to both sets of s-parameters and should in some cases to provide a compete design approach. Which set of s-parameters to use is based on the component function and desired analysis being considered. Differential-balanced circuits may have robust practical features that make mixed-mode the design choice in a growing number of equipment applications. Mixed-mode s-parameters aid design and analysis of differential components with an intuitive set of parameters complementing the differential-RF signal processing.

References [1]

Ramo, S., J. R. Whinnery, and T. Van Duzer, Fields and Waves in Communication Electronics, 2nd ed., New York: Wiley, 1984, pp. 131–136.

[2]

Gonzalez, G., Microwave Transistor Amplifiers, Analysis and Design, 2nd ed., Upper Saddle River, NJ: Prentice Hall, 1997, pp. 28–29.

[3]

Bockelman, D. E., and W. R. Eisenstadt, “Combined Differential and Common-Mode Analysis of Power Splitters and Combiners,” IEEE Trans. on Microwave Theory and Techniques, Vol. 43, No. 11, Part 4, November 1995, pp. 2627–2632.

4 Differential Low-Noise Amplifier 4.1 Introduction Scattering parameters (s-parameters) or power-wave analysis tools have been a tremendous aid in designing linear two-port amplifiers. Before s-parameters, nonreciprocal active components such as bipolar transistors, microwave field effect transistors, and diodes posed difficult problems in the optimization of RF and microwave circuit designs. For example, transistor-model parameters were difficult to extract from Y- or Z-parameter measurements, which were prone to noise and systematic measurement error at high frequencies. There were few circuit design and performance analysis CAD tools for postprocessing the microwave transistor parameters to see how they influence system design. It is difficult for modern microwave designers to imagine how a 1960s low-noise amplifier (LNA) designer could design, tune, and verify a high-volume robust receiver front-end design. The designer was partially blind without s-parameter device measurements and analysis theory such as simultaneous conjugate match, stability, and gain circles. This situation is potentially the same situation that a present-day differential low-noise amplifier (DLNA) designer faces with the design and verification of balanced differential RF and microwave circuits. DLNAs are four-terminal multiple active device amplifiers used in balanced differential signal processing systems. This chapter develops the extension of standard two-port single-ended s-parameter techniques to four-port balanced DLNA applications.

79

80


4.2 DLNA Implementation Low-frequency applications have used balanced differential circuits for a number of years for providing high-noise immunity and for eliminating the ground connection as the signal-return path. As discussed in Chapter 1, there are three main benefits to balanced differential circuit implementations as compared to single-ended circuits, that have accelerated their use in RF and microwave systems: • Improved noise isolation; • Increased dynamic range for a given supply voltage; • Reduced even-order distortion.

However, there are strong reasons why the introduction of differential circuits to replace single-ended circuits has been a slow process: • Double the circuitry versus a single-ended design; • Twice the current and power consumption; • Difficult to analyze and design; • Not easily characterized.

The designer must analyze trade-offs between reasons to adopt or not to adopt differential designs for each design specification. However, the extension of standard two-port s-parameters to four-port differential circuits and the presence of new four-port test equipment should eliminate the last two reasons for avoiding differential circuit technology [1]. Figure 4.1 shows two common DLNA implementations; they are: (1) separate amplifiers that are ideally independent and identical, and (2) two amplifying devices with a common-bias current-sink or source. Both implementations Supply Port 1

1

Port 3 Port 1

Port 2

2

Port 4

Port 3

Port 4

Figure 4.1 Two RF DLNA implementations.

1

2

Port 2


81

are feasible for RF or microwave applications and mixed-mode s-parameter tools can evaluate both implementations. The example in Section 4.2.1 uses two independent and identical LNAs to illustrate mixed-mode techniques in a DLNA system. 4.2.1

Ideal Mixed-Mode S-Parameters

Figure 4.1 shows a block diagram of an ideal DLNA on its left and (4.1) shows the associated s-parameters. Given two LNAs that are completely independent (no undesired coupling between single-ended ports 1 to 2, 3 to 4, 1 to 4, and 2 to 3), the four-port standard s-parameters and zero element terms are in a checkerboard pattern (4.1). For the independent LNAs, the coupling terms S21, S12, S32, S23, S41, S14, and S34, S43 = 0 (see Figure 4.2). S 11 0  S 31 0 

0 S 22 0 S 42

S 13 0 S 33 0

0  S 24   = S std 0  S 44 

(4.1)

Assuming that the ideal DLNAs have identical performance, yield equal input and output impedances, S11 = S22 and S33 = S44. In addition, the forward and the reverse transfer s-parameters also are equal, S31 = S42 and S13 = S24.

Port 1

Port 3 1

S21 = 0 S12 = 0

S32 = 0

S41 = 0

S43 = 0 S34 = 0 S14 = 0

S32 = 0

2 Port 2

Port 4

Figure 4.2 Standard single-ended four-port s-parameter flow diagram for an ideal DLNA.

82


Taking the DLNA’s ideal set of standard s-parameters (4.1) and processing them through the mixed-mode transform (2.42), (2.43), (2.44), and (2.45) gives: S 11 + S 22 1 S 31 + S 42  2 S 11 − S 22 S − S 42  31

S 13 + S 24

S 11 − S 22

S 33 + S 44

S 31 − S 42

S 13 − S 24 S 33 − S 44

S 11 + S 22 S 31 + S 42

S 13 − S 24  S 33 − S 44   = S mm S 13 + S 24  S 33 + S 44 

(4.2)

The further simplified results are shown in (4.3) in which the differential-mode and common-mode s-parameters are equal (Sdd = Scc), and the cross-mode s-parameters are zero Sdc = Scd = 0, S 11 S  31 0 0 

S 13 S 33 0 0

0 0 S 11 S 31

0  0  S dd = S 13   S cd S 33 

S dc  = S mm S dc 

(4.3)

For the DLNA example, (Sdc = Scd = [0]) and the differential-mode and common-mode 2 × 2 parameter matrices Sdd and Scc can be calculated independently for simultaneous conjugate match, stability, gain circles, or any other two-port s-parameter analysis. Even though the differential-mode and common-mode s-parameters graph like single-ended s-parameters, all three have different characteristic impedances. For a 50Ω standard four-port s-parameter data (single-ended Zo = 50Ω) transformed to mixed-mode s-parameters, the common-mode impedance = Zocc = 25Ω while, the differential-mode impedance = Zodd = 100Ω. Equation (4.3) summarizes the s-parameters for an ideal differential low-noise amplifier. In (4.3), cross-mode terms (Sdc and Scd) are zero and the differential-mode and common-mode s-parameters (Sdd and Scc) are equal to each other and equal to the single-ended two-port standard s-parameters of a singleended LNA. Again, Sdd and Scc are normalized to different reference impedances. This ideal DLNA analysis gives several conclusions. • The ideal differential-mode has the equivalent signals output as the

series connection of two single-ended LNAs while the common-mode gives the equivalent signal output as an LNA parallel connection. • The matching of the separate nonideal two-port LNAs (parameters will vary for each) and the cancellation of cross-mode or cross-coupled terms limit the differential performance.


83

If the designer achieves targeted matching and cross-mode characteristics, the design can achieve good noise rejection, even-order distortion elimination, and increased dynamic range. For this circuit topology, the complete characterization of a single LNA determines performance of the differential-mode and common-mode signal paths. Performing differential-mode, common-mode, or single-ended analyses is a matter of selection of the correct characteristic impedance 100Ω, 25Ω, or 50Ω (Z0, Zodd, or Zocc), respectively. DLNA design analyses include stability, gain, noise, and other linear circuit functions. 4.2.2

Practical Matching Limitations

There are two design requirements for ideal DLNA performance. These are no cross-coupled terms and matched parameters for each separate DLNA subcircuit. What happens as the DLNA matching and cross-mode characteristics drift away from the circuit ideal values? The DLNA has great benefits, differential noise rejection, even-order harmonic elimination, and increased dynamic range. These drastically diminish with poor DLNA matching. Practical LNAs are manufactured units with small variations in their RF/microwave parameters. Evaluation of the DLNA’s set of mixed-mode s-parameters determines how far can the manufactured LNA parameters values drift to obtain a desired level of noise immunity, even-order distortion rejection, and/or increased dynamic range. What is it about differential microwave signal processing that results in improved noise immunity, reduced even-order distortion, and increased dynamic range? Strongly amplifying a desired differential-mode signal while attenuating noise via low common-mode amplification accomplishes noise rejection and even-order harmonic rejection. Any phase or amplitude imbalance in the two differential signal paths disturbs the desired signal combining and reduces the cancellation of the undesired noise and distortion signals at the circuit output. Cross-mode s-parameter terms (Sdc and Scd) characterize this. These cross-mode terms describe the direct conversion of common-mode signals and even-order harmonic distortion as differential-mode signals at the output. Thus, mixed-mode s-parameters can identify and quantify imbalance and cross-mode terms in microwave circuits. 4.2.3

Noise Rejection

Figure 4.3 shows a simple visual example in which a common-mode noise signal, N(t) couples equally to both input terminals of a DLNA. In Figure 4.3, the noise input signals, N1(t) and N2(t), are equal in magnitude and phase, while the intended input signals, S1(t) and S2(t), are equal in magnitude but opposite in phase (or sign). The signal gain and phase from port 1 to port 3 are equal to the signal gain and phase from port 2 to port 4,

84

Microwave Differential Circuit Design Using Mixed-Mode S-Parameters N3(t) = G*N1(t) S1(t) Port 1

Port 3

S3(t) + S4(t) N1(t) Horizontal Symmetry

S3(t) = G*S1(t) S4(t) = G*S2(t)

N2(t)

Port 2

N3(t) + N4(t)

Port 4

S2(t) N4(t) = G*N2(t) N(t) Interference Noise Signal Coupled into both input terminals equally

Figure 4.3 A DLNA with ideal matching and balance. This figure illustrates common-mode noise-signal cancellation.

S 3 (t ) = −S 4 (t )

(4.4)

N 3 (t ) = N 4 (t )

(4.5)

The DLNA output of the desired differential signal is S 3 (t ) − S 4 (t ) = S 3 (t ) − ( −S 3 (t )) = 2S 3 (t )

(4.6)

while the undesired differential noise signal output is N 3 (t ) − N 4 (t ) = N 3 (t ) − N 3 (t ) = 0

(4.7)

Any difference in the amplifier 1 and 2 transfer function phase, even a very small difference, effects the common-mode noise rejection. Section 4.2.3 will show a similar result for the common-mode rejection of even-order harmonic distortion signals. The simple example of Figure 4.3 shows two microwave


85

amplifiers with an equal forward transfer function of gain, G. Assuming ideal input source and load terminations, the amplifier forward gain would be the magnitude of the amplifier s-parameter S 21 = G , independent of the forward phase-transfer function from port 1 to 3. The two input time signals, S 1 (t ) and S 2 (t ), are applied to ports 1 and 2. While the output signals, S 3 (t ) and S 4 (t ), are equal to GS 1 (t ) and GS 2 (t ). A differential-mode input signal applied across terminal 1 and 2 is the difference between the two input signals, S din (t ) = S 1 (t ) − S 2 (t )

(4.8)

A common-mode signal applied across terminals 1 and 2 is the average of the input signals, S cin (t ) = (S 1 (t ) + S 2 (t )) 2

(4.9)

If S 1 (t ) is equal to S 2 (t ) with opposite phase, S 1 (t ) = −S 2 (t )

(4.10)

All of the input signal’s energy is differential with maximum differentialmode amplitude, S din (t ) = S 1 (t ) − S 2 (t ) = S 1 (t ) − ( −S 1 (t )) = 2S 1 (t ) = 2S 2 (t ) (4.11) S cin (t ) =

(S 1 (t ) + S 2 (t ))

S 1 (t ) − (S 1 (t ))

=0

(4.12)

S dout (t ) = GS 1 (t ) − GS 2 (t ) = 2GS 1 (t ) = 2GS 2 (t )

(4.13)

2

=

2

Next, the outputs of ports 3 and 4 are

S cout (t ) =

(GS 1 (t ) + GS 2 (t )) 2

=0

(4.14)

However, if S 1 (t ) magnitude is equal to S 2 (t ) magnitude with the same phase, the input and output signals are all common-mode signals,

S c _ out (t ) =

S 1 (t ) = S 2 (t )

(4.15)

S d _ out (t ) = GS 1 (t ) − GS 2 (t ) = 0

(4.16)

(GS 1 (t ) + GS 2 (t )) ( 2GS 1 (t )) 2

=

2

= GS 2 (t )

(4.17)

86


A subsequent gain stage may be used to amplify (detect) differential-mode signals and to attenuate common-mode signals to negligible levels. Noise and even-order harmonic distortion signals will present themselves to input ports 1 and 2 as common-mode signals, N 1 (t ) = N 2 (t )

(4.18)

D 1 (t ) = D 2 (t )

(4.19)

where N x (t ) is the noise signal at port x and D x (t ) is an even-order harmonic distortion signal at port x. Adding noise and even-order distortion to the desired differential-mode signals, S din (t ) = (S 1 (t ) + N 1 (t ) + D 1 (t ))

− (S 2 (t ) + N 2 (t ) + D 2 (t )) = 2S 1 (t ) = 2S 2 (t ) S cin (t ) =

4.2.4

( 2N 1 (t ) + 2D 1 (t )) 2

(4.20)

(4.21)

Common-Mode Gain

Common-mode gain (CMG) is the basic difference between the two DLNA implementations shown in Figure 4.1. For the independent amplifiers shown in Figure 4.3, it is easy to see that single-ended, S 21 , differential-mode gain (DMG), and CMG, are all equal: DMG = CMG = S 21

(4.22)

The DLNA of Figure 4.1 on the right side, also shown in Figure 4.4 as a common-current source or sink, does not have equal DMG and CMG. Figure 4.4 shows the differential-mode and common-mode ac models of the commoncurrent source/sink DLNA. The differential-mode model has a virtual ground connection on the common-emitter node. However, the common-mode ac model has an open circuit or high impedance to ground at the common-emitter node. This virtual ground results in an optimized (large) transfer gain or transconductance for the differential-mode model [2]. In contrast, the commonmode ac model would have transfer loss or low transconductance, due to the very high emitter impedance to ground. This virtual ground and common-mode current source/sink functions as a single-ended to differential converter. Applying an input signal to one input terminal while grounding the other input terminal for ac signals using a large capacitor to GND will couple the differential input signal through the


87 Supply Ic1(t) Ic2(t) output

+

2

1

input Supply

Differential AC model

Ic1(t)

− virtual AC ground

I(t) = Ic1(t) − Ic2(t) = 0

Ic2(t) output Supply +

1

2

Ic1(t)

input − common-mode current sink

Ic2(t)

Common-mode AC model +

output

2

1

input − virtual AC open

I(t) = Ic1(t) + Ic2(t) = 2Ic1(t)

Figure 4.4 A DLNA with common-current source or sink.

common-current source/sink connection node. The DLNA produces a differential signal output across both output terminals. Single-ended input to differential output gain requires an unbalanced-to-balanced signal converter, also know as a balun (BALanced to UNbalanced). While the isolated pair of amplifiers (left side of Figure 4.1) does provide a DLNA implementation, it has no commonmode-signal rejection and no conversion of single-ended input to differential output.

4.3 DLNA S-Parameters, Sdd Examination of the transformation of standard four-port s-parameters to mixed-mode s-parameters helps to identify the parameters that contribute to the differential-mode, common-mode, and cross-mode terms. Equation (4.23) shows the transformation in a simple equation form. Each of the differentialmode s-parameters (S ddxy :{S dd 11 , S dd 21 , S dd 12 , and S dd 22 } have two standard (forward/reverse) cross-coupled transfer s-parameter terms:

)

88


S dd 11  S dd 12 S  dd 21 1 S dd 22  2 S cd 11 S  cd 12 S cd 21  S cd 22

= (S 11 − S 12 − S 21 + S 22 ) = (S 13 − S 14 − S 23 + S 24

) = (S 31 − S 32 − S 41 + S 42 )

= (S 33 − S 34 − S 43 + S 44 ) = (S 11 − S 12 + S 21 − S 22 ) = (S 13 − S 14 + S 23 − S 24

) = (S 31 − S 32 + S 41 − S 42 ) = (S 33 − S 34 + S 43 − S 44

)

S dc 11 = (S 11 + S 12 − S 21 − S 22 )   S dc 12 = (S 13 + S 14 − S 23 − S 24 ) S dc 21 = (S 31 + S 32 − S 41 − S 42 )   S dc 22 = (S 33 + S 34 − S 43 − S 44 )  = S mm (4.23) S cc 11 = (S 11 + S 12 + S 21 + S 22 )  S cc 12 = (S 13 + S 14 + S 23 + S 24 )   S cc 21 = (S 31 + S 32 + S 41 + S 42 )   S cc 22 = (S 33 + S 34 + S 43 + S 44 )

These are the undesired cross-modes shown in (4.23): (S21, S12, S14, S41, S23, S32, S43, and S34). Equation (4.23) shows subtraction of cross-coupled terms that are part of the differential-mode s-parameter term conversion. There is no canceling that would reduce cross-coupled term contribution to the composite differential-mode 2 × 2 matrix s-parameters. For example, the differential-mode reverse s-parameter term (Sdd12) of (4.23) has the negative sum of two standard four-port s-parameter cross-coupled terms S14 and S23 as part of its value: S dd 12 = (S 13 − S 14 − S 23 + S 24

)

(4.24)

Reducing all of the undesired cross-coupled forward and reverse signal path standard four-port s-parameter terms to zero (S21, S12, S14, S41, S23, S32, S43, and S34 = 0) is the simplest method of improving the DLNA. As these cross-coupled terms go to zero, the cross-mode s-parameters Scdxy and Sdcxy, are left with port-impedance terms, forward transfer, and reverse transfer s-parameters that are of similar magnitude but with opposite signs. Similar magnitude means that they are equal in value assuming a matched balanced design implementation; then their sum equals zero. The result of zero magnitude cross-coupled s-parameter terms and matched balance designs is zero magnitude cross-mode terms S cdxy = 0 and S dcxy = 0. The differential-mode Sddxy and the common-mode Sccxy s-parameters dominate the DLNA performance. The DLNA designer can use the differential-mode and common-mode s-parameters in microwave circuit design and analysis for stability, gain circles, noise circles, and simultaneous conjugate match analysis under these conditions.

4.4 Neutralized DLNA There are special circuit designs that result in a set of differential-mode s-parameters with unique and desirable properties. An example would be the


89

unilateralization [3] of a DLNA, in which the sum of the undesired cross-coupled s-parameters S14 and S23 are designed to be equal to the sum of the reverse s-parameters S13 and S24. What results is a differential-mode reverse s-parameter with zero value [Sdd12 = 0; see (4.23)]. The unilateral DLNA achieves an input decoupled from the output. If the undesired standard s-parameters, S14 and S23 are small compared to the forward transfer terms associated with the differential-mode s-parameters, this unique design style will have much less impact on the desired DLNA Sdd21 performance. The differential signal flow diagram of Figure 4.5 shows the feedback signals from the output ports to the input ports. When the two feedback signals at a given port are equal in magnitude and opposite in phase, the result is a complete cancellation of the feedback signals. Microwave designers define neutralization as the use of feedback to cancel the DLNA reverse signal terms and the result is a unilateral amplifier. Equations (4.25), (4.26), and (4.27) show the cancellation of the signal feedback at port 1 and port 2 during neutralization. S 1 (t ) = −S 2 (t ) = S (t ) ⇒ ideal differential input signal voltage (4.25) S 3 (t ) = S 1 (t )S 31 + S 2 (t )S 32

= S (t )(S 31 − S 32 ) = −S 4 (t ) ⇒ Assume S 31 = S 42

(4.26)

S13 Sf13(t) Port 1

Port 3 1

S1(t) Sf14(t)

Sf23(t)

S3(t)

S14

S23

S2(t)

S4(t) 2

Port 2

Port 4

Sf24(t) S24

Figure 4.5 Neutralization of a DLNA or a unilateral DLNA.

90


S f 1 (t ) = S f 13 (t ) + S f 14 (t ) = S 14 S 3 (t ) + S 13 S 4 (t ) = 0

Assume S 13 = S 14

(4.27)

Port 2 uses a similar set of equations for neutralization. One benefit of DLNA unilateralization is unconditional stability, stability under all source and load terminations. Another benefit is isolation of output signals from the amplifier input, such as the local oscillator, LO signal from a mixer following a DLNA circuit.

4.5 Passive Circuits For optimized passive four-port circuits that are used on the inputs and outputs of DLNAs, (i.e., gyrators, couplers, and so forth) the balance of the cross-coupled signals is the most important factor. Unlike the previous discussion for the optimized DLNA differential-mode s-parameter response, cross-coupled standard s-parameter terms (S21, S12, S41, S14, S32, S23, S34, and S43), can exist with large magnitudes and still provide zero magnitude mixed-mode s-parameters S cdxy = S dcxy = 0 . A balanced network along a horizontal line of symmetry between the two differential microwave circuit halves achieves this goal. Figure 4.6 shows this concept for a passive circuit with matched components. The circuit has matched s-parameter terms on the opposite sides of the horizontal line. The designer should expect undesired cross coupling to result from stray parasitic passive components similar to the network of Figure 4.6, these parasitics are a function of the physical circuit layout. Flaws in the circuit make the standard cross-coupled s-parameters deviate from this balanced matched condition, some of the input differential-mode input signal converts to

)

(

1

3

Z2 Z3

Z1 Z5 2

Zb = Z9 = Z10 Zc = Z 2 = Z 4

Z6 4

Z4 Z8

Za = Z 7 = Z 8

Z9

Z7

Z10

Zd = Z 5 = Z 6 Ze = Z 1 = Z 3

Figure 4.6 Passive circuit example of a balanced network with horizontal symmetry.


91

common-mode output or common-mode input signal converts to differential-mode output. What results is reduced noise rejection and even-mode harmonic distortion rejection, which depends on pure common-mode propagation.

4.6 Impedance Matching A number of references teach microwave matching of standard two-port amplifiers to 50Ω transmission systems. What is different about DLNA matching is the existence of both common-mode and differential-mode signals and transmission paths. These two modes can exist independently or with strong interactions. The ideal independent DLNAs of Figure 4.1 provide one example of independent common-mode and differential-mode responses. The common-mode match is the parallel combination of two single-ended circuit impedances and the differential-mode match is the series combination of two single-ended circuit impedances, given two independent and matched single-ended amplifiers. A hybrid combiner in which the input signal is split into a pair of equal magnitude output signals with 90° or 180° phase offsets provides an example of the interaction between the differential-mode and common-mode signals. So how does one accomplish differential matching and what is important? First, because of stability and other design concerns both differential-mode and common-mode termination impedances should be determined. Second, the microwave-matching objectives would be the same as previous two-port networks; that is optimized power, noise, and distortion performance under stable operating conditions. This discussion will start with ideal matching networks that are easy to separate into differential-mode and common-mode configurations. For an ideal balanced differential network, as shown in Figure 4.7, (Ya1 = Ya2 and Za1 = Za2), there is a virtual ground halfway between the input two terminals. This is a node where the differential terminals do not see the common-mode signal component. The dc and ac conducting paths within the circuit connect these components from the differential virtual-ground node to the reference ground. Figure 4.7 shows this differential virtual ground node with admittance Yc connected from it to the dc/ac conducting ground. Also, the differential impedance shown in Figure 4.7 and (4.28) is  1 1  Z differential = ( Z a1 + Z a 2 )  +  Y a1 Y a 2 

(4.28)

The component Yc has no differential voltage across its terminals or current flow down its network branch with respect to an ideal balanced differential

92

Microwave Differential Circuit Design Using Mixed-Mode S-Parameters DC and AC conducted ground node

Ya1 Za1 differential potential

Yc

Zdifferential = (Za1 + Za2) || (1/Ya1 + 1/Ya2)

Za2 Ya2 virtual differential AC ground node

Figure 4.7 Differential network impedance with differential virtual ac ground.

signal. The differential impedance of the network shown in Figure 4.7 is independent of the value of Yc. A similar independent condition occurs for the common-mode impedance of the network shown in Figure 4.8. Figure 4.8 shows the common-mode signal terminals and grounds and (4.29) displays the calculation of the common-mode impedance. Although all of the impedance and admittance components contribute to the common-mode impedance, the designer can reconfigure the basic network to make Zcommon practically independent of one component, DC and AC conducted ground node

Ya1 Za1

Zcommon = (Za1 || Za2) + (1/Yc) || (Ya1 + Ya2)

Yc Za2 Ya2

Figure 4.8 Conversion of the differential-mode network of Figure 4.7 to a common-mode network.


Z common = ( Z a1 ) ( Z a 2 ) +

93

1 (Y a1 + Y a 2 ) Yc

(4.29)

4.7 Cross-Mode Parameters The relationships of (4.23) show that cross-coupled standard s-parameter values of zero eliminate cross-mode s-parameters (Sdcxy and Scdxy) if the ports are balanced. The cross-mode s-parameter Scd21 characterizes a differential signal applied across terminals 1 and 2 that converts to a common-mode output across terminals 3 and 4. A second cross-mode parameter is a common-mode input applied to terminals 1 and 2 that converts to a differential-mode output across terminals 3 and 4 (see Figure 4.9, characterized by Sdc21). To drive the cross-mode s-parameters and related signal-propagation magnitudes to zero the appropriate standard four-port s-parameter terms shown in (4.23) must be equal. For example, if S 11 = S 22 and S 12 = S 21 , then S cd 11 = S 11 − S 12 + S 21 − S 22 = 0.

Sdd21(t) =

S3(t)−S4(t)

S3(t) − S4(t) ⇒

S1(t)−S2(t) S1(t)

Differential-mode input signal source

Sdc21(t) =

3

1

S1(t) − S2(t)

Scd21(t) =

Differential-mode output signal

DUT S2(t)

2

4

S3(t) + S4(t)

S3(t) + S4(t) ⇒

S1(t) − S2(t)

S3(t) − S4(t)

S3(t) − S4(t) ⇒

Common-mode output signal

Differential-mode output signal

S1(t) + S2(t) S1(t) 1

S1(t) + S2(t) Common-mode input signal source

DUT S2(t)

Scd21(t) =

3

2

4

S3(t) + S4(t) S1(t) + S2(t)

S3(t) + S4(t) ⇒

Common-mode output signal

Figure 4.9 Mixed-mode examples with differential-mode and common-mode inputs.

94


4.8 Common-Mode Rejection Figure 4.6 displays circuit elements (Z1, Z3, Z5, and Z6) that may represent undesired parasitic impedances overlaid on the ideal four-port s-parameters of a DLNA built from independent two-port LNAs. If the parasitic terms of Figure 4.6, (Z7, Z8, Z9, and Z10), have horizontal symmetry and the LNA s-parameters match each other, the cross-mode differential s-parameters Scdxy and Sdcxy have zero magnitudes regardless of the parasitic term values. S cdxy = 0 and S dcxy = 0 (zero magnitude differential cross-mode terms) means that the common-mode noise rejection and even-order distortion rejection are extremely large. The s-parameter terms (Sdc11, Sdc12, Sdc21, and Sdc22) characterize common-mode to differential-mode conversion. These s-parameter terms define the increase in the common-mode noise and even-order distortion resulting from the combination of circuit imbalances and mismatched circuit impedances. In an IC, the parasitic impedance terms are a function of layout and are largely capacitive. As a circuit simulation reduces operating frequency, these capacitive IC impedance values will increase relative to the port impedance, Z0 to the point at which they can be neglected (with no impact on circuit matching as well). At very low frequencies the overall common-mode noise and even-order distortion rejection is limited by differential device matching (i.e., CMOS transistor-to-transistor threshold voltage, Vt variation). Device (transistor) matching typically relates to dc device parameters that remain constant as frequency increases. Device imbalance will dominate the circuit common-mode performance. Common-mode undesired noise or interference conducts into a DLNA on the power supply, ground, outputs, or inputs as shown in Figure 4.10. The circuit in Figure 4.10 applies the desired signal (eg) differentially across the input ports 1 and 2, while circuit applies the undesired interference signal (ec) as common-mode (or in-phase) to port 1 and 2. The signal at port 1 is e1 = ec − e g −eg

Port 3

Port 1

+ ec

(4.30)

1 e3

50Ω

50Ω

+ 50Ω

e4

+ eg

2 Port 2

Figure 4.10 DLNA with common-mode input-noise signal.

Port 4

50Ω


e 2 = ec + e g

95

(4.31)

The differential input signal is the difference of e1 and e2; this equals 2eg. The common-mode input is the average of e1 and e2; this equals or 2e c 2. Assume the DLNA has horizontal symmetry and S31 is equal to S42, then the differential output across ports 3 and 4 is 2S31eg: e 3 = e 1 S 31

(4.32)

e 4 = e 2 S 42

(4.33)

The output port voltages are at ports 3 and 4; the differential output voltage is the difference of the output port voltages of port 3 and 4: e 3 − e 4 = e 1 S 31 − e 2 S 42

(4.34)

The common-mode input interference, ec is completely rejected as a component of the differential signal at the DLNA output for an ideal balanced and matched LNA pair (common-mode to differential-mode conversion = 0). The ratio of the cross-mode forward s-parameter term, Scd21 to the differential-mode forward s-parameter term, Sdd21 is a measure of DLNA common-mode rejection and the quality of the DLNA balanced performance. CMRR is a standard DLNA specification that does not measure all of the common-mode-signal rejection described above. CMRR is a measure of the differential-signal voltage gain divided by the common-mode voltage gain from the input-to-output terminals of a DLNA. For a DLNA using independent LNA halves, common-mode and differential-mode signals have the same s-parameter values, S cc 21 = S dd 21 . For the DLNA in Figure 4.1 on the left, the CMRR = 1, since S cc 21 = S dd 21 . However, DLNAs with a common-current source or sink will have Sdd21 many orders of magnitude greater than S cc 21 . However, both types of DLNA use matching and balance to provide supply and ground commonmode-signal rejection to the output terminals. The ratio of the common-mode output voltage to the common-mode driven input signal voltage defines the CMG. In a constant port impedance environment, s-parameters are functions of port voltage values normalized by the square root of the characteristic impedance Zc, Zo, or Zd, the common-mode, single-ended, or differential-mode characteristic impedance values. The result is that CMG is equal to the forward transfer s-parameter Scc21. While the common-mode rejection ratio (CMRR) is the differential open-loop input voltage gain CDG = Sdd21 divided by the CMG, CMRR = S dd 21 S cc 21

(4.35)

96


CMRR (dB) = 20 log S dd 21 S cc 21

(4.36)

Equations (4.35) and (4.36) assume a standard s-parameter DLNA measurement terminated in four single-ended impedances of 50Ω or a differentialmode and common-mode s-parameter measurement system with a 4 to 1 impedance ratio (for example, 100Ω to 25Ω). Opening the feedback signal path allows the determination of the open-loop gain. This is done by injecting a signal and solving for the output voltage. The designer must make sure the open-loop circuit has the correct termination impedance at each port (same as the closed-loop circuit). This CMRR value holds for the DLNA with feedback as well.

4.9 Supply and Ground Response A unique use of mixed-mode s-parameters for DLNAs is characterizing the supply and ground response. To do this, terminate the input ports of the DLNA to ground through a reference impedance of 50Ω. Ports 1 and 2 of the four-port measurement system are connected to the power supply of LNA 1 and 2 as shown in Figure 4.11. Once these power supply mixed-mode s-parameters are determined, the DLNA power-supply common-mode performance is analyzed in a similar manner to the common-mode input example. Evaluation of the power supply decoupling follows from this DLNA circuit information. It is easy to see how this process extends to other circuit terminals, such as the ground, and to supply to input port analyses as well. One last idea is to use a four-port network analyzer to characterize input, output, supply, and ground behavior of a single-ended LNA. Neglecting the cross-mode terms, the single LNA sparameters map to a DLNA configuration (dual LNAs). Port 1

Supply

Port 3 1

Port 1 Port 2 Mixed-mode network analyzer

50Ω 50Ω

Port 3 2 Supply

Port 4

Port 4

Port 2

Figure 4.11 Mixed-mode s-parameters of supply-to-output terminals.


97

Figure 4.12 shows an alternative method of power supply or ground common-mode analysis/measurement. A commercial function generator provides the supply bias plus the injection of common-mode-noise signals. This generator can provide a direct value of ec, the common-mode noise signal. The designer may characterize the circuit in terms of a voltage similar to characterizing a dc supply regulator. However, a more complete circuit analysis includes the expected supply-decoupling network as well as the output-port network. The commercial equipment can be limited in frequency range and may not terminate the circuit inputs in known impedance values. The power-supply-termination impedance must be compatible with s-parameter measurements and the dc bias needs of the DLNA components. For independent identical LNAs used in a DLNA application, cross-mode s-parameter’s differential-output rejection of applied common-mode signals is limited by the matching. Common-mode signal rejection is a linear process from any input terminal pair to a corresponding differential-output-terminal pair. A common-current source or sink for the differential-circuit halves or postprocessing of the output signal obtains additional common-mode signal rejection.

4.10

Common-Mode Signal Postprocessing

As shown in Figure 4.9, a perfectly differential-mode input signal generates a composite of a differential-mode and a common-mode set of signals at the output terminals of an imperfect DLNA. An ideal matched DLNA with zero value cross-mode s-parameters would have a zero-valued cross-mode signal at the output as shown in Figure 4.3. However, any mismatch in the two LNAs or the parasitics of a DLNA will result in common-mode signal generation at the

Supply

ec −eg

+

Port 1

+

Port 3 1

e3

50Ω 50Ω +

eg

e4 Port 2

50Ω 50Ω

2 Port 4

Figure 4.12 Measurement of supply and/or ground common-mode rejection.

98


output. Common-mode postprocessing requires separating the common-mode output signal from the intended differential signal. Figure 4.13 shows one method of separating the common-mode signal at a DLNA output. In Figure 4.13, the midpoint of the matched resistor load (R1 and R2 in which R1 = R2) across the output terminals (port 3 and port 4) will have zero interference signals if the DLNA is ideal. However, if there is a common-mode signal in the output terminals port 3 and port 4, this common-mode signal will be present at the node referenced to ground. This is true for dc signals and ac signals up to microwave frequencies as long as nodes 3, 4, and 5 have balanced impedances with respect to each node. This common-mode signal can compensate for dc imbalances as well as ac and RF signal imbalances, using a number of feedback and/or feed-forward strategies [4].

4.11

Noise Figure

DLNA common-mode noise rejection applies to noise sources coupled into all amplifier nodes and branches. Noise injects into the DLNA input terminals, power supply terminals, or ground terminals; the differential-output rejection depends on the balanced differential-signal path. Any imbalance in the common-mode signal source or DLNA circuit will reduce the common-mode noise rejection, shown in Figure 4.12. This common-mode rejection does not occur for noise sources internal to the DLNA. Thermal, junction, and recombination noise sources within the DLNA circuit result in noise signals applied differentially across the internal terminals. Circuit analyses combine these internal noise sources into a single ideal differential-noise-signal source modeled at the differential input or output terminals. If the differential-noise-voltage sources associated with each DLNA half are independent (uncorrelated), their power sum is 3 dB less than the correlated power sum of an ideal differential-input-voltage signal. This indicates the noise figure (NF) of a DLNA is 3 dB lower than a single LNA. However, DLNA noise

Port 3

Port 1

S1(t)

S3(t)

1

R1

common-mode signal S5(t)

5

R2 S2(t)

S4(t)

2 Port 2

Port 4

Figure 4.13 Simple common-mode output signal detector for circuit signal processing.


99

sources are not independent for common-current source or sink circuits. Current-source and current-sink circuits result in correlated-noise signals similar to an applied input signal and have the same response as noise sources in a singleended LNA. Noise figure is defined as the ratio of the available total-noise power at the circuit output No to the available noise power at the output due to the thermal noise from the input-noise-resistor termination, Rn. Some circuit-noise models make, Rn an equivalent noise resistance in order to represent the noise of transistors as well as resistors. This input termination noise is shown in Figure 4.14 as N1i and N2i, the available input-noise power due to Rn1 and Rn2 summed into the respective isolated LNA inputs. In this discussion, the internally generated available thermal, junction, and shot noise power of each of the LNAs is referenced to their respective input as (Na1)i and (Na2)i. Available power gain of the LNAs is given by the variables, Ga1 and Ga2, which are applied to the numerator and denominator of the noise-figure relationship (4.37) for both of the LNA halves of the DLNA configuration: F =

(N i + N a )G a No = = 1+ N a N i N iG a N iG a

(4.37)

Figure 4.14’s circuit’s output shows an ideal lossless differential-power combiner to simplify the differential-noise relationship. The noise power sums at the output load RL, as shown by

Vs

Lossless power combiner

− + (Na1)i

Rn1 +

Ga1

N1i RL

N2i + Γs

Rn2

Ga2 Γout

(Na2)i −Vs

− +

Figure 4.14 Isolated LNAs configured as a DLNA for noise analysis.

100


F =

(N 1i + (N a1 ))G a1 + (N 2i + N a 2 )G a 2 N 1i G a1 + N 2i G a 2

(4.38)

For matched LNAs, N a1 = N a 2 = N a and G a1 = G a 2 = G a and the input impedances are also matched, R n 1 = R n 2 then N 1i = N 2i = N i . Then (4.38) reduces to (4.37). If the cross-mode terms of the mixed-mode s-parameters representing the DLNA of Figure 4.14 are zero, then the available power gain, Ga, is Ga =

1 − ΓS

2

1 − S dd 11 ΓS

2

S dd 11

2

1 1 − Γout

(4.39)

in which Γout = S dd 22 +

S dd 12 S dd 21 ΓS 1 − S dd 11 ΓS

(4.40)

Γout is the network output impedance as a function of ΓS , the input termination impedance, shown in Figure 4.14 [5]. This analysis confirms that the noise figure of an ideal DLNA is similar to that of a single-ended design. An ideal DLNA is defined to have zero cross-mode terms and balanced parasitics.

4.12

Balanced Signal Losses

For a conventional two-port amplifier, the signal loss measured at the output consists of input and output-reflection loss, caused by reduction in the simultaneous-conjugate-match conditions, which optimize amplifier-power transfer. A balanced (matched) DLNA has an additional loss mechanism, cross coupling a portion of the differential input signal to the alternative output port (S32 and S41). The differential-mode s-parameter relationship of (4.41) can illustrate this. S dd 21 = (S 31 − S 32 − S 41 + S 42 ) 2

(4.41)

This relationship converts four-port standard s-parameters to mixed-mode differential s-parameters. Forward propagation cross-coupled terms S32 and S41 (undesired) are part of this relationship and have a negative sign. This shows the magnitude of the forward propagation signal reduces unless the cross-coupled terms are in phase with the forward terms (S31 and S42). During the four-port standard s-parameter measurement procedure, signals S1(t) and S2(t) represent


101

incident wave signals (a1(t) and a2(t)), which are applied independently to all four DLNA ports which are terminated in the characteristic impedance of 50Ω. Analyses using the standard s-parameter transformation to mixed-mode s-parameters assume that the input signals are ideal differential signals (S1(t)=−S2(t)), shown in (4.25), (4.26), and (4.27). Using this equality and (4.25), (4.26), and (4.27) in (4.44), (4.45), (4.46), and (4.47) will result in (4.42), in which the signals S3(t) and S4(t) represent the output-wave signals (b3(t) and b4(t)). These results are the forward power-transfer function for the four-port network of Figure 4.15. The differential available output-voltage-wave signal across terminals 3 and 4, bd2, is b d 2 = S 3 (t ) − S 4 (t ) = b 3 (t ) − b 4 (t )

(4.42)

To calculate the mixed-mode differential response divide bd2 by ad2, the differential incident-voltage-wave signal applied across terminals 1 and 2. a d 1 (t ) = S 1 (t ) − S 2 (t ) = a 1 (t ) − a 2 (t )

(4.43)

Even with balanced cross-coupled terms (S32 = S41), the output signal reduces unless the cross-coupled s-parameters are zero or in phase with the associated forward s-parameter. In addition to the effects of the cross-coupled standard s-parameters (S32 and S41) on the differential forward-transfer function, the S1(t)*S31

S31

S3(t) = S1(t)*S31 + S2(t)*S32 Port 1 1

S1(t)

S3(t) = S3(t) − S4(t)

S41

S2(t)*S32 Port 3

S3(t)

S32

Port 4 S1(t)*S41

S4(t)

S2(t)

2

Port 2

S42

S4(t) = S2(t)*S42 + S1(t)*S41 S2(t)*S42

Figure 4.15 Four-port s-parameter signal flow representation of a differential signal.

102


cross-mode s-parameter term, Scd21 will affect Sdd21. This cross-mode term represents the imbalance associated with the standard s-parameter inequality (S32≠S41). Figure 4.16 and (4.44), (4.45), (4.46), and (4.47) show the mixed-mode wave relationship in which ad1 is a differential-mode input wave or incident signal, and bd2 is the available output-wave signal, b d 1 = S dd 11 a d 1 + S dd 12 a d 2 + S dc 11 a c 1 + S dc 12 a c 2

(4.44)

b d 2 = S dd 21 a d 1 + S dd 22 a d 2 + S dc 21 a c 1 + S dc 22 a c 2

(4.45)

b c 1 = S cd 11 a d 1 + S cd 12 a d 2 + S cc 11 a c 1 + S cc 22 a c 2

(4.46)

b c 1 = S cd 21 a d 1 + S cd 22 a d 2 + S cc 21 a c 1 + S cc 22 a c 2

(4.47)

Cross-mode term Scd21 represents the output port available common-mode-signal response bc2 divided by the forward differential-mode input-incident-wave signal ad1. The differential-mode incident input-wave signal ad1 portion not amplified to the differential-mode signal bd2 at output port 2 results in bc2. An ideal differential component would have bc2 of (4.46) equal to zero, or the entire differential input signal amplified at the output as a differential signal. For measurement of Sdd21, signals ad2, ac1, and ac2 are set to zero reducing (4.45) to S dd 21 =

bd 2 ad 1

(4.48) ad 2 = ac 1 = ac 2 = 0

x = x2

x = x1

ac1

ac2

ad1

ad2

bc1 bd1 Port 1

DDUT

bc2 bd2 Port 2

Figure 4.16 Differential-mode and common-mode incident and reflected waves in a differential two-port device-under-test.


103

This indicates any imbalance in the input-signal-source phase or amplitude degrades the output signal. Input-signal imbalance can compensate for the DLNA imbalance as ad2, ac1, and or ac2 incident-wave signals. The implementations include precondition, feedback, or feed-forward signal compensation techniques. Since IC or discrete component-manufacturing defects (sometimes unavoidable) create circuits with imbalances, compensation could be the best long-term solution for improved differential-circuit performance. Cross-mode components of mixed-mode s-parameters are the most sensitive to the effects of mismatch. For example, the coupling of mixed-mode s-parameter, Sdc21 with a magnitude of 20 dB below the differential-mode s-parameter magnitude of Sdd21, would only have a +/− 0.83-dB impact on Sdd21. This analysis assumes that the designer applies an ideal differential input signal with no phase and gain offsets across the circuit input terminals. In addition, the value of Sdc21 is an indication of the imbalance between the cross-coupled terms S dc 21 = (S 31 + S 32 − S 41 − S 42 ) 2

(4.49)

Clearly, measuring dBc values of differential-mode and common-mode output signal levels will result in a higher resolution characterization of physical matching than measurement differences in the individual standard four-port s-parameters terms.

4.13

Distortion Analysis

The large-signal-output signal response, Sout(t) of an amplifier DUT is shown in Figure 4.17 with input signal Sin(t) defined as S out (t ) = c 0 + c 1 S in (t ) + c 2 S in2 (t ) + c 3 S in3 (t ) + K + c n S inn (t )

(4.50)

Here, c0 represents the dc signal in the output and c1Sin(t) is the linear ac response. Equation (4.50) goes beyond the small-signal assumptions used in standard and mixed-mode s-parameter analyses in the rest of this book; (4.50) introduces a large-signal output that is represented as a complex coefficient series expansion of Sin(t). This expansion is valid for a circuit that has a stable quiescent bias point and no hysteresis or memory of its previous state. A DLNA (without thermal heating effecting its operation) is typically such a circuit. The input power of an s-parameter signal source connected to a DLNA can be increased until significant distortion occurs in the DLNA output response. More importantly, the designer must worry about acceptable levels of distortion

104


Sin(t)

Sout(t)

DUT

Sout (dB)

Sout (phase) (degrees) |S21|

output compression

ideal phase transfer constant

slope = 1

linear

nonlinear

Sin (dB) = 20 Log |Sin(volts)|

Figure 4.17 Input versus output for a LNA biased into output compression.

in their RF/microwave circuit designs and must understand what happens when the DLNA exhibits nonlinear response at its output. Differential circuit design can mitigate some of these distortion effects. In terms of s-parameters, the DLNA linear or small-signal response is b d 1 = a d 1 S dd 11 + a d 2 2S dd 12

(4.51)

b d 2 = a d 1 S dd 21 + a d 2 S dd 22

(4.52)

The linear forward-transfer voltage function is S dd 21 = b d 2 a d 1

ad 2 = 0

(4.53)

where bd2 is the output voltage wave and ad1 is the input of incident voltage wave. Referring to (4.50), when there is no dc offset (c0 = 0) and there are no higher-order distortion products at the output (c 2 , c 3 K, c n = 0), S dd 2 , is S dd 21 = c 1

(4.54)

Here, c1 is a complex constant value. Over this linear range, the output will change directly with the input decibel for decibel, with a slope of 1. The additional higher-order terms in (4.50) are nonlinear responses and are not part of standard s-parameter or small-signal analysis. However, they are


105

part of general amplifier design and create new differential design criteria. For that reason, this section reviews the topic of distortion with respect to DLNAs. The exponential value associated with the distortion term in (4.50) defines the order of the distortion products. For example, a two-tone input signal expressed in (4.55) can demonstrate distortion. S in (t ) = A1 e jω 1

(t )

+ A 2 e jω 2

(t )

(4.55)

The third term of the polynomial (4.50) expands as (4.56) and (4.57) with two-tone input: S in2 (t ) = ( A1 e jω 1 = A12 e jω 1

(t )

(t )

+ A 2 e jω 2

+ 2 A1 A 2 e jω 1

(t )

(t )

)

2

(4.56)

+ A 22 e j 2 ω 2

(t )

(4.57)

The first and third terms of (4.56) are second-order distortion terms. A differential circuit expresses two two-tone signals separately: S 1in (t ) = A1 e jω1 t ) + A 2 e jω 2 t ) (

S 2in (t ) = A1 e

j ( ω 1 (t ) + π )

(

+ A2e

(4.58)

j ( ω 2 (t ) + π )

(4.59)

The third term of (4.50) expands as (4.60) and (4.61) with the pair of two-tone signals treated separately. S 1in 2 (t ) = A12 e j 2 ω 1 S 2in 2 (t ) = A12 e

j 2( ω 1 (t ) + π )

(t )

+ 2 A 2 A 2 e jω1 t ) e jω 2

+ 2 A1 A 2 e

(

j ( ω 1 (t ) + π )

e

(t )

+ A 22 e j 2 ω 2

j ( ω 2 (t ) + π )

+ A 22 e

(t )

j 2( ω 2 (t ) + π )

(4.60) (4.61)

Combining these terms into a single differential term gives S din 2 (t ) = S 1in 2 (t ) − S 2in 2 (t ) = 0

(4.62)

This derivation shows there are no second-order distortion products in a perfectly balanced DLNA. Following this procedure with the fourth term in (4.50), S 1in 3 (t ) = ( A1 e jω 1

(t )

+ A 2 e jω 2

(t )

)

3

(4.63)

106


= A13 e j 3 ω 1

(t )

+ 3 A12 A 2 e j 2 ω 1 t ) e jω 2 (

+ 3 A1 A 22 e jw 1 t ) e j 2 ω 2 (

(

S 2in 3 (t ) = −( A1 e jω 1

(t )

(t )

+ A 23 e j 3 ω 2

+ A 2 e jω 2

(t )

)

3

(t )

(4.64)

(t )

)

= −S 1in 3 (t )

(4.65)

The composite differential third-order terms are S din 3 (t ) = S 1in 3 (t ) − S 2in 3 (t ) = 2 ∗ S 1in 3 (t )

(4.66)

Unlike the second-order distortion products, the third-order products are not zero because of the balanced DLNA configuration. One can see how DLNA third-order distortion compares to that of a single-ended amplifier with two-tone input signals of (4.58): S in 3 (t ) = ( A1 e jω 1

(t )

+ A 2 e jω 2

(t )

)

3

= S 1in 3 (t )

(4.67)

The result shows half of the third-order distortion product of the DLNA: S in 3 (t ) = S din 3 (t ) 2

(4.68)

The ideal DLNA odd-order distortion terms are output differentially but with the same transfer function as a single-ended amplifier. While the even-order distortion terms are common-mode to the output, a form of cross-mode conduction through nonlinear transfer functions.

4.14

Odd-Order Distortion

DLNA outputs distorted signals above a certain power level. That power level relates to the single-ended IP3 intercept point of the DLNA halves. For odd-order distortion products, ideal amplifier halves have equal amplitude levels with 180° phase offsets, resulting in differential odd-order distortion products that are twice those of the individual single-ended amplifiers. By reducing the DLNA input signal by 3 dB, the designer can make a comparison between single-ended and DLNA odd-order output-distortion product power levels. It is necessary to reduce DLNA input power to produce an output-signal level equal to that of the single-ended amplifier with the same termination impedance. Distortion products are a function of the voltage level applied across the nonlinear transfer function of the DLNA halves. So, if the circuit measurement uses a


107

differential power splitter to provide the input signals to the DLNA halves and a power combiner for the output signals, the LNA power transfer match is maintained. Since the input power lowers 3 dB to each of the DLNA halves, the output-distortion signal reduces by a factor of m, where m is the order of the distortion. For third-order distortion m = 3, this results in 9-dB lower output-distortion products for an ideal 3-dB power splitter on the DLNA input. Combining the output signals with an ideal 3-dB combiner increases the desired and undesired distortion signal each by 3 dB, keeping the desired signal to undesired distortion ratio constant. This analysis demonstrates that the input DLNA intercept point IIP3 improves by 3 dB. For independent LNAs used in a differential application, the input intercept point improves by 3 dB over the same LNA used in single-ended configurations; Figure 4.18 shows this. Even if a transformer is used instead of a power splitter to convert the input signal to a new input impedance (twice that of the original single-ended application), there is a 3-dB input intercept improvement over a single-ended LNA. This 3-dB input intercept improvement for the DLNA over an equivalent single-ended LNA implementation is true for odd-order distortion products.

LNA & DLNA

POUT (dB)

DLNA PIN IP3out DLNA 3 dB

IP3out LNA

9 dB 3 dB

m=3 m=1 3 dB Pin (dB) 3 dB

IP3in DLNA IP3in LNA

Pin S-DLNA

Figure 4.18 Odd-order distortion of LNA versus DLNA.

108


There is no additional common-mode-rejection improvement in the odd-order intercept point of a DLNA over a single-ended implementation. Matching and balance imperfections in the DLNA will have an insignificant effect on the odd-order distortion products. Circuit linearization techniques can achieve improvements in odd-order intercept points similar to linearization techniques for improvement of single-ended distortion.

4.15

Even-Order Distortion

An ideal differential circuit would have no even-order distortion products at the output-signal terminals. The individual single-ended amplifier LNA-distortion generation or nonlinear transfer function stays the same in a differential application. This means a distortion specification such as intercept point; IIP3 associated with single-ended amplifiers applies to the amplifier halves of a DLNA. Reduction in the even-order-distortion components is a result of the phase shift during generation of an even-order harmonic. Across the differential output terminals, even-order-distortion components are in phase or common-mode. If the amplitude levels are equal, the low common-mode gain eliminates the commonmode even-order terms. The potential elimination of even-order distortion products of a DLNA is not a function of the even-order intercept point of the individual amplifiers of the DLNA. For a DLNA, the matching and balance limits the even-order intercept point within the DLNA halves. In contrast, this is not true for the DLNA odd-order intercept point, which is equal to the individual LNA odd-order intercept points plus 3 dB. A well matched and balanced DLNA with a very good DLNA even-order intercept point may consist of individual amplifiers with very poor single-ended even-order-intercept points. For a given amplifier phase and gain imbalance, both even and odd DLNA intercept points can be improved with a corresponding improvement in both of the individual amplifier’s intercept points. The DLNA even-order distortion rejection is sensitive to balance or matching just as common-mode noise rejection is. However, unlike noise rejection even-order distortion is also sensitive to the applied signal imbalance at the DLNA input. What this means is any deviation from the ideal differential input-signal condition (S1(t) = −S2(t)) will contribute directly to the level of differential even-order distortion products at the DLNA output. Any amplitude or phase shift in the input signals will result in a corresponding amplitude or phase shift in the even-order distortion product levels at each of the individual DLNA halves. Interference or noise signals coupled into a DLNA input, supply, or ground have transfer functions that are independent of the applied DLNA input signal. This is true as long as the applied input signals are operating within


109

the linear range of the DLNA. Input signal imbalance in both phase and amplitude results in common-mode signal misalignment and a reduced cancellation of even-order distortion components. Odd-order distortion products become misaligned with the input signal imbalance, however, the ratio of applied signal-to-odd-order distortion products remains constant, independent of applied input-signal imbalance. As a result, circuit odd-order distortion is not as sensitive to applied signal balance as is circuit even-order distortion. Quantification of the improvement of DLNA even-order distortion-intercept points begins with a review of CMRR. Figure 4.3 shows the concept of CMRR. CMG is defined as the ratio of the common-mode-output voltage to the common-mode driven input-signal voltage. S-parameters are power-waves incident, reflected, or transferred through a circuit. These power-waves are voltage or current signals normalized by the characteristic impedance Z0 of 50Ω. The CMG then is equal to the mixed-mode s-parameter term Scc21. While the CMRR is the differential open-loop input-voltage gain, CMRR equals Sdd21 divided by the CMG: CMRR = S dd 21 S cc 21

(4.69)

In (4.69), the differential open-loop gain means no circuit output is fed back to input signal paths (such as resistors for setting the DLNA gain). Designers consider CMRR a measure of the DLNA transfer rejection to a commonmode input signal. This CMRR value holds for DLNA with feedback applied to itself as well. The expression (4.69) gives no regard to the phase relationships of the common-mode or differential-mode input-to-output ratio, the expression uses just the magnitude terms when determining CMRR. CMRR is a measure of the DLNA linear dynamic range and gives no indication of its nonlinear product generation. However, if the DLNA rejects common-mode input signals it will also reduce nonlinear distortion that a common-mode signal produces. A CMRR that has a magnitude greater than one reduces any input signal imbalance. As CMRR approaches infinity, an unbalanced input signal would become a pure differential-mode signal after amplification through the DLNA. Common-current source or sink DLNAs have an advantage over independent LNA implementations, resulting in better even-order-distortion performance in the presence of unbalanced input signals. Quantification of even-order distortion improvement and the CMRR of a DLNA is complex since nonlinear distortion implies a frequency translation from the input to output signals. In addition, it makes a difference if the nonlinear transformation occurs at the DLNA input, output, or somewhere in between. Although CMRR improves input signal imbalances that can generate even-order distortion there may not be any improvement with respect to matching and imbalance within the DLNA circuit.

110


Figure 4.19 shows the odd-order-intercept relationship of a DLNA. This relationship assumes an ideal fundamental differential input signal is applied and the undesired distortion products are the result of imperfect matching and balance in the DLNA circuit halves. The intercept point is the point where the desired fundamental output-power level is equal to the higher-order distortionproduct power, (PFundamental and PDistortion of Figure 4.19). For even-order-distortion products generated at the input, the output signals are common-mode and subject to a CMRR reduction at the distortion-product frequency. Since the distortion product curve, of Figure 4.19 has a slope m equal to the order of the distortion product (2 for this example), the PDistortion curve is shifted to the right by CMRR/m. A shift in the output or input intercept point is equal to the CMRR value. The common-mode rejection reduces generation of distortion signal products at DLNA output ports 3 and 4. However, the differential circuit results in an additional source of even-order distortion components measured by the cross-mode parameters Scd21 and Sdc21 relative to Sdd21. A DLNA with only one side of the output signal applied to subsequent circuits will not see a cross-mode rejection improvement in the even-order distortion intercept point. A transformer balun or similar means processes a differential signal to become a

POUT, (dB)

PFundamental

PDistortion

m=2 m=2

CMRR

m=1

PDistortion + CMRR / m

CMRR / m

Figure 4.19 Application of CMRR to distortion-intercept analysis.

PIN, (dB)


111

single-ended signal and obtain cross-mode rejection of even-order distortion products. Determination of system even-order distortion intercept point by using CMRR may not be accurate in certain applications and conditions. The author recommends additional verification to insure improved second-order rejection or any other even-order distortion component can be attributed to the CMRR. Third-order harmonic-intercept points (IP3) need to be measured at a sufficiently small-signal level. Similar to IP3 measurements, second-order-rejection measurements need to be made a low enough signal level that the CMRR is constant between two signal amplitudes and equal the even-order harmonic (slope = 2 for second-order harmonic). DLNA intercept third-harmonic-intercept points can be described as third-harmonic input-referred intercept points, IIP3 and third-harmonic output-intercept points, OIP3. The DLNA second-order input-referred harmonic distortion intercept point is called IIP2. In addition, the CMRR frequency is associated with the DLNA fundamental frequency and the even-mode imbalances in the system. The even-order-distortion-generation frequencies are even multiples of the fundamental frequency. The system imbalance is not necessarily the same at different harmonic frequencies and can be much higher at the even-distortion generation frequencies. Direct measurement of the even-order input or output intercept point is the most reliable method. For a DLNA this means measurement with application of an ideal differential-mode signal or common-mode signal. Any input-signal imbalance will directly result in an even-order distortion imbalance at the output. Measuring the applied common-mode signal at the output along with the even-order distortion signals gains some information. However, the designer needs additional information to resolve all of the circuit response components that contribute to the even-order signal, at the output of a DLNA. To summarize the DLNA typical design expectations: • IIP3 is improved by 3 dB for DLNAs. • The DLNA IIP3 depends on the IIP3 of the single-ended LNA

subcircuits (if present). • IP2 is reduced to near zero in balanced DLNAs. • Balanced DLNA IIP2 does not depend on the single-ended subcircuit

LNA IIP2. Just the subcircuit LNA matching. • Match and balance have relative insignificant effects on DLNA

odd-order distortion. • Matching and balance have significant effects on DNLA even-order

distortion.

112

4.16


Conclusions

Mixed-mode s-parameters provide a means of converting standard single-ended signal s-parameters into two-signal differential-mode and common-mode sources. This chapter shows applications of these sources to differential low-noise amplifiers. Mixed-mode s-parameters quantify the cross-mode signal behavior, which is a measure of matching and balance. This can improve common-mode and even-order distortion rejection in a differential design. As the cross-mode s-parameters become negligible, the pure-mode differential and common-mode s-parameters can solve additional microwave analyses such as stability and simultaneous conjugate match. In addition, the transformations between standard s-parameters and mixed-mode parameters lend insight into the unique differential circuit implementations such as neutralization. This chapter defines standard differential parameters such as CMRR in terms of mixed-mode s-parameters, adding an intuitive connection between the DLNA with independent LNA halves and DLNA with a common-current source or sink. The use of mixed-mode s-parameters is essential to understand both linear and nonlinear DLNA performance.

References [1]


[2]

Gray, P. R., et al., Analysis and Design of Analog Integrated Circuits, 4th ed., New York: John Wiley and Sons, 2001, pp. 215–246.

[3]

Cheng, C. C., Neutralization and Unilateralization, IRE Transactions–Circuit Theory, Vol. 2, June 1995, pp. 138–145.

[4]

Seidel, H., “A Feedforward Experiment Applied to an L-4 Carrier System Amplifier,” IEEE Trans. on Communications, Vol. 19, No. 3, June 1971, pp. 320–325.

[5]


5 Power Splitter and Combiner Analysis 5.1 Introduction Power splitters and combiners are an indispensable signal-processing component in RF and microwave systems. Mixers, balanced amplifiers, baluns, unbalanced-to-balanced converters, phase shifters, and many other applications employ splitters and combiners as a component. Some of the more commonly used splitter/combiners include Wilkinson 0°, balun/unbal 180°, and 90° branch-line couplers. Some recent microwave engineering designs have focused on using uniplanar transmission line to simplify MMIC implementations and require active splitter/combiners with arbitrary phase relationships. The most common signal splitter application is for signal preparation for the inputs of mixers that perform frequency translation. Mixers are used in communication transmitters and receivers. Mixer configurations are categorized as single-ended, single-balanced, double-balanced, and balanced quadrature. Single-ended mixers are based on the nonlinear properties of a single active device (transistor) and suffer insufficient isolation between the mixer RF, LO, and intermediate frequency (IF) ports. This results in frequency translation of all in-band spurious signals. The single-balanced mixer has the RF or LO split into a differential or push-pull signal to improve isolation and spurious rejection by about 30 dB. A double-balanced mixer splits both RF and LO into balanced signals to improve isolation and second-order spurious rejection. A balanced quadrature mixer splits the RF and the LO are four ways into a differential quadrature signal set, and the IF is combined into a differential signal, to obtain sideband suppression or image rejection. The amount of second-order spurious attenuation, sideband suppression, or image rejection is a function of the balance of the signal. How well the amplitude and phase are balanced determines 113

114


the level of rejection obtained. Perfect balance completely eliminates the undesired signal. This quickly degrades to 20–30 dB for a practical uncompensated balanced circuit. Balanced performance as a function of amplitude and/or phase offset is an easy analysis to perform in a circuit simulator, as seen in the Chapter 5 problems on the accompanying CD. The basic splitter function converts a single-ended signal into a mixed-mode signal comprised of at least one single-ended pair of signal outputs. The mixed-mode signal output is ideally a pure-mode differential-mode or common-mode signal, or more realistically, some combination of differential-mode and common-mode output. Combiners perform the reverse-signal transfer function as the splitter. A combiner function converts mixed-mode-signal inputs into a single-ended-signal output. There are three main splitter/combiner component realizations defined by a 0°, 90°, or 180° mixed-mode signal-phase-offset term, Φ. A 0° splitter/combiner provides common-mode to single-ended mixed-mode signal conversion. While a 180° splitter/combiner provides differential-mode to singleended mixed-mode signal translation. A 90° splitter/combiner provides “quadrature” mixed-mode signal conversion and can be used in wireless transceivers. Quadrature local oscillator signals can be used in the receiver mixers to downconvert received signals to baseband. Two quadrature signals represented as a mixed-mode signal pair have equal amounts of differential-mode and common-mode signals. In a well-constructed RF receiver, quadrature oscillators provide strong image-signal rejection and simplify the receiver design greatly. This chapter will focus on power splitter and combiners, and the application of mixed-mode s-parameters to provide unique splitter/combiner design and performance insights. Phase and magnitude balance are the primary splitter/ combiner manufacturer specifications of merit, because these parameters can strongly influence RF system signal-processing performance. Since balanced performance is a combination of amplitude and phase offset, separate specifications of amplitude and phase offset are often specified at the worst-case value assuming the other offset value is not contributing to the imbalanced results. This leads to over engineering a splitter/combiner design. There is a need for a single-specification term integrating amplitude and phase offset into a signal composite imbalance parameter to avoid over specification.

5.2 Wilkinson Impedance Transformer Splitter/Combiner The theory and design of splitter/combiners with mixed-mode s-parameter analysis is introduced using the well-known Wilkinson impedance transformer [1]. A description of Wilkinson splitter/combiner design is built from the transmission-line-impedance-transformer pair shown in Figure 5.1. These two


115

transmission lines are one-fourth-wavelength long and have a 70.7Ω impedance and are designed to convert the independent 50Ω output ports (Z2L and Z3L) into two 100Ω ports at the input. These two 100Ω input ports are connected in parallel resulting in a composite port 1 impedance with a 50Ω-input impedance. This new circuit is shown in Figure 5.2 with common port 1 impedance, Z1 of 50Ω when ports 2 and 3 are terminated in 50Ω. This is a very logical design process until the design process is reversed with a 50Ω termination, Z1L placed at the common port 1. Looking into the two output-port impedances, Z2 and Z3 and 150Ω is seen as shown in Figure 5.3. This output is not matched to 50Ω with 150Ω output impedances. The splitter-design process becomes a difficult one to find an optimized solution with all ports matched. The optimized solution is defined as having zero reflection coefficient (matched 50Ω impedances) at all three ports terminated in 50Ω. In addition, a goal is to have all the input power at input port 1 transferred to the output ports 2 and 3. The next sections will use standard and mixed-mode s-parameters to analyze this Wilkinson splitter. These analyses will provide the optimized design solution that is an ideal matched-port solution.

Zo =

Z2L* (2*Z1L) = 70.7Ω

2*Z1 = 100Ω

Z2L = 50Ω λ/4

2*Z1 = 100Ω

Z3L = 50Ω Zo =

Z3L* (2*Z1L) = 70.7Ω

Figure 5.1 Transmission-line-impedance transformer pair designed to convert a 50Ω load to a port impedance of 100Ω.

Zo =

Z2L* (2*Z1L) = 70.7Ω

Z2L = 50Ω λ/4

Z1 = 50Ω

Z3L = 50Ω Zo =

Z3L* (2*Z1L) = 70.7Ω

Figure 5.2 Transmission-line-impedance transformer splitter/combiner circuit with a port 1 impedance of 50Ω.

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5.3 Splitter/Combiner Mixed-Mode S-Parameter Matrix The Wilkinson splitter/combiner microwave response was determined long ago. The reader can gain new insights into an optimized Wilkinson splitter-design procedure with the use of mixed-mode s-parameters. The splitter/combiner shown in Figure 5.3, has one single-ended port and one mixed-mode port composed of single-ended ports 2 and 3. An ideal splitter would have one single-ended input port and two single-ended output ports with an equal amplitude and a fixed phase offset at the output signals. A 3 × 3 s-parameter matrix composed of one single-ended port and a second mixed-mode port is shown in Figure 5.4. The s-parameter port reflection or return loss terms, Sss11, Sdd22, and Scc22 are the single-ended and mixed-mode s-parameters representing the impedance matching at the ports in Figure 5.4. Sss11, Sdd22, and Scc22 zero magnitude values result from perfect port matching. The incident-power wave is absorbed into a port that is perfectly matched (infinite return loss). A perfect match for

Zo =

Z2 = 150Ω

Z2L* (2*Z1L) = 70.7Ω

Z2L = 50Ω

Z1 = 50Ω Z1L = 50Ω

λ/4

Z3L = 50Ω Zo =

Z3L* (2*Z1L) = 70.7Ω

Z3 = 150Ω

Figure 5.3 Transmission-line-impedance transformer splitter/combiner and a design analysis of its port impedance values.

Single-ended stimulus

Differential-mode stimulus

Common-mode stimulus

Port 1

Port 2

Port 3

Single-ended response

Port 1

Sss11

Ssd12

Ssc12

Differential-mode response

Port 2

Sds21

Sdd22

Sdc22

Common-mode response

Port 3

Scs21

Scd22

Scc22

Figure 5.4 Mixed-mode s-parameter matrix for the splitter/combiner component.


117

normalized s-parameters is usually 50Ω for a single-ended port, 25Ω for a common-mode port, and 100Ω for a differential port. The magnitude of the maximum reflection is 1 and it represents a complete mismatch (open or short); the entire incident-power wave is reflected and none of the power is absorbed into the device port. The network of Figure 5.3 is a unique case where the single-ended and common-mode ports have a perfect match; the entire incident-power wave is absorbed into the ports. However, the differential-mode has a maximum reflection magnitude with none of the incident power wave absorbed into the port. This is seen in the mixed-mode s-parameter matrix for Figure 5.3 that is shown in (5.1). The positive value of Sdd22 = 1 [center matrix element of (5.1)], means the Figure 5.3 differential-mode port 2 input impedance is an open or exhibits infinite resistance. The organization of the matrix terms in (5.1) is shown in Figure 5.4.

S

mm

0 0 1 = 0 1 0    1 0 0 

(5.1)

S-parameter transmission terms of (5.1), Sds21 = 0 and Scs21 = 0 are port 1 single-ended signal-transfer parameters to differential-mode signal and common-mode-signal outputs at mixed-mode port 2 (see Figure 5.5). S-parameter transmission terms, Ssd12, and Ssc12, are transfer parameters for differential-mode and common-mode input signals at mixed-mode port 2 to a single-ended-output signal at port 1. For a lossless-passive network like the Wilkinson splitter/ combiner of Figure 5.3, the maximum transmission s-parameter magnitude value is 1.0, with all of the input power into a device port exiting out of the device output port(s). The ideal mixed-mode s-parameters of (5.1) indicate lossless transmission in both directions between the single-ended port and the common-mode port. However, there is no single-ended to differential-mode transmission in either direction since Ssd12 = 0 and Sds21 = 0. Figure 5.5 shows how Scs21 creates a common-mode output signal from a single-ended input signal. The Wilkinson splitter/combiner of Figure 5.3 has “open” input impedance associated with the differential-mode input at port 2 and has no differential-mode signal transmission. This results in a splitter/combiner with satisfactory single-ended and common-mode port matching and signal transfer but poor differential-mode matching and signal transmission. However, there may be applications that specify infinite differential input impedance and no differential-mode signal transmission. For example, the ideal voltage or current combiner of a LInear amplification using nonlinear components (LINC) power amplifier would have a load differential-mode load impedance of infinity and a common-mode load defined by the output power and supply voltage. When

118


Mixed-mode port two, single-ended out pair

Mixed-mode port one, single-ended input

3dB 0° splitter single-ended output, port two ai ejωt

single-ended input, port one

α21ejφ21

2

ai ejωt

single-ended output, port three ai ejωt

α31ejφ31

2

Figure 5.5 A 3-dB 0° splitter example with a single-ended input signal and two equal amplitude, 0° phase offset (common-mode) single-ended output signals.

applying the Wilkinson splitter/combiner in a differential-mode source or load network, circuit stability can be an issue since differential signals are reflected back to their sources without attenuation. Since the differential-mode port input impedance is infinite, adding shunt impedance across the mixed-mode port can help match the differential circuit. A 100Ω shunt impedance, Zs (equal to the normalized differential-mode impedance) provides a perfect differential-mode match and an infinite magnitude differential return-loss s-parameter, Sdd22 = 0. In common-mode operation, an equal voltage is applied on each terminal of the 100Ω-shunt impedance; there is no resulting common-mode current or power dissipation. The only effect of the shunt impedance on the mixed-mode s-parameters of (5.1) is in the value of Sdd22. The relation for Sdd22 becomes, S dd 22 =

Zs − Z d 0 Zs + Z d 0

(5.2)

Here, Zs is the additional shunt impedance across single-ended ports 2 and 3, and Zd is the differential-mode normalized impedance, usually 100Ω (see Figure 5.6). The center term of the matrix in (5.1) becomes zero, Sdd22 = 0 for Zs = 100Ω and Zd = 100Ω.

Power Splitter and Combiner Analysis Zo =

119

Z2L* (2*Z1L) = 70.7Ω

Z2L = 50Ω Zs

Z1L = 50Ω λ/4

Z3L = 50Ω Zo =

Z3L* (2*Z1L) = 70.7Ω

Figure 5.6 A transmission-line impedance-transformer splitter/combiner with differentialmode termination-load Zs.

5.4 Splitter/Combiner Standard S-Parameter Matrix The next step is to expand the mixed-mode s-parameters in terms of single-ended standard s-parameter to gain additional insight into the Wilkinson 3-dB 0° splitter/combiner design, optimization, and application. Equation (5.3) shows the mixed-mode s-parameters in terms of the single-ended standard s-parameters. The derivation details are reviewed in a later section in this chapter.

S

mm

 2S 11 2 (S 12 − S 13 ) 1 =  2 (S 21 − S 31 ) S 22 − S 23 − S 32 + S 33 2  2 (S 21 + S 31 ) S 22 − S 23 + S 32 − S 33

2 (S 12 + S 13 ) S 22 + S 23 − S 32 S 22 + S 23 + S 32

  − S 33  (5.3) + S 33 

An initial review of the upper-left term of (5.3) demonstrates a direct connection between S11 and Sss11, the splitter/combiner single-ended port. Each port 1 to mixed-mode parameters conversion term (Sds12, Scs12, Ssd21, and Ssc21) is defined as a sum or difference of the single-ended transmission s-parameters (S12, S13, S21, and S31) with a half-power magnitude. These terms are in the top row and the left-most column, excluding the upper-left term (see Figure 5.4). While the pure mixed-mode and cross mixed-mode s-parameters (Sdd22, Scc22, Sdc22, and Scd22), are each built with all four single-ended port 2 and port 3 s-parameter terms (S22, S23, S32, and S33). These mixed-mode parameters are the 2 × 2 submatrix terms of the lower right of the matrix of (5.3). A lossless 90° splitter/combiner would have ideal standard s-parameters equal to the values shown in (5.4). The input port 1 would transmit half its power with equal magnitude and phase response to ports 2 and 3. The system would be reciprocal; ports 2 and 3 would combine equal signals at port 1 so the power adds with no losses. The phase delay between port 1 and ports 2 and 3 is 90°.

120

Microwave Circuit Design Using Mixed-Mode S-Parameters

S std

 0 = − j 2   − j 2

−j

2

−j

0 0

2 0   0 

(5.4)

Inserting the values of (5.4) in (5.3) results in the mixed-mode s-parameters of (5.5); this shows only a single-ended to common-mode signal transfer. All ports have perfect match with infinite return loss and no differential-mode signal transfer,

S

mm

0 =0  − j

0 − j 0 0   0 0 

(5.5)

The standard single-ended s-parameters of the Wilkinson splitter/combiner shown in Figure 5.3, without the differential-mode impedance termination, Zs (see Figure 5.6), are

S

std

 0 = − j 2   − j 2

−j 2 12 −1 2

− j 2 −1 2   1 2 

(5.6)

The single-ended s-parameters associated with transformation between port 1 and the output single-ended ports 2 and 3 (S12, S13, S21, and S31), are not affected by the differential-mode impedance termination. Moreover, (5.6) does not show the need for a differential-mode impedance termination to satisfy single-ended matching of ports 2 and 3, (S22 = 0 and S33 = 0). RF designers find that there are five splitter/combiner performance parameters of interest, balanced loss (α), balanced phase shift (φ), amplitude imbalance (∆), phase imbalance (θ), and desired phase offset (Φ), shown in the flow diagrams of Figures 5.13 and 5.15. Balanced loss (α) is the standard s-parameter forward transfer-loss component that is composed of equal amounts of loss in each of the splitter paths; this is the splitter/combiner loss when the amplitude imbalance is zero. In a similar manner, balanced phase shift (φ), is the forward transfer-phase shift of the splitter/combiner for an imbalance offset and phase offset of zero. Amplitude imbalance (∆) and phase imbalance (θ) are the undesired differences in amplitude and phase between the two splitter/combiner signal paths. This imbalance shows the difference of the real splitter/combiner as compared the ideal splitter/combiner balanced amplitude (α) and phase (θ) values. Desired phase offset (Φ) is the specified


121

design-phase difference between the splitter/combiner multiple single-ended ports. For example, the desired phase offset is zero for a 0° splitter and 180° for a differential splitter/combiner. These performance parameters are not intuitive upon examining standard s-parameter data; they require data post-processing to obtain their values. For example, the balanced loss and phase shift of a power splitter is the ratio of the summed output power (with the desired phase offset) to the input power. Mixed-mode s-parameter, Scs21 and Ssc12 repeat the balanced loss and balanced phase parameters for a 0°−3-dB splitter and combiner component, respectfully. Amplitude and phase imbalance parameters are more complex and are the ratio of standard s-parameter terms S21 and S31 less the desired phase offset (Φ) for a splitter, and ratio of standard s-parameter terms S12 and S13 less the desired phase offset (Φ) for a combiner. The amplitude and phase imbalance parameters are extracted from standard s-parameters and have become manufacturer specifications for splitter/combiner components. Amplitude and phase imbalance degrade system performance and require additional data processing to determine their adverse impact. Splitter/combiner imbalance and RF circuit metrics will be explained in more detail later in this chapter. One example of RF signal processing that is dependent on component balance is the cross-mode conversion between differential and common-mode signals. A differential circuit stimulus is composed of two-unit amplitude opposite phase (Φ = 180°) single-ended signals with no common-mode component, the differential signal has an amplitude of 2. An example imperfect circuit outputs a pure differential-mode signal with 1 dB of magnitude imbalance (∆=10−(1dB/20)) and zero phase imbalance (θ = 0); this output signal has a nonzero commonmode cross-mode component equal to (1−10−(1dB/20)). Assuming a lossless network (α = 1), the mixed-mode signal is comprised of a differential-mode signal equal to the original pure differential-mode signal magnitude and a commonmode signal equal to (1−10−(1dB/20)). For this imbalanced condition, the common-mode signal magnitude is determined to be −25.3 dBc below the differential-mode signal using: 1 − 10 − dB (imbalance ) 20  dBc = 20Log   2  

(5.7)

A similar result is true for an example circuit outputting a pure commonmode (Φ = 0°) signal with 1 dB of magnitude imbalance and no phase imbalance. It is comprised of a common-mode component equal to 1 and a differential-mode component equal to (1−10−(1dB/20)), with a –19.3-dBc amplitude difference between the differential-mode and common-mode signals with the 1-dB imbalance condition determined by using:

122


[

dBc = 20Log 1 − 10 − dB

(imbalance ) 20

]

(5.8)

The normalized impedance difference-mode between differential and common-mode signal environments accounts for the 6-dB difference between the two 1-dB magnitude imbalance cases described above. Normalized differential impedance is 100Ω, a factor of 4 or 6 dB above the 25Ω normalized common-mode impedance. For the same differential-mode and common-mode voltage there is 6-dB higher common-mode power compared to the differential-mode power. Before leaving the Wilkinson splitter/combiner, let’s examine a simple variation on the design shown in Figure 5.6. All of the mixed-mode and standard s-parameter analyses confirm that the Wilkinson splitter/combiner of Figure 5.6 exhibits single-ended to common-mode signal transfer. There is no single-ended to differential-mode signal transfer. So is it possible to modify the Wilkinson splitter/combiner to achieve single-ended to differential-mode conversion with no single-ended to common-mode signal transfer? Change one of the two impedance transformer transmission lines from a positive 90° phase shift to a negative 90° phase shift (see Figure 5.7). A transmission line with a negative phase is possible in theory. However, the physical implementation requires a shunt-L and a series-C distributed-ladder network to approximate a transmission-line design. This negative phase-shift circuit can be implemented as a practical lumped circuit, but is difficult to implement as a coaxial transmission line. Let’s continue to determine if this single-ended mode to differential-mode conversion circuit is useful. The standard s-parameters of the modified network shown in Figure 5.7 are listed in (5.9). The magnitudes of the s-parameter terms are equal to those of the Wilkinson splitter/combiner of Figure 5.3. However, the phases of a number of the standard s-parameters terms are reversed in polarity when compared to (5.6):

Zo =

Z2L* (2*Z1L) = 70.7Ω

Z2L = 50Ω 90°

Z1L = 50Ω

−90°

Z3L = 50Ω Zo =

Z3L* (2*Z1L) = 70.7Ω

Figure 5.7 Transmission-line-impedance transformer splitter/combiner with opposite phase shift on each leg.


S std

 0 = − j 2   j 2

−j 2 12

j

12

2 12   1 2 

123

(5.9)

Equation (5.10) is derived by inserting the s-parameter terms of (5.9) into (5.3). The mixed-mode s-parameters shown in (5.10) assume ideal matching terminations on the single-ended-mode port and the differential-mode port. There is also ideal (lossless) signal transformation between the single-ended and differential-mode inside the device. However, the common-mode port 2 has a maximum-return loss, Scc22 = 1 when connected to an open termination; this is similar to the differential-mode return loss, Sdd22 = 1 of the Wilkinson splitter/combiner in Figure 5.3. This open termination case requires a more complex solution for finding a proper Zs to add to port 2 and port 3 and proved matched common-mode open input impedance without affecting the differential-mode propagation,

S

mm

0 = − j  0

−j 0 0

0 0  1

(5.10)

Defining the open or infinite common-mode-input impedance requires an involved explanation. When two equal signals (common-mode) are applied at the single-ended ports 2 and 3 they are superposed with opposite phase shift into a common port 1 signal. The two input common-mode signals result in equal and opposite output signals at port 1 adding to a composite voltage of zero; also defined as a short circuit. This vector signal annihilation to zero voltage is translated back over the 90° transmission lines to appear as infinite-input impedance or a common-mode open-input impedance at ports 2 and 3. This 90° phase conversion over the transmission lines is the mechanism that produces minimum-return loss in networks of Figure 5.3 (Sdd22 =1) and Figure 5.7 (Scc22 = 1). 1 0  S mm =  , 0 0  for a 100 Ω series resistor and 180° transmission line

(5.11)

Common-mode matching is accomplished by adding a 180° transmission line in series with the resistance, Zs (see Figure 5.8). For this example, the value of Zs necessary to achieve ideal common-mode matching is 100Ω. The common-mode signal on one side of the coupler mixed-mode port is routed through

124


a one-half wavelength to become a differential signal and then applied to a matched differential load of 100Ω. The solution is insensitive to the impedance of the one-half-wavelength transmission line. The one-port mixed-mode s-parameters of the series connected 180° transmission line and the Zs of 100Ω has a minimum differential-mode return loss, Sd =1 and a maximum common-mode return loss, Sc = 0, see (5.11). The network of Figure 5.8 provides a common-mode match and a differential-mode open, the circuit is the dual of a resistor without the 180° transmission line in Figure 5.6.

S

std

 0 = − j 2   j 2

−j

2 0 0

j

2 0   0 

(5.12)

The standard s-parameters of the differential-mode splitter/combiner of Figure 5.8 are shown in (5.12). They are similar to the standard s-parameters of the common-mode splitter/combiner of Figure 5.3 and (5.4) with the exception of the single-ended port 1 to port 3 forward and reverse transmission-phase terms (s 31 = j 2 and (s 13 = j 2 . Equation (5.13) shows the mixed-mode s-parameters with matched ports and ideal forward single-ended mode and reverse mixed-mode transmission parameters S sd 12 = − j and S ds 21 = − j .

)

)

Z0 =

Z2L* (2*Z1L) = 70.7Ω

Z2L = 50Ω 90 deg

Z1L = 50Ω

Zs −90 deg

Z3L = 50Ω Z0 =

Z3L* (2*Z1L) = 70.7Ω

90 deg 90 deg

Figure 5.8 Transmission-line-impedance transformer splitter/combiner with opposite phase shift transmission line and common-mode matching.


S

mm

0 = − j  0

−j 0 0

125

0 0  0

(5.13)

The networks of Figures 5.3 and 5.7 are Wilkinson common-mode and differential-mode splitter/combiner components implemented with transmission-line-impedance transformers. A negative phase shift circuit is needed for the differential-mode splitter/combiner and is not realizable as a distributed circuit. However, a lumped implementation is practical for both the positive and negative phase-shift impedance transformers. All of the s-parameter matrix values shown in all of the above equations are at a frequency where the transmission lines have exactly 90° of phase shift. Unfortunately, transmission line wavelengths and phase delays vary linearly with frequency. In practice, this means that the splitter/combiner s-parameters shown are valid at or very near a center frequency and the transmission line splitter/combiner component has a narrow frequency bandwidth. Transformer-circuit-based splitter/combiner components have a wider performance bandwidth and will be discussed in terms of mixed-mode s-parameters in a later section of this chapter.

5.5 Mixed-Mode Splitter/Combiner S

mm

MS std M

1

This section focuses on the development of a general purpose set of splitter/combiner matrix relationships. In the next section, a practical set of splitter/combiner specifications with an arbitrary phase offset term (Φ) are developed from these relationships. CMRR will be evaluated as a better amplitude/phase imbalance parameter metric for splitter/combiner components. Three additional parameters will also be introduced to represent the complete array of splitter/combiner specifications. These are the differential-mode-rejection ratio (DMRR), the response of differential-mode (RDM), and the response common-mode (RCM). Where DMRR is the inverse of CMRR and both qualities represent the rejection of an undesired mode component within a splitter/combiner. In addition, RDM and RCM represent the response of the differential or common mixed-mode signal applied to a combiner input. The analysis begins by examining Figure 5.9 which shows a single-ended standard s-parameter flow diagram and establishes splitter/combiner port definitions. In Figure 5.9, port 1 is defined as the single-ended input or output, and the combination of single-ended ports 2 and 3 are defined as the mixed-mode port 2 input or output. The connections between the three single-ended ports define a basic RF signal transfer; single-ended signals are converted to and from a mixed-mode signal. This splitter or combiner circuit and is modeled with

126


three single-ended port standard s-parameters shown in Figure 5.9 or with a hybrid single-ended/mixed-mode s-parameter flow diagram shown in Figure 5.10. Signal-flow diagrams are not a physically based representation of the component, but are a model representation of the signal flow into and out of each port and between ports. In these diagrams, ax and bx represent the input power wave into and out of each single-ended port x. In addition, s-parameter, Syz is the signal-transfer ratio of output power wave by to input power wave az with all other input power waves equal to zero. The s-parameter definition implies only one single-ended port is stimulated with a source and the output ports are terminated in characteristic impedances. Each port x is sequentially stimulated with a single-ended-power wave, ax while single-ended-output and reflection power waves, b1, b2, and b3 are measured at each three single-ended ports. For example in Figure 5.9, a single-ended power wave a1 stimulating port 1 would provide a measurement of reflection s-parameter, S11, and signal transfer s-parameters, S21 and S31, as defined by the s-parameter relationships, S 11 = b 1 a 1

(5.14)

a2 = a3 = 0

b2

Port 2

S21 S22 a2 a1 S12

S23 S32

S11

Port 1

S31 b1 b3 S13 S33

Port 3

a3

Figure 5.9 Splitter/combiner standard single-ended three-port s-parameter flow diagram. Single-ended port 2 and port 3 combine as mixed-mode port 2.


127

bd Sdd22

Sds21

ad as Ssd12 single-ended Port 1

Sss11 bs

Scs21

Scd22

Sdc22

mixed-mode Port 2

bc

Ssc12 Scc22 ac

Figure 5.10 Splitter/combiner mixed-mode two-port s-parameter flow diagram.

S 21 = b 2 a 1 S 31 = b 3 a 1

a2 = a3 = 0

a2 = a3 = 0

(5.15) (5.16)

This measurement continues with stimulus a2 and b2 on ports 2 and 3 filling out the 3 × 3 matrix of single-ended standard s-parameters. Equation (5.17) shows the relationships needed to build the splitter/combiner mixed-mode s-parameter matrix from the standard signal-ended set of s-parameter terms. S mm =

  S ss 11 = 2S 11 S sd 12 = 2(S 12 − S 13 ) S sc 12 = 2(S 12 + S 13 ) 1  S ds 21 = 2(S 21 − S 31 ) S dd 22 = S 22 − S 23 − S 32 + S 33 S dc 22 = S 22 + S 23 − S 32 − S 33   2 S cs 21 = 2(S 21 + S 31 ) S cd 22 = S 22 − S 23 + S 32 − S 33 S cc 22 = S 22 + S 23 + S 32 + S 33   

(5.17)

The splitter/combiner mixed-mode s-parameter flow diagram will be introduced. Then, the standard s-parameter transformation to mixed-mode s-parameters for a splitter/combiner circuit and the inverse mixed-mode to standard s-parameter transformation will be derived in detail. The splitter/combiner mixed-mode s-parameter flow diagram shown in Figure 5.10 is composed of a hybrid set of s-parameters. There is one pure single-ended s-parameter, Sss11 and two pure mixed-mode s-parameters, Sdd22 and Scc22 and six cross-mode s-parameters. The cross-mode s-parameters include two single-ended to mixed-mode s-parameter cross-mode terms, Sds21 and Scs21 two mixed-mode to single-ended s-parameter cross-mode terms, Ssd12 and Ssc12 and two mixed-mode to mixed-mode s-parameter cross-mode terms, Scd22 and Sdc22. The resulting mixed-mode s-parameter matrix format is shown in Figure 5.4.

128


S-parameter term, Sss11, is a single-ended s-parameter term equal to the S11 term in (5.14) with power wave, a1 replaced by as and power wave b1 replaced by bs (see Figure 5.10). The mixed-mode-power waves are built from the single-ended s-parameters using the definitions of differential-mode and common-mode signals. The differential-mode power-wave input signal is defined with single-ended power-wave terms, a2 and a3 using, a d = (a 2 − a 3 )

(5.18)

2

The common-mode power-wave input signal is defined by single-ended power-wave terms, a2 and a3, in a c = (a 2 + a 3 )

(5.19)

2

From these mixed-mode input power-wave definitions, a splitter/combiner transformation matrix, Msc is defined, beginning with the construction of the mixed-mode input and output power waves from the standard input and output power-wave terms.

[a

mm

 as ] = a d  ac

 2 0 0  a 1    = 1  0 1 −1 a  = [M ][a std ] sc  2   2  0 1 1  a 3  

(5.20)

The input single-ended power-wave term is as, and the mixed-mode input power-wave terms are ad and ac. A similar procedure is used to develop a transformation matrix for output mixed-mode power waves in output single-ended output power-wave terms, bx.

[b

mm

b s ] = b d b c

 2 0 0  b 1    = 1  0 1 −1 b  = [M ][b std ] sc  2   2 0 1 1 b      3  

(5.21)

The standard single-ended 3 × 3 s-parameter matrix relationship is

[b

std

b 1  S 11 ] = b 2  = S 21 b 3  S 31

S 12 S 22 S 32

S 13  a 1  S 23  a 2  = S yzstd   S 33  a 3 

[ ][a ] std

(5.22)


129

Replacing the standard-power-wave matrix in (5.22) with (5.20) and using (5.21) results in

[b ] = [M ] [b ] = [S ][M ] [a ] = [S ][a ] −1

std

mm

−1

std yz

sc

mm

sc

std yz

std

(5.23)

Equation (5.23) reduces to a mixed-mode s-parameter relationship in terms of standard s-parameters,

[b ] = [M ][S ][M ] [a ] mm

−1

std yz

sc

mm

sc

(5.24)

The splitter/combiner mixed-mode s-parameter matrix, S mm is derived in single-ended s-parameter terms in (5.25).

[S ] = [M ][S ][M ] mm

std yz

sc

−1

sc

(5.25)

Solving for standard s-parameters in terms of mixed-mode s-parameters results in

[S ] = [M ] [S ][M ] std yz

−1

mm

sc

sc

(5.26)

Equation (5.26)’s left-most term is expanded into the matrix of standard s-parameters in terms of the mixed-mode s-parameters, 

[S stdyz ] = 12 

2S ss 11

2(S ds 21 − S cs 21 )

2(S sd 12 + S cs 12 ) S dd 22 + S cd 22 + S dc 22 + S cc 22

 2( −S ds 21 + S cs 21 ) −S dd 22 + S cd 22 − S dc 22 + S cc 22

 2( −S sd 12 + S sc 12 )  −S dc 22 − S cd 22 + S dc 22 + S cc 22 (5.27) S dd 22 − S cd 22 − S dc 22 + S cc 22 

The accuracy of the output of these matrix transformations is limited by the measurement accuracy of the standard s-parameters terms being processed. For example, any of the matrix parameters expected to have a value of zero such as Sdc22 or S23 as a result of adding of two or more nonzero measured standard s-parameters, is subject to the measurement accuracy limits of the terms used in this addition. Calibration error, equipment accuracy, and measurement repeatability creeps in and limits typical s-parameter measurement accuracy. These errors can create inaccuracies in mixed-mode s-parameter cross-mode terms that are derived from canceling standard s-parameter terms. These accuracy conditions can be applied to all other small-signal transformation operations such as conversion of s-parameters to y-, z-, ABCD-, T-, indefinite, or hybrid parameters.

130


5.6 Splitter General-Purpose Analysis/Specifications This section develops an improved insight into the RF signal processing of a splitter current and the associated mixed-mode s-parameter relationships. A transfer flow diagram is used to isolate and define the balance specification parameters of the splitter. The results will be expanded into the splitter CMRR and DMRR. This is demonstrated in Figures 5.12 and 5.13. These results will be summarized and applied to the combiner circuit. The signal processing accuracy in RF circuits is dependent on the balance of the single-ended signals that are used to build a mixed-mode output. In communication receivers, direct conversion of RF signals to baseband frequencies is accomplished with balanced image-rejection-frequency converters (mixers). This frequency conversion requires a set of four single-ended signals called a balanced or differential-quadrature local oscillator signal set. A well-designed receiver rejects the image (Ri) [see (5.60)] and harmonic distortion signals. Among the many ways of generating this quadrature signal set from a single single-ended signal, is with a 90° splitter followed by a pair of 180° splitters. The accuracy of the phase and amplitude values of this quadrature signal-set circuit limits the direct-conversion-receiver-undesired-signal rejection. The splitter performance parameters associated with the single-ended output signal’s accuracy are the phase balance and the amplitude balance. For a differential signal processing system, perfect balance results in zero cross-mode terms. For nonzero cross-mode terms, some of the differential signal power is converted to common-mode power, or the reverse process where some of the common-mode signal power is converted to differential-mode signal power. A splitter power-signal flow diagram is shown in Figure 5.11; the flow diagram neglects port mismatch and the output-to-output signal path. As compared to Figure 5.6, the flow diagram of Figure 5.11 neglects single-ended s-parameters terms, S11, S22, S33, S32, and S23. As compared to Figure 5.10, the flow diagram neglects mixed-mode s-parameter terms, Sss11, Sdd22, Scc22, Sdc22, and Scd22. This flow diagram includes the amplitude imbalance (∆), the phase imbalance (θ), the balanced loss (α), the balanced phase shift (φ), and the desired phase transformation value (Φ). Ideal (perfect) splitter balance would have both amplitude imbalance (∆) and phase imbalance (θ) both equal to zero. The normalized single-ended output power waves of the splitter are ideally of equal magnitude with phase offset (Φ), b d = (b 1 − b 2 ) bd =

αi αe jφ 2

[((1± ∆ 2 )e

± j (θ 2+ Φ 2)

(5.28)

2

) − ((1m ∆ 2 )e

m (θ 2+ Φ 2)

)] (5.29)

Power Splitter and Combiner Analysis ±

α(1

131 ∆/2)ej(φ

θ/2

Φ/2)

b1

1/ 2 ai

b2 α(1 ± ∆/2)e

j(φ ± θ/2 ± Φ/2)

Figure 5.11 Splitter power signal transfer-flow diagram.

10 CMRRdb = 21.16 dB

CMRRdb = 24.806 dB

θ degrees

5

CMRRdb = 41.18 dB 0

−5

−10 −2

−1

0

1

((1−∆/2)/(1+∆/2)) dB

Figure 5.12 CMRR, magnitude, and phase imbalance for a 180° splitter.

2

Microwave Differential Circuit Design Using Mixed-Mode S-Parameters α(1

±

132

∆/2)ej(φ

θ/2

Φ/2)

b2

1/ 2 a1

b3 α(1 ± ∆/2)e

j(φ ± θ/2 ± Φ/2)

Figure 5.13 Splitter power signal transfer-flow diagram with input and output power waves.

The magnitude (∆) and phase (θ) imbalance of the separate vector components (b1 and b2) are defined with opposite sign terms. The composite differential output (Φ = 180°) term bd is constant for all values of magnitude imbalance and zero phase imbalance. For the differential splitter/combiner (Φ = 180°) any nonzero value of magnitude and phase imbalance generates a common-mode output signal bc, (see Figure 5.14’s plots). This bd output result can be normalized relative to either of the two wave outputs b1 or b2. Normalizing relative to b2 gives αi α(1 ± ∆ 2 )e j ( φ ± θ 2 ± Φ 2 )   (1 m ∆ 2 ) m j ( θ + Φ )    bd = e 1 −  2 1 2 ± ∆ ( )   

(5.30)

Setting the imbalance errors, ∆ and θ, equal to zero as a check on this computation results in the expected differential-mode wave,  e ± jΦ b d = αi αe jφ  

2

− e m jΦ 2  jφ  = αi αe (± j sin (Φ 2 ) ) 2 

(5.31)

The differential output signal bd is the input signal amplitude scaled (α) and phase shifted (φ). It is a version of the original single-ended input signal aj. Setting Φ equal to 180°, 90°, and 0° in (5.31) gives b d = αi αe jφ ( j ), = αi αe jφ ( j

)

2 , and = αi αe jφ (0 ) = 0

(5.32)

Maximum differential-mode signal transfer occurs for a Φ = 180° splitter circuit and minimum or zero differential-mode transfer occurs for a Φ = 0° splitter circuit. The magnitude of the differential-mode wave, bd, is directly


133

0.5

(∆) amplitude imbalance

0.4 0.3 0.2 0.1 θ = 10 degrees phase imbalance

0 −0.1 −0.2 −0.3 −0.4 −0.5 0.9961

0.9962

0.9962

0.9963

0.9963

0.9964

0.9964

(bd) for Φ = 180 degrees

(θ) phase imbalance radians

4 3 2 1 ∆=0 amplitude imbalance

0 −1 −2 −3 −4

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1

(bd) for Φ = 180 degrees or π/2 radians

Figure 5.14 Plots of amplitude and phase-imbalance response from splitter power signal transfer flow of Figure 5.13.

related to the magnitude imbalance term, ∆ as seen in (5.30). The phase imbalance has a secondary impact on the differential-mode wave, bd, and is approximated by the factor cos(θ/2) (assuming ∆ = 0). This procedure is applied to the common-mode signal power wave with the following results shown in (5.33). For the case with phase-offset term (Φ) equal to zero, the common-mode output term is constant and independent of the amplitude imbalance (∆) and with zero phase imbalance (θ) (see Figure 5.15’s plots). bc = (b1 + b2 )

2 =

αi αe jφ 2

[((1 ± ∆ 2)e

± j ( θ 2+ Φ 2)

) + ((1 m ∆ 2)e

m j ( θ 2+ Φ 2)

)]

(5.33)

134

Microwave Differential Circuit Design Using Mixed-Mode S-Parameters 0.5 0.4

(∆) amplitude imbalance

0.3 0.2 0.1 θ = 10 degrees phase imbalance

0 −0.1 −0.2 −0.3 −0.4 −0.5 0.08

0.1

0.12 0.14 0.16

0.18

0.2

0.22 0.24

0.26 0.28

(bd) for Φ = 180 degrees 4

(θ) phase imbalance radians

3 2 1 ∆=0 amplitude imbalance

0 −1 −2 −3 −4

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1

(bd) for Φ = 180 degrees or π/2 radians

Figure 5.15 Splitter power signal transfer-flow diagram with input and output power waves and amplitude and phase imbalance.

Normalizing again with respect to b1 has a similar result as in (5.30): αi α(1 ± ∆ 2 )e j ( φ ± θ 2 ± Φ 2 )   (1 m ∆ 2 ) m j ( θ + Φ )    bc = e 1 +  2 1 2 ± ∆ ( )   

(5.34)

Setting the imbalance errors, ∆ and θ equal to zero as a check of the calculation, results in the expected common-mode wave,


e ± j Φ 2 + e m j Φ 2  jφ b c = αi αe jφ   = αi αe (± cos(Φ 2 ) ) 2  

135

(5.35)

Setting Φ equal to 180°, 90°, and 0° in (5.36) yields b c = αi αe jφ (0 ) = 0, = αi αe jφ (1

)

2 , and = αi αe jφ (1)

(5.36)

Maximum common-mode transfer occurs for the Φ = 0° splitter circuit and minimum or zero common-mode transfer occurs for the Φ = 180° splitter circuit. The magnitude of the common-mode wave, bc is directly related to the magnitude imbalance term, ∆ in (5.34). The phase imbalance has a secondary impact on the common-mode wave, bc and is approximated by the factor cos(θ/2) (assuming ∆ = 0). For 90° splitter function, the magnitudes of the differential-mode and common-mode transfer waves, bd and bc are equal to half the input ai magnitude less the balanced transfer loss (or gain) term, α. Thus, a 90° splitter circuit divides a single-ended signal, ai into two equal mixed-mode waves, bd, a differential-mode power wave, and bc, a common-mode power wave. In the case of a 180° splitter circuit, the common-mode wave, bc can be considered an unintended signal generated at the output, and its magnitude is directly proportional to magnitude imbalance (∆) of the splitter. The phase imbalance (θ) has a second-order effect on the magnitude of the unintended output common-mode signal, bc. Common-mode-rejection ratio can be adapted as a measure of the imbalance in a 180° splitter circuit. CMRR can be applied to normalized power waves by the definition in (5.37). CMRR is defined for analog circuits in [2]: CMRR =

bd bc

(5.37)

For a splitter-phase shift Φ equal to 180° (180° splitter circuit), CMRR as a function of amplitude and phase-imbalance terms becomes   (1 − ∆ 1 +    (1 + ∆ CMRR =   (1 − ∆ 1 −    (1 + ∆

2)

 e − jθ   2)  2 ) − jθ   e  2) 

(5.38)

136


As a calculation check, the imbalance errors, ∆ and θ are set to zero, resulting in a CMRR equal to infinity since the (5.38) denominator equals to zero, [common-mode wave, bc equals zero in (5.37)]. As the imbalance term magnitudes, ∆ and θ increase from zero, the graph of the CMRR is represented by an ellipse with increasing area from a center point where the CMRR magnitude is infinity (see Figure 5.12). An alternative imbalance metric using single-ended s-parameters can be stated in separate terms of magnitude and phase ratios. 1 − ∆ 2  b   = 20Log 1 , θ deg or 1 + ∆ 2  dB b2

rad

 imag (b1 ) imag (b2 ) − tan −1 =  tan −1  −Φ real (b1 ) real (b2 )  

(5.39)

These imbalance ratios are represented on a graph as a rectangle or square with zero imbalance error at the center point, see Figure 5.12. CMRR is a metric that is easily determined from mixed-mode s-parameters. Magnitude and phase imbalance are directly determined from standard s-parameters. However, CMRR is a measurement metric that better represents the imbalance which generates common-mode signals in a 180° splitter circuit. In the case of a 0° splitter circuit, the differential-mode wave, bd can be considered an unintended signal, and its magnitude is directly proportional to magnitude imbalance (∆) of the splitter. Similar to the 180° splitter circuit, the phase imbalance (θ) has a second-order effect on the magnitude of the output differential-mode signal, bd. For the 0° splitter, the differential-mode-rejection ratio can be adapted as a measure of the imbalance. DMRR is defined by the normalized power-wave relationship: DMRR =

b 1 = c CMRR b d

(5.40)

For a splitter phase shift, Φ = 0° (0° splitter), DMRR becomes   (1 − ∆ 1 −    (1 + ∆ DMRR =   (1 − ∆ 1 +    (1 + ∆

2)

 e − jθ   2)  2 ) − jθ   e  2) 

(5.41)

DMRR for a 0° splitter circuit is similar to CMRR for a 180° splitter circuit and is represented by the same plot and values as those shown in Figure 5.12 (with CMRR replaced with DMRR in the figure notations). Using the following relationships in (5.42), CMRR and DMRR can be determined from measured single-ended s-parameters,


bd 1 = (S 1i − S 2i ) ai 2 b 1 Sc = c = (S 1i + S 2i ) ai 2

137

Sd =

(5.42)

Solving for CMRR in terms of measured single-ended s-parameters yields CMRR =

Sd S − S 2i = 1i Sc S 1i + S 2i

(5.43)

The flow diagram of Figure 5.11 can be redefined to conform to the matrix organization of Figure 5.4 with the results shown in 5.13. With the mixed-mode port definitions of Figure 5.4, the mixed-mode s-parameters are bd 1 = (S 21 − S 31 ) ai 2 b 1 = c = (S 21 + S 31 ) ai 2

S ds 21 = S cs 21

(5.44)

Solving for CMRR in mixed-mode s-parameter terms with measured single-ended s-parameters of Figure 5.4 gives CMRR =

S 21 − S 31 S ds 21 = S cs 21 S 21 + S 31

(5.45)

CMRR, DMRR, magnitude imbalance, and phase imbalance are all determined from standard single-ended s-parameters; they can be used to define the quality of a splitter component. Magnitude and phase imbalance are specification terms that require additional analysis to interpret their impact on RF splitter-circuit performance. However, CMRR and DMRR are a direct measure of the splitter circuit transfer function; the authors find that they are a more intuitive figure of merit than magnitude and phase imbalance.

5.7 Combiner General-Purpose Analysis/Specifications Analysis of a combiner circuit begins like the prior analysis of a splitter circuit, with a general flow diagram (see Figure 5.16) that defines the specification parameters using mixed-mode s-parameters. The combiner takes inputs at two

138

Microwave Differential Circuit Design Using Mixed-Mode S-Parameters (1

∆/2)e

j(φ+θ/2+Φ/2)

a1 ideal case output 1/ 2 bo

a2 (1

∆/2)e

j(φ+θ/2+Φ/2)

Figure 5.16 Combiner signal-ended power signal transfer-flow diagram.

ports and combines them at an arbitrary phase at an output port. This combiner general flow diagram has an arbitrary phase transfer value of 180°, 90°, or 0° between the two combiner input ports. The combiner performance parameter of interest is a composite measure of the phase and amplitude imbalance between the mixed-mode input signals and the single-ended output signal, bo. A 180° combiner outputs the difference of the two single-ended input signals, a1 and a2, while a 0° combiner sums the two single-ended input signals. The differential-mode input wave is defined as the difference of the two singleended input signals. a d = (a 1 − a 2 )

2

(5.46)

The common-mode input wave is defined as the sum of the two single-ended input signals, a c = (a 1 + a 2 )

2

(5.47)

The single-ended input signals, a1 and a2, are solved in terms of the mixed-mode input waves, a 1 = (a c + a d

)

2

(5.48)

a 2 = (a c − a d

)

2

(5.49)

and

A combiner power-signal flow diagram is shown in Figure 5.16; the diagram omits input-to-input signal path and output mismatch. These


139

simplifications assume single-ended s-parameter terms, S12, S21, and S33, or mixed-mode s-parameter terms, Sdc11, Scd11, and Sss22 are not considered in the power flow diagram of Figure 5.16. The amplitude imbalance (∆), phase imbalance (θ), balanced loss (α), balanced phase shift (φ), and a specified phase transformation value (Φ) are included in this flow diagram. Ideally, the normalized mixed-mode input power waves of the combiner are of equal magnitude with phase offset of (Φ). Solving for the output power wave, bo in terms of the input mixed-mode power waves results in b0 =

αe j ( φ − θ 2 − Φ 2 ) 2

[(1+ ∆ 2 )(a

c

+ a d ) + (1 − ∆ 2 )(a c − a d )e − j

( θ+ Φ )

] (5.50)

Equation (5.50) becomes (5.51) when the imbalance errors ∆ and θ are set to zero or the combiner is balanced: b0

αe j ( φ − Φ 2 ) 2

[(a

c

+ a d ) + (a c − a d )e − j

A check on this calculation with b 0 = αe j

(φ)

a c , = αe j

(φ)

(φ)

]

(5.51)

set to 0°, 90°, and 180° results in

 (1 − j ) 2 a c + ad  (1 + j )

 j (φ) a d (5.52) , and = αe 

The 0° combiner completely rejects undesired differential-mode input ad, and the 180° combiner rejects common-mode input ac, when the combiners have zero magnitude and phase imbalance terms. None of the undesired mixed-mode wave input is transferred to the output single-ended wave bo. Designers need new parameters to define the transfer function signal rejection. For a 180° combiner, the transfer parameter of interest is the common-mode response (RCM), and for a 0° combiner the transfer parameter of interest is the differential-mode response (RDM). RCM =

RDM =

b0 ac b0 ad

[

]

[

]

= (1 ± ∆ 2 )e ± j ( θ 2 + Φ 2 ) + (1 m ∆ 2 )e m j ( θ 2 + Φ 2 ) (5.53) ad = 0

= (1 ± ∆ 2 )e ± j ( θ 2 + Φ 2 ) − (1 m ∆ 2 )e m j ( θ 2 + Φ 2 ) (5.54) ac = 0

140


To express RCM and RDM in terms of mixed-mode s-parameters, Figure 5.17 redefines the s-parameter flow diagram to conform to the port conventions of Figure 5.4. Equations (5.55) and (5.56) show the RCM and RDM in terms of the reverse mixed-mode to single-ended s-parameters, Ssc12 and Ssd12, shown in Figure 5.4. RCM =

RDM =

b1 ac

ad = 0 = a1

b1 ad

ac = 0 = a1

= S sc 12 =

2 (S 12 + S 13 )

(5.55)

= S sd 12 =

2 (S 12 − S 13 )

(5.56)

The ratios of the two terms, RRCM and RRDM, are similar to CMRR and its inverse parameter, DMRR used to define splitter performance. For a linear and reciprocal splitter/combiner, the RRCM and CMRR performance parameters are equal. S 12 − S 13 S sd 12 = S sc 12 S 12 + S 13

(5.57)

S 12 + S 13 S sc 12 1 = = S sd 12 S 12 − S 13 RRCM

(5.58)

RRCM =

RRDM =

(1

∆/2)e

j(φ+θ/2+Φ/2)

a2

αejφ/ 2

b1

a3 (1± ∆/2)e±j(φ+θ/2+Φ/2)

Figure 5.17 Combiner power signal transfer-flow diagram with input and output power waves.


141

The combiner is a mixed-mode to single-ended signal transfer circuit with three primary phase-shift variations (Φ), 0°, 90°, or 180°. A splitter is a single-ended to mixed-mode transformation component with three primary phase-shift variations (Φ), 0°, 90°, and 180°. A 0° splitter will ideally have zero differential-mode output response (DMR) and a 0° combiner will have zero output response to differential-mode input (RDM). A 180° phase shift splitter would ideally have zero CMR and a 180° phase shift combiner would have zero RCM. A splitter or combiner with a phase shift of 90°, ideally, would have equal DMR and CMR and also have equal RDM and RCM. These splitter/combiner ideal performance values are shown in Figure 5.18 along with the phase shift relationships for a nonideal mixed-mode splitter/combiner circuit with magnitude imbalance ∆ and phase θ imbalance.

5.8 Hybrid Splitter/Combiner and Mixed-Mode S-Parameters The hybrid splitter/combiner is a four-port fundamental building block of RF signal processing. In one popular application, hybrids are used in image-balanced mixers to obtain image rejection while down-converting signals in frequency. There are two basic types of hybrid splitter/combiner circuits: (1) quadrature, and (2) sum/difference or sigma/delta; each type has an extensive variety of microwave circuit, transformer circuit, and lumped-component circuit implementations. This section will review the ideal standard s-parameters for both hybrid types and then develop the analyses for hybrid circuit mixed-mode s-parameters. Figure 5.19 displays the symbol of a sigma/delta hybrid and the associated s-parameters for standard and mixed-mode formats. The sigma/delta hybrid is composed of two splitter/combiner components, a 0° circuit and a 180° circuit. There are separate single-ended ports, 1 and 2, for the 0° circuit and 180° circuit. A common mixed-mode port is shared by each of the splitter/combiner circuits. The mixed-mode port is comprised of single-ended ports 3 and 4 and is defined as port 5 to differentiate it from the four single-ended ports 1 through 4. Single-ended ports 1, 2, and 3 produce the 0° response, while single-ended port, 4 gives the 180° response. Single-ended port 1 is the sum of the waves into single-ended ports 3 and 4, and single-ended port 2 gives the difference of the waves into single-ended ports 3 and 4. Ideally a differential wave applied to mixed-mode port 5 is entirely transformed to an output at single-ended port 2, and a common-mode wave applied to mixed-mode port 5 is entirely transformed to an output at single-ended port 1. In general terms, any mixed-mode signal applied to port 5 will have its differential-component transferred to single-ended port 2 and its common-mode component transferred to single-ended port 1. Ideally, a sigma/delta hybrid represents the physical separating of a

0

j [(1±∆/2)e±j(θ/2)−(1ⴟ∆/2)eⴟj(θ/2)] 2

180°

1

1/ 2

1

j [(1±∆/2)e±j(θ/2)+(1ⴟ∆/2)eⴟj(θ/2)] 2

0

θ=0 ∆=0

1 [(1±∆/2)e±j(θ/2)(1+j)−(1ⴟ∆/2)eⴟj(θ/2)(1−j)] 2 2

1 [(1±∆/2)e±j(θ/2)−(1±∆/2)e ⴟ j(θ/2)] 2

1 [(1±∆/2)e±j(θ/2+Φ/2)−(1ⴟ∆/2)e ⴟ j(θ/2+Φ/2)] 2

c

DMR = bd/a1|a =0=a =Sds21= 2(S21+S31) c c RDM = b1/ad|a =0=a = Ssd12 = 2(S12+S13)

∞

1

0

CMRR = DMR/CMR RRCM = RDM/RCM

CMRR = Sds21/Scs21 RRCM = Ssd12/Ssc12

Figure 5.18 Summary of splitter/combiner parameters using mixed-mode s-parameters, as a function of desired phase-shift parameter ( ).

1/ 2

1

θ=0 ∆=0

1 [(1±∆/2)e±j(θ/2)(1+j)+(1ⴟ∆/2)eⴟj(θ/2)(1−j)] 2 2

1 [(1±∆/2)e±j(θ/2+(1±∆/2)e±j(θ/2] 2

1 [(1±∆/2)e±j(θ/2+Φ/2)+(1ⴟ∆/2)e±j(θ/2+Φ/2)] 2

1

90°

0°

Φ

d

CMR = bc/a1|a =0=a =Scs21= 2(S21+S31) d c RCM = b1/ac|a =0=a = Ssc12 = 2(S12+S13)

142 Microwave Differential Circuit Design Using Mixed-Mode S-Parameters

Power Splitter and Combiner Analysis S11 S12 S13 S14

3

=

1/

S = S 32

√2

S std Σ∆ = 13

=

S21 S22 S23 S24 S31 S32 S33 S34

=

1 2

0

0

1

1

0

0

1

−1

1

1

0

0

0

0

1 −1

S41 S42 S43 S44

√2

31

1/

S

0°

=

0°

23

S

143

0°

2

− 1/

S = S 41

√2

isolated

1

=

180°

1/

=

=

24

14

Sss11 Sss12 Ssd15 Ssc15

S

√2

42

S

mm

S Σ∆ =

4

Sss21 Sss22 Ssd25 Ssc25 Sds51 Sds52 Sdd55 Sdc55

0 0 0 1 =

Scs51 Scs52 Scd55 Scc55

0 0 1 0 0 1 0 0 1 0 0 0

Figure 5.19 Sum/difference or sigma/delta hybrid symbol and s-parameters.

mixed-mode signal into its differential-mode and common-mode components; these components are output at single-ended ports 2 and 1. The reverse signal combining is also true, in which a combination of single-ended signals at port 1 and port 2 produce a mixed-mode signal combination across single-ended ports 3 and 4. A hybrid component realizes the general hardware implementation of single-ended to mixed-mode conversion and the reverse mixed-mode to single-ended conversion. Ideally single-ended ports 1 and 2 are isolated, meaning there is no signal transfer between these single-ended ports. If only one of the two splitter/combiners is used in an application, the unused single-ended port 1 or 2 is defined as the isolated port. The mixed-mode single-ended ports are also ideally isolated resulting in zero cross-mode generation or zero magnitude, Sdc55 and Scd55. The mixed-mode s-parameters of a sigma/delta hybrid component can be simplified into four sets of 2 × 2 parameters. These four sets of s-parameters represent two-port single-ended ports 1 and 2, (Sss), single-ended input to mixed-mode output (Sms), mixed-mode input to single-end output (Ssm), and one-port mixed-mode s-parameters (Smm),  S ss S Σmm D =  S ms

S sm  mm = S 90 ° S mm 

(5.59)

This set of four 2 × 2 mixed-mode s-parameters is applied to the quadrature hybrid component shown in Figure 5.20. For both hybrid components (0° and 180°), all single-ended ports are matched with single-ended impedance of

144


S11 S12 S13 S14

3

S std 90° = =

j/√

2

S = S 32

13

=

2

S41 S42 S43 S44

31

isolated

0

0

1

−j

−j

1

0

0

1 −j

0

0

1

2

−90°

=

−

S = S 41

0°

j/√

2

1

S31 S32 S33 S34

1

=

0 −j

√2 1/

S

0°

=

90°

23

S

S21 S22 S23 S24

0

√ 1/

=

=

24

14

Sss11Sss12 Ssd15 Ssc15

S

Sss21 Sss22 Ssd25 Ssc25

2

42

S

mm

S 90° =

1

0 −(1+j)(1−j)

0

0

(1+j) (1−j)

Sds51 Sds52 Sdd55 Sdc55

2 −(1+j) (1+j)

0

0

Scs51Scs52 Scd55 Scc55

(1−j) (1−j)

0

0

4

Figure 5.20 Quadrature hybrid s-parameters.

=

0

symbol,

standard

s-parameters,

and

mixed-mode

50Ω, shown with zero single-ended s-parameters terms S11, S22, S33, and S44. Also, both hybrids have equal signals applied to single-ended ports 1 and 2 which are split and transferred to single-ended ports 3 and 4 with a phase shift (Φ). Where the phase shift (Φ), is defined as a phase offset between single-ended ports 3 and 4. A hybrid transformation matrix, MH is an extension of the splitter/ combiner transformation matrix, Msc developed for the conversion of standard s-parameters to mixed-mode s-parameters. The results of the transformation matrix are shown in Figure 5.21. Each of the splitter/combiners within a hybrid circuit are subject to the same signal quality performance specifications of magnitude (∆) and phase (θ) imbalance defined in earlier sections. Balanced loss (α), phase shift (φ), and mixed-mode CMRR are also separate performance parameters of each splitter/ combiner within a hybrid circuit.

5.9 Transformer Sigma/Delta Hybrid Implementation There are a number of sigma/delta hybrid component implementations from very high-frequency microwave designs to lumped-component networks. Transmission-line transformers can implement a sigma/delta hybrid with very wide bandwidth and provide a good practical mixed-mode analysis example. A transmission-line transformer uses a distributed combination of inductive (magnetic) and capacitive coupling. This combination of coupling mechanisms overcomes the low-frequency limitations of ferrite materials used to enhance the magnetic coupling of inductive transformers.

std

H

−1

 S ss 11 = 2S 11 S ss 12 = 2S 12 S sd =  S ss 21 = 2S 21 S ss 22 = 2S 22 S sd 25 = 1 =  2 S ds 51 = 2 (S 31 − S 41 ) S ds 52 = 2 (S 32 − S 42 ) S dd 55 = S 33   S cs 51 = 2 (S 31 + S 41 ) S cs 52 = 2 (S 32 + S 42 ) S cd 55 = S 33

H

− S 34 + S 43 − S 44

− S 34 − S 43 + S 44

) 2 (S 23 − S 24 )

2 (S 13 − S 14

Figure 5.21 Hybrid standard s-parameters transformed to hybrid mixed-mode s-parameters.

mm 90 °

[S ] = [M ][S ][M ]

)

  S sc 25 = 2 (S 23 + S 24 )  S dc 55 = S 33 + S 34 − S 43 = S 44   S cc 55 = S 33 + S 34 + S 43 + S 44 

S sc 15 2 (S 13 + S 14

Power Splitter and Combiner Analysis 145

146


Distributed transmission-line elements are implemented with the use of filar wire. Filar wire is an arrangement of two or more wires constructed with a fixed insulation thickness between conductors. This provides a fixed distance of separation along the length of the individual wire conductors. A unit length transmission-line model can be associated with the filar wire physical implementation. Mixed-mode s-parameters can be used to separately analyze and characterize the filar wire transmission-line even-mode and odd-mode parameters. A sigma/delta transmission-line transformer is shown in Figure 5.22 and is built using a tri-filar wire. The ports are numbered to match the diagram shown in Figure 5.19 and the ideal lossless standard and mixed-mode s-parameter matrices are shown in Figure 5.19. Both standard and mixed-mode s-parameters are equal to the ideal values of sigma/delta hybrid of Figure 5.19 except the port impedance associated with single-ended ports 3 and 4 is equal to half that of ports 1 and 2. For an ideal transformer model, ground connections are optional at the ground terminal associated with port 4 and/or the common-node ground terminal associated with the other three ports. Ideally, physical ground connections have no effect on the ideal single-ended or mixed-mode s-parameters. Ground connections and performance, in general, becomes more complex with the addition of practical component models to the ideal transmission-line system or any transformer model. For the ideal transformer model, the s-parameters are independent of frequency. The practical RF circuit needs to be optimized to the desired frequency response once real transmission-line models and parasitic values are added to the design. Applying ground connections to the hybrid ports will short out some of the parasitic elements resulting in an imbalance in the symmetric or balanced

RL/2 4

1 RL

3 2 RL/2 RL 4

1

3

2

Figure 5.22 Transmission-line transformer that implements a sigma/delta hybrid circuit.


147

hybrid performance. In this situation, the mixed-mode s-parameters, especially the cross-mode terms and CMRR, become important tools to measure RF circuit performance and design a targeted solution. RF component modeling is a subject with many possible technical paths and a variety of implementations; these range from abstract behavioral models to physically based representations. A physically based model can be a useful design tool linking physical attributes with frequency-domain and time-domain parameters. These linkages to physical attributes provide the designer with an intuitive understanding of the circuit performance parameters, associated circuit properties that affect performance, and the limitations of a particular circuit implementation. Figure 5.23 displays the schematic of a lumped transformer model such as the one shown in Figure 5.22. The circuit frequency bandwidth determines how well this model can represent the transformer frequency-domain response. Optimization of the model parameter values to fit measured s-parameters is one procedure used to obtain the transformer model component values. Mixed-mode s-parameters offer an alternative set of parameters to use in this transformer model optimization process; mixed-mode s-parameters may improve the model-fitting parameters of interest or speed the model-fitting process and use less computer resources. Narrowing the frequency range associated with this optimization can improve the accuracy of the transformer-parameter-model values over the frequencies of interest with respect to the measured values. Bi-filar and tri-filar wire is manufactured to provide constant transmission-line RF design properties. However, inserting manually assembled filar Coupling capacitive Cc Conductor loss

Self-inductance Interwinding capacitance

Selfinductance

Rs2 Conductor loss

Rs4/2 L23

Dielectric loss C4 Rp4

Rs4/2 Conductor loss

C23

Rs3 Conductor loss

L4 L13

C13

Self-inductance Interwinding capacitance

Rp23 Dielectric loss

M Mutual Inductance

Rp13 Dielectric loss

Rs1 Conductor loss Interwinding capacitance

Figure 5.23 Transmission-line-transformer model for the sigma/delta hybrid circuit.

148


wire into a transformer that includes a toroidal ferrite core introduces variability in the transformer electrical design parameters. An alternative filar conductor construction is shown in Figure 5.24 that employs a two dimensional multilayer technology called low temperature co-fired ceramic (LTCC). Thin layers of dielectric ceramic material sandwich separately screened on patterns of conductive paste that are connected with solid conductor via connections. This multilayer LTCC process has many characteristics similar to integrated circuit technology including CAD and technology design kit options such as dielectric thickness, dielectric constant, resistors, capacitors, conductor metal, and screened ferrite material. Broadside conductor coupling through the ceramic substrate provides a significant increase in the mutual coupling compared to the tri-filar wire implementation of Figure 5.23. In addition to the increased coupling, the multilayer LTCC process offers superior isolation between the two sections of the transformer winding between ports 1 and 2 that are divided by the center tap port 3. This unique and superior isolation is difficult to model (see Figure 5.24) and identify with standard s-parameters. Mixed-mode s-parameters offer a better modeling and design tool to gain an intuitive physical relation to transformer performance parameters. 1

4a 1 4a 3 4b 2

3

5

10

15 4a

1 3

2

1

4b 1

6

11

16

2

7

12

17

3

8

13

18

4

9

14

19

4b

4b

2

4a 2

3

4b

3

4a

4b 2 alternate coupling model

1

Figure 5.24 An alternate transmission-line-transformer implementation in multiplayer low-temperature cofired ceramic technology that acts as a sigma/delta hybrid.


149

5.10 Transformer 90° Hybrid Implementation Frequency converters (mixers) are fundamental RF components in which 0°, 90°, and 180° single-ended to mixed-mode and reverse signal conversions are extensively applied. The accuracy of the RF signal processing directly effects specifications such as port-to-port isolation, spurious rejection, side-band suppression, and even-order distortion. Image-rejection mixers perform spurious harmonic rejection; the level of image-signal rejection relative to the intended signal (down) conversion is a function of the mixer amplitude and phase imbalance across the entire frequency range. The following relationship can be used to determine downconverter or receiver mixer-image rejection (RI) or upconverter transmitter side-band-signal suppression as a function of amplitude (∆) and/or phase (θ) imbalance. 1 − 2 ∆ cos θ + ∆  R I = 10Log   1 + 2 ∆ cos θ + ∆ 

(5.60)

The amplitude and phase imbalance values are modeled as a composite value across the entire frequency-conversion range, not just at the input singleended to mixed-mode signal transfer frequency. Mixers are sensitive to the fundamental signal and all other signals injected into the mixer-input-frequency band. To achieve −20 dBc of receiver image rejection or transmitter sideband suppression requires less than 10° of image rejection mixer phase imbalance and less than 0.8 or −1 dB of amplitude imbalance. One implementation of an image-balanced mixer is shown in Figure 5.25, where a 90° hybrid is used in the RF and LO path and a 0° or 180° signal splitter is used in the IF path. An

In-phase IF

RF

0° 90° hybrid

90° hybrid

LO

90°

180° hybrid

∆ Ε

Quadphase IF

Figure 5.25 An example block diagram of an image-rejection mixer used in communicationreceiver circuit.

150


alternative image-rejection mixer would have the 90° hybrid in the IF path and a 0° signal splitter in the LO or RF path. Either configuration will provide quadrature-offset IF signals that can be summed or subtracted to obtain the upper or lower mixer sideband frequency component. If there is no need for isolation in the RF path, splitting the signal can be accomplished by connecting the in-phase and quadrature mixer RF inputs together with equal delay conductor paths. This zero isolation common connection method can be used to produce a differential IF output. Summation is accomplished with direct connection of the differential pair conductors, while swapping the polarity of differential output provides a delta or subtraction function. Some care is needed to insure common-mode and differential-mode impedance-matching conditions are satisfied and the port-to-port mixer signal isolation is achieved with a common connection splitter/combiner. However, the integrated generation of a quadrature signal set is not possible with a simple differential-common-connection splitter/combiner circuit. Within an integrated circuit, there are three quadrature-generation methods, edge-defined logic divider, quadrature oscillator or delay-lock loop, and poly-phase transformation. The first two methods are time-domain solutions, while the poly phase transformation is a passive frequency-domain resistorcapacitor and capacitor-resistor circuit. Frequency division is a relatively easy digital logic function with very wide bandwidth that can be implemented in either bipolar or CMOS technology. However, frequency division requires generation of a signal with 2 times the local oscillator frequency and good differential output or a signal at 4 times the local oscillator frequency. Higher-frequency performance, low-noise performance, and lower power dissipation are three reasons why passive hybrid circuits are still used in RF signal processing applications such as the image rejection mixer of Figure 5.25. One method of implementing a 90° hybrid is as broadside-coupled quarter-wavelength conductors. Broadside coupling is where two conductors are implemented on opposite sides of a planer insulating dielectric surface such as the LTCC. The ideal 3-dB 90° hybrid of Figure 5.20 is implemented as microwave-coupled conductors with quarter-wavelength transmission lines that are shown in Figure 5.26. Even-mode and odd-mode mode analysis describes the operation of this coupled-line hybrid. Equation (5.61) can be used to design a general-purpose coupler. Z 0e = Z s

1+ c 1− c

and Z 0o = Z s

1− c 1+ c

(5.61)

In (5.61), Zs is the single-ended port impedance and c is the voltage-coupling factor; the voltage-coupling factor is the square root of the power


151 3

er eff = 1

al

et op m

t

2 insulator

1

λ/4 bottom metal

4

Figure 5.26 A 90° hybrid with microwave transmission-line implementation.

coupling. For a 3-dB coupler where a single-ended input is split into two equal amplitude outputs with 90° phase offset (Φ), the voltage-coupling factor c = 0.707. The even-mode, Z0e and odd-mode, Z0o characteristic impedance of a coupler having the single-ended port impedance, R = 50Ω is Z0e = 120.7Ω and Z0o = 20.7Ω. Mixed-mode s-parameters can be used to extract the design parameters from this coupled-line hybrid circuit by reconfiguring the four ports as in

S std

 S 11 S 21 = S 31 S  41

= S 11 = S 41 = S 31 = S 21

S 12 = S 14 S 22 = S 44 S 32 = S 34 S 42 = S 24

S 13 S 23 S 33 S 43

= S 13 = S 43 = S 33 = S 23

S 14 S 24 S 34 S 44

= S 12  = S 42   = S 32  = S 22 

(5.62)

These standard s-parameters are then transformed into mixed-mode s-parameters. With the aid of ABCD-parameters derived from the mixed-mode s-parameters, mode-specific transmission-line-lumped values can be determined; see Chapter 3 which presents distributed mixed-mode s-parameters for transmission lines and the extraction of the R, L, G, and C model.

5.11 Summary—Mixed-Mode S-Parameters Applied to Baluns and Hybrids Splitters and combiners are an important component associated with RF singleended to mixed-mode transformation and the reverse mixed-mode to single-ended transformation. Mixed-mode s-parameters offer an intuitive set of data for analysis and design of baluns and hybrids. One application of

152


mixed-mode data is to determine CMRR to specify the imbalance of a differential 0° or 180° splitter. The CMRR concept was expanded into a DMRR to specify the imbalance of a 0° splitter. CMRR and DMRR represent the splitter rejection of an undesired mixed-mode output signal resulting from a single-ended input signal. In addition, the combiner can have undesired responses for a mixed-mode input signal. These combiner responses are characterized by the differential-mode response (RDM) and the common-mode response (RCM). CMRR, DMRR, RDM, and RCM are alternative performance specifications for a splitter/combiner instead of amplitude and phase imbalance. Ideal 0° splitters have a CMRR of zero, 180° splitter/combiners have a CMRR of infinity and an ideal 90°-splitter combiner has a CMRR equal to one. CMRR, DMRR, RDM, and RCM are a set of general-purpose specifications for any splitter/combiner with any phase-offset function (Φ). A three single-ended port splitter/combiner response can be converted into a two-port set of mixed-mode s-parameters for additional post processing calculations such as G max , simultaneous match, and stability analysis. The 3 × 3 two-port mixed-mode s-parameters of Figure 5.4, contains a two 2 × 2 matrix describing single-ended s-parameters to mixed-mode s-parameters and the reverse transformation. These single-ended s-parameters to mixed-mode s-parameter conversion parameters are Sds, Scs, Ssd and Ssc, with the 2 × 2 matrix calculations of (5.63). S sd

ds

=

S sc cs =

S sd 12 = 2 (S 12 − S 13 )  1  2S ss 11 = 2S 11   2 S ds 21 2 (S 21 − S 31 ) S dd 22 = S 22 − S 23 − S 32 + S 33 

S sc 12 = 2 (S 12 + S 13 )  1  2S ss 11 = 2S 11   2 S cs 21 2 (S 21 + S 31 ) S cc 22 = S 22 + S 23 + S 32 + S 33 

(5.63)

These two sets of 2 × 2 s-parameters can be post processed to solve for G max , simultaneous match, and stability. Mixed-mode s-parameters provide a method of fitting splitter/combiner response into a 2 × 2 matrix suitable for standard s-parameter calculations such as ABCD-, Y-, Z-, and T-parameter transformations.

References [1]

Wilkinson, E. J., “An N-Way Hybrid Power Divider,” IEEE (IRE) Trans. on Microwave Theory and Tech., Vol. 3, No. 1, January 1960, pp. 116–118.

[2]

Gray, P. R., et al., Analysis and Design of Analog Integrated Circuits, 4th ed., New York: Wiley, 2001, pp. 221–224.

6 Mixed-Mode Analysis Applied to Four-Ports and Higher 6.1 Introduction Previous chapters presented fundamental concepts describing mixed-mode s-parameters along with differential amplifiers, transmission lines, and power splitter/combiner applications. This chapter will present a differential filter, a directional coupler, and a differential isolator as example applications. These application examples demonstrate mixed-mode s-parameter matrix operations and parameter extraction techniques. This chapter reviews the indefinite matrix operation, a unique redefinition of the common (ground) port and applies it to mixed-mode circuits. The chapter begins with a brief review of the small-signal network matrix representations as background for circuit linear transfer models and behavioral impedance models. This chapter ends with mixed-mode analysis of a differential band-pass filter, a dual directional coupler, and a differential isolator.

6.2 Impedance (Z ), Admittance (Y ), Hybrid (H ), ABCD, Chain (T ), and Scattering (S ) Parameter Network Matrix Models Any passive or active linear time-invariant network can be represented with a set of terminal voltage and current values across a frequency range of interest. The simplest of networks is the two-terminal network shown in Figure 6.1(a), with the voltage potential v1 across the two terminals and the current i1 into terminal 1. For this simple two-terminal network, there will be an equal amplitude

153

154


+ v1 −

terminal1 + i1 v1

terminal1

i1

two-terminal network

−

terminal2

one-port single-ended network

terminal2 (b)

(a)

+ v1 −

terminal2

terminal1

i1

two-port single-ended network

port1

i2

v2

port2

(c)

Figure 6.1 Diagram of (a) a two-terminal network that can be represented as (b) a one-port or (c) a two-port single-ended model with respect to zero voltage potential ground.

current i1 (with a different phase) at terminal 2 (given a circuit in steady-state with no other ports such as internally grounded ports). The current, i1 is a function of the network impedance and the voltage v1 across the two terminals. Referencing one of these two terminals to ground (zero voltage potential) makes the two-terminal pair a single-ended one-port network which is shown in Figure 6.1(b). A single-ended port is defined as any terminal referenced to ground. At a given frequency, a one-port single-ended network is completely defined with the port impedance, Z11. Z 11 =

v1 i1

(6.1)

Let’s examine a two-terminal circuit component such as a simple transmission line, a resistor, a capacitor or an inductor placed between the terminal 1 and terminal 2 in Figure 6.1(c). There is no shunt-to-ground element built into the two-terminal circuit. The two-terminal circuit is represented as a two-port singleended network which can include parasitic reactance at each of the two terminals to zero voltage ground. For low frequencies or with no parasitic capacitance from terminals to ground, terminal 2’s current i2 is equal to −i1. The simple two-port network of Figure 6.1(c) has three terminals with the ground as the third terminal. For a real two-terminal circuit, the ground current characterizes the parasitic circuit elements such as stray capacitance between terminals.


155

Single-port network synthesis starts with single-ended circuits configured with ideal loads or sources. Under these conditions, the single-ended port small-signal voltage and current responses are defined for any port termination impedance. Verification or characterization of an unknown multiport network is accomplished with termination of one port in known source impedance and measuring the signals on the other port(s) terminated with known load impedances. At analog frequencies, the measurements are implemented by applying an independent voltage or current source with a predefined impedance. The resulting dependent current or voltage parameter is sampled and measured under the known termination impedance conditions. The process is repeated with the independent source applied at each port. This general measurement method results in a complete representation of an arbitrary linear network of single-ended port impedances and single-ended port to single-ended-port-transfer functions under small-signal operating conditions. Small-signal conditions are measured at a low-level ac input source level where there is linear time-invariant input impedance and the circuit transfer functions are constant and unchanged over the entire signal period. There are a variety of small-signal linear two-port parameters (z-, y-, h-, and ABCD-parameters) that are determined from ac measurements and can be readily translated to the other small-signal parameters. Typical measurement system ac/RF source impedances have three common values, 0Ω (short), infinite Ω (open), and 50Ω. Some common characterization equipment (oscilloscopes) has very high input impedances such as 1MΩ or 10MΩ. An ideal voltage source’s input impedance is a short or 0Ω, and an ideal current source input impedance is an open or ∞Ω. Application of a 0Ω termination at a port sets that port’s voltage to 0V. An open termination makes a port’s current 0A. Given these definitions, there are three common combinations of independent source and port terminations for defining a matrix relationship for the two-port network of Figure 6.1(c). The common small-signal parameter definitions are reviewed next [1]. In characterizing z-parameters [1], an independent ac current source signal is applied at one port and the dependent voltage is measured with open port (infinite impedance) termination at a second port,

Z-Parameters.

 v 1   Z 11 v  =  Z  2   21 Z 11 = Z 21 =

v1 i1 v2 i1

Z 12  i 1  Z 22  i 2  Z 12 =

i2 = 0

Z 22 = i2 = 0

v1 i2 v2 i2

(6.2) i1 = 0

i1 = 0

156


For example, the impedance Z11 is equal to v1/i1 with i2 equal to zero (open or infinite impedance termination) at port 2. The transfer impedance Z21 is equal to v2/i1 again with i2 equal to zero at port 2. Z11 is called the open-circuit input impedance and Z21 is called the open-circuit forward-direction transfer impedance. Z22 is the open-circuit output impedance and Z12 is the open-circuit reverse-direction transfer impedance. To characterize y-parameters [1] an independent voltage source signal is applied at one port and a dependent current is measured with short or (zero impedance) port termination,

Y-Parameters.

 i 1  Y 11 Y 12  v 1  i  = Y    2   21 Y 22  v 2  i i Y 11 = 1 Y 12 = 1 v1 v = 0 v2 v 2

Y 21 =

i2 v1

(6.3)

1 =0

Y 22 = v 2 =0

i2 v2

v 1 =0

For example, the admittance Y11 equals i1/v1 with v2 equal zero (short circuit termination) at port 2. The transfer admittance Y12 is equal to i1/v2 with v1 equal to zero (short circuit termination) at port 1. Y11 is called the short-circuit input admittance and Y21 is called the short-circuit forward-direction transfer admittance. Y22 is the short-circuit output admittance and Y12 is the short-circuit reverse-direction transfer admittance. H-Parameters. In practical circuit measurements, short-circuit-based testing is

most effective in characterizing high impedances and open-circuit-based testing is most effective in characterizing low impedances. H-parameters [1] were developed to characterize a network, circuit or transistor with a low-input impedance and high-output impedance. The h-parameters sources have an infinite impedance current source applied at port 1 and in a separate test, a zero impedance voltage source is applied at port 2. v 1  H 11 i  = H  2   21 H 11 = H 21 =

v1 i1 i2 i1

H 12   i 1  H 22  v 2  H 12 =

v 2 =0

H 22 = v 2 =0

v1 v2

i1 = 0

i2 v2

i1 = 0

(6.4)


157

For example, the impedance H11 is equal to v1/i1 with v2 equal to zero (short or zero impedance) at port 2. This is the inverse of the admittance Y11 measured under the same port-impedance conditions. The impedance Z11 is similar to the impedance H11 except for a short termination on port 2 instead of an open termination on port 2. H11 is called the short-circuit input impedance and H21 is called the short-circuit forward-current gain i2/i1. H22 is the open-circuit output admittance and H12 is the open-circuit reverse-voltage gain v1/v2. Representation of a network in a z-parameter, y-parameter, or h-parameter form is useful in analysis of a particular circuit and is often available from network simulation software. However, there are a number of network operations such as parasitic circuit element de-embedding that require the circuit designer to program the computer to do parameter subtraction. For example, two singleended two-port networks are connected in series as shown in Figure 6.2; these networks represent a bipolar transistor with emitter inductance. The composite network z-parameter matrix is the matrix addition of the transistor z-parameters and the inductor z-parameters, v 1  v 1a + v 1b   Z 11a + Z 11b v  = v a + v b  =  Z a + Z b  2  2 2  21  21

Z 12a + Z 12b  i 1  b   Z 22a + Z 22  i 2 

(6.5)

Network simulators provide series, parallel and other connections of individual circuit elements in their internal circuit matrix database. However, performing a conceptual experiment by removing a component from a network matrix composite may require direct user involvement. De-embedding is a technique where a component is removed from a composite network matrix, to find i1 +

i2 + v 1a −

a

i1a

Z 11 a

Z 21

a

Z 12 a

Z 22

i2a

v 2a

i2 i1

+

−

+

+ a

b

−

v1

v2

v1

v1b −

i1b

b

Z 11

Z 12

b

b Z 22

Z 21

i2b

v 1b −

v2

b −

−

−

Figure 6.2 Series connected networks using z-parameters with an emitter-inductance feedback.

158


a subcircuit response. To find the small-signal response of a transistor under high-frequency test it is necessary to de-embed the effects of the test equipment, the test probes, the on-chip I/O connections, and the transmission lines to the transistor. For the example of a bipolar transistor with a series emitter inductor, it is necessary to have the composite network matrix of the series connected components shown in Figure 6.2 along with the inductor network z-parameter matrix (a wire-bond package connection). Then the transistor network matrix is found by taking the matrix difference of the composite network z-parameters and the inductor network z-parameters. When single-ended two-port networks are connected in parallel as shown in Figure 6.3, a bipolar transistor with base-to-collector package capacitance can be modeled. The composite network y-parameter matrix is matrix addition of the transistor and capacitor y-parameters. Alternatively, the matrix operation shown in Figure 6.3 could be used in the parameter extraction of the base-to-collector coupling, the input-to-output leakage, the transistor reverse isolation, or a base-to-collector feedback circuit. The input-to-output isolation as represented by the y-parameter matrix a can be a composite of transistor, package, or interconnection effects, and the de-embedded parameter can give information about the effects of the feedback components. i 1  i 1a + i 1b  Y 11a + Y 11b Y 12a + Y 12b  v 1  i  = i a + i b  = Y a + Y b Y a + Y b  v   2  2 2  21 22 22   2   21

i1

+ v1 −

i2

i1a

a

Y 11

a

Y 12

a Y 21

Y 22

a

i2a

(6.6)

a

+ v2 −

i2 i1

+

+ b

i1b

Y 11 b

Y 21

b

b

Y 12 b

Y 22

i2b

v1 −

v2 −

Figure 6.3 Parallel-connected networks using y-parameters with a base-to-collector capacitor feedback.


159

A more complex network representation occurs when single-ended two-port networks are connected in series at one port and parallel at the other port as shown in Figure 6.4. One application for combining h-parameter networks (see Figure 6.4) is analyzing a common-base lossless feedback amplifier circuit. This application has an additional network matrix operation as compared to Figures 6.2 and 6.3. The common-ground terminal has been defined as the base instead of the emitter as shown in the previous examples. This is known as an indefinite admittance matrix operation; the indefinite matrix will be reviewed at the end of Section 6.2. The composite network matrix representation of series/parallel-connected networks is found by the addition of the individual network h-parameters. v 1  v 1a + v 1b   H 11a + H 11b i  =  i a + i b  = H a + H b  2  2 2  21  21

H 12a + H 12b   i 1   b  H 22a + H 22  v 2 

(6.7)

ABCD Parameters. Cascading networks horizontally from left-to-right or

right-to-left is an important network operation. This is not easily accomplished with the z-, y-, or h-parameters, since the independent terms associated with all three network representations are spread across ports 1 and 2. Associating independent terms with an “input” port of a two-port network and the dependent terms associated with an “output” port enables modeling network cascade connections by multiplying matrices. This is defined as “chaining” using ABCD-network parameters (also called chain or c-parameters) [1]. i1 +

i2 + v1a −

i1a

a h 11 a h 21

a h 12 a h 22

i2a

i1 + v1a −

+ v2 −

i1a

a

i2 v1

−

i1 − + + v1b −

b

i1b

h 11 b

h 21

b

v1

+

v1b

v2

b

h 12 b

h 22

i2b

i1b −

Figure 6.4 Series-connected networks as port 1 and parallel-connected networks at port 2 using h-parameters with a common-base bipolar in a series-parallel feedback transformer example.

160


v 1   A B   v 2   i  = C D   −i   1   2  v v A= 1 B =− 1 v 2 i =0 i2 v 2

C=

i1 v2

D =− i2 = 0

i1 i2

(6.8) 2 =0

v 2 =0

For ABCD-parameters, the inverse voltage gain A is equal to v1/v2 with i2 equal to zero (open circuit termination) at port 2. The transconductance B is equal to −v1/i2 with v2 equal to 0V (short circuit termination) at port 1. The transadmittance C equals i1/v2 with i2 equal to 0 A (open termination) at port 2. The inverse current gain D is equal to −i1/i2 with v2 equal to 0V (short circuit termination) at port 1. A is called the open-circuit reverse-voltage gain and C is called the open-circuit reverse-direction transadmittance. D is the short-circuit reverse-current gain and B is the short-circuit transfer impedance. Two single-ended two-port networks are cascaded as shown in Figure 6.5. The figure shows a transmission-line signal input to the base of a common-emitter bipolar transistor. The composite network ABCD-parameter matrix comes from the matrix multiplication of the transmission-line ABCD-parameters and common-emitter transistor ABCD-parameters. The independent matrix terms v 2a and i 2a of network a are the dependent terms v 1b and i 1b of network b with the following results, −i2

i1 + v1 −

Aa Ba Ca Da

i1a

−i2a

+ v1a −

+ v1b −

A b Bb Cb Db

i1b

−i2b

+ v2 −

−i2

i1

−i2a

i1b

+ v1

+

+

v2a

v1b

−

−

−

a

+

v2 b −

Figure 6.5 Cascade networks at port 2 of network (a), and port 1 of network (b). Cascading a transmission line with a common-emitter transistor-base input.


v 1  v 1a   A a  i  =  i a  = C a  1 1  

B a   v 2a   A a B a   A b  =  D a   −i 2a  C a D a  C b  A B  v 2  =   C D   −i 2 

161

B b   v b2    D b   −i 2b  (6.9)

S-Parameters. As the frequency of interest increases, analog lumped-circuit

models no longer accurately represent practical circuit behavior. The physical implementation of short or open impedances for device measurement becomes difficult and impractical to implement. The proven alternative is to define normalized impedances between the short, 0Ω and the open, ∞Ω for a new network representation. With a given source impedance value (typically 50Ω), the network small-signals are defined in terms of independent power waves a into a port and dependent power waves b out of a port. The incident or forward power wave a into a port is scattered into a reverse or reflected power wave b out of the same port and an absorbed power wave into the port. This is a scattering-parameter network representation with the following matrix relationship, b 1  S 11 b  = S  2   21 s 11 = s 21 =

b1 a1 b2 a1

S 12  a 1  S 22  a 2  s 12 =

a2 = 0

s 22 = a2 = 0

b1 a2

a1 = 0

b2 a2

a1 = 0

(6.10)

The block diagram of an s-parameter network representation is no longer a physical network with terminal voltage and currents, but an abstract signal representation of a physical set of overlapping power waves a into each port and power waves b out of each port. All ports have two terminals with a voltage potential between them and a current along each terminal branch. A single-ended port has two physical terminals with one of the two terminals connected to ground (see Figure 6.6). The chain-scattering parameters, also called the scattering transfer parameters or T-parameters [2], are the power-wave equivalent of ABCD-parameters for cascaded microwave networks. T-parameters are defined with input power waves a1 and b1 as the independent variables and output power waves a2 and b2 as the dependent variables, T-Parameters.

162

Microwave Differential Circuit Design Using Mixed-Mode S-Parameters port 1

a1

S11 S12 S21 S22

b1

port 2

port 1

b2

a1

a2

single-ended ports

S11 S12 S21 S22

b1

port 2

b2

a2

Figure 6.6 Scattering parameter network block-diagram representation.

a 1  T 11 T 12  b 2  b  = T    1   21 T 22  a 2  a a T 11 = 1 T 12 = 1 b2 a =0 a2 b

2 =0

2

T 21 = a 1  a 1a  T 11a b  = b a  = T a  1   1   21 T a =  11a T 21

b1 b2

(6.11)

T 22 = a2 = 0

b1 a2

b2 =0

T 12a  b 2a    T 22a  a 2a  T 12a  T 11b T 12b  b 2b  T 11 T 12  b 2      =  T 22a  T 21b T 22b  a 2b  T 21 T 22  a 2 

(6.12)

Each of these alternative network matrix representations present a complete set of parameters that define a two-port network’s small-signal response. Assume the circuit is linear and is modeled with a well-behaved matrix with a unique solution; each of these network matrix representations can be used to calculate or simulate the equivalent network response. In addition, there exists a transformation between the different network matrix representations (see Figure 6.7) [3]. An example calculation that obtains the transformation between scattering, s-parameters, and admittance, y-parameters, follows:

Parameter Conversion.

[I ] = [Y ][V ]

aa1

ba1

T11a

T12a

T21a

T22a

ba2

aa2

ba2 aa2

=

ab1 bb1

(6.13)

ab1

bb1

T11b

T12b

T21b

T22b

bb2

Figure 6.7 Cascade transfer scattering-parameter network block-diagram representation.

ab2


163

In terms of incident ([V + )] and ([I + ]) and reflected ([V − )] and ([I − ]) waves,

[I ] − [I ] = [Y ]([V ] + [V ]) +

−

+

−

(6.14)

Rearranging the incident and the reflected terms, −[Y ]V

−

 − I  = [Y ]V  − I  −

+

+

(6.15)

Accumulating distributed wave terms,

([Y 0 ] + [Y ])V −  = ([Y 0 ] − [Y ])V + 

(6.16)

Y0 is assumed to be real and equal to 0 Y 0 1  0 Y 02 Y0 =  L L  0 L 

L L

0 0 L Y 0N

     

(6.17)

Arranging terms to satisfy s-parameter relationships,

[S ] = [V − ] [V + ] = ([Y 0 ] − [Y ]) ([Y 0 ] + [Y ])

(6.18)

Solving this relationship in terms of [Y ],

[Y ] = [Y 0 ] ([I ] − [S ]) ([I ] + [S ])

(6.19)

This derivation is a template for development of parameter conversion relationships between s-parameters, y-parameters, and z-parameters. H-parameters, ABCD-parameters, and t-parameters are paired two-port arrangements of voltage/current or input/output-defined ports. In short, h-, ABCD-, and t-parameters make an assumption about the signal flow through each network port but can be used for a small-signal universal representation of a two-port network. However, extending h-parameters, ABCD-parameters, and t-parameters to more than two-port networks is not handled easily in a general network relationship. S-parameters, y-parameters, and z-parameters provide a general relationship from any network port to every other port comprising the network; these parameters can be used to represent three-port,

164


four-port, and n-port systems. Paired input/output port parameters such as h-parameters, ABCD-parameters, and t-parameters do not provide universal three-port, four-port, or n-port small-signal representation. This can be seen in microwave simulation tools that only support two-port conversion of h-parameters, ABCD-parameters, and t-parameters to other network parameter representations. It is not clear that there is a benefit of having a general relationship for h-parameters, ABCD-parameters, and t-parameters for more than two-port networks. However, discussing this possibility may provide new network modeling functions. One approach would be to provide h-parameters, ABCD-parameters, and t-parameters for a network with more than two ports without cross-mode parameters. For example, a network with three ports, one input and two outputs would have two sets of 2 × 2 h-parameters, ABCD-parameters, or t-parameters with the input port shared by both sets of parameters. There would be an assumption of isolation (no crosstalk) between the two output ports of this paired-port three-port network representation. Now, let’s look at mixed-mode s-parameter techniques and multiport networks. Mixed-mode representation of a network with more than two ports provides a subset of two-port network parameters that represent the various signal modes including cross-mode parameters. For example, the three-port splitter shown in Figure 6.8, has one input and two output ports with two submatrices of differential-mode and common-mode 2 × 2 network parameters. The mixed-mode s-parameter representation of the three-port network of Figure 6.8 is a 3 × 3 matrix:

Mixed-mode port two, single-ended output pair

Mixed-mode port one, single-ended input splitter

single-ended output, port two

single-ended input, port one

single-ended output, port three

Figure 6.8 Three-port splitter network with one input and two output ports.


[S

mm

 S ss 11  ] = S ds 21  S cs 21

S sd 12 S dd 22 S cd 22

S sc 12  S dc 22   S cc 22 

165

(6.20)

One 2 × 2 submatrix of mixed-mode parameters represents the singleended input to differential-mode output, S

[S ds ] = S ss 11 

ds 21

S sd 12  S dd 22 

(6.21)

The second 2 × 2 submatrix represents the single-ended input to commonmode output, S

[S cs ] = S ss 11 

cs 21

S sc 12  S cc 22 

(6.22)

These two network parameter submatrices can be converted into any one of the network parameter representations reviewed before. The mixed-mode s-parameters also include parameters for mode-conversion at the two output ports, common-mode to differential-mode conversion, Sdc22 or differential-mode to common-mode conversion, Scd22. These cross-mode parameters would not be included in any of the paired-port h-parameters, ABCD-parameters, and t-parameters representations. Thus, the h-parameters, ABCD–parameters, and t-parameters are hard to generalize to represent three-port, four-port or higher number of ports in a small-signal circuit. Developing a generalized scattering parameter relationship for arbitrary termination impedance, Z is the beginning of an extended multiport network analysis using s-parameters. Understanding the network response as a function of load impedance Z enables circuit design for optimized signal-power transfer, stable circuit operation, optimal signal-to-noise performance, and minimal signal compression. The n × n matrix for the generalized circuit s-parameter response, Sterminated-in-a-Γ-load, in terms of arbitrary termination impedance, Z, is

Arbitrary Source and Load.

S terminated −in − a Γ −load = A −1 (S − Γ T ∗ )(I N − ΓS ) A T ∗ −1

(6.23)

where A is the termination loading factor matrix, Γx is the port x reflection coefficient, and S is the n × n circuit s-parameter response with all ports terminated with Z0 loads. Generally, network analyzers measure a circuit’s s-parameter response in a Z0 = 50Ω matched system which may or may not be the same environment that ultimately interfaces with the microwave circuit.

166


 A1 0 A= L 0  A1 =

0 L A2 L L L

0  0   L A n 

1 − Γ1∗ 1 − Γ1 1 − Γ1

2

Γ1 0 L 0  0 Γ L 0  2  Γ= L L L 0 L Γn  

(6.25)

(6.26)

Z1 − Z 0 Z1 + Z 0

(6.27)

1 0 L 0  0 1 L 0   = L L L 0 L 1n  

(6.28)

Γ1 =

IN

(6.24)

The s-parameters are normalized to a real impedance Z0 and port x is terminated in impedance Zx. Optimization of network performance such as power gain has been well established for two-port s-parameter networks, and has not been given much consideration for more than two-port circuits. Mixed-mode s-parameters offer a means of applying the many two-port analyses and techniques to greater than two-port circuits, such as the splitter of Figure 6.6. The name “indefinite matrix” implies that no definite choice is made to ground any particular circuit terminal. The use of indefinite matrices originated with modeling three-terminal transistors using two-port s-parameter measurements. There was a conversion of the transistor parameter representation between different common or grounded terminals in common-base and common-emitter circuits. Grounding one of the transistor three terminals results in a two-port network named for the grounded terminal, such as common-emitter, common-base, or common-collector. Since admittance parameters and scattering parameters provide noninfinite impedances to ground on each port, the indefinite matrix is useful. The sum of each row and column of the indefinite


167

admittance matrix is equal to zero and the sum of each row and column of the indefinite scattering matrix (s-parameter) is equal to one [4]. An open-circuit impedance parameter (z-parameter) representation does not provide a ground return current path at any port with a nonground terminal. An indefinite z-parameter matrix would require each row and column to be equal to infinity. The classic procedure for creating the indefinite admittance matrix for an n-port component is as follows. • Measure the circuit n-port s-parameter data with one port grounded.

For example, measure a bipolar amplifier common-emitter response with the emitter port grounded. • Convert the n-port s-parameter data to n-port y-parameter data using

(6.19) shown in Section 6.2. • De-embedded or subtract out any parasitic effects or resistances (if any)

of the microwave ground connection from the y-parameter circuit response matrix. These ground connection effects need to be translated to y-parameters if they are measured as s-parameter responses. • Extend the y-parameter data to n+1 ports by filling in the unknown

indefinite admittance matrix terms. This is done by adding values to the unknown terms that make the rows and columns of the indefinite admittance matrix equal to zero. Given the device indefinite admittance matrix it is straightforward to determine the device s-parameter response with any port grounded. • Take the indefinite admittance (y-parameter) matrix and remove the

row and column terms of the port to be grounded. • Add the effects of the parasitic and resistances to ground of the ground

termination (if any exist). • Convert the admittance matrix back to the s-parameter matrix.

This process can be used to determine the s-parameter response of the common-base amplifier from the measured common-emitter data. One caution in using this process is that the active device bias must be the same for all amplifier or active device configurations including all terminal voltage differences and terminal currents. For example, for a bipolar transistor, VCE, VBE, VBC, IB, IC, and IE must be the same for the different common (grounded) port connections. This can be problematic when converting a practical common-emitter to a common-base or emitter-follower amplifier circuit.

168


The indefinite admittance (or s-parameter matrix) can be determined for any multiport component measured with a single port connected to RF ground. The ground connection can be a series resistance or a dc blocking capacitor. Each of these common-ground implementations includes a parasitic reactance that is embedded as part of the indefinite matrix. This ground connection can be characterized separately and subtracted from the composite indefinite matrix to provide an indefinite matrix of the component of interest. This component indefinite matrix allows the designer to redefine the common port. The indefinite matrix calculation can be applied to a dual-gate FET transistor measured with the source grounded, to provide modeling of common-gate 1, commongate 2, or common-drain performance. A five-terminal tapped transformer provides a second indefinite s-parameter matrix example. One of the five terminals is connected to ground during a four-port s-parameter measurement; this is shown in Figure 6.9. The center tap of a transformer is often used as a bypassed or open RF terminal to provide dc current supply to active circuit output or input elements. The RF circuit designer may add circuits to the center tap to create differential-mode to common-mode conversion, for impedance transformation or for common-mode impedance matching. The designer can use the classical procedure as outlined before or can look at the indefinite s-parameter matrix discussion below. In order to make this presentation more theoretically complete, the authors present the concept of indefinite s-parameter matrix analysis below. The indefinite s-parameter matrix is especially useful for calculating the unmeasured s-parameter response of a grounded port. The indefinite scattering matrix provides the overall circuit response for all ports connected to Z0. Given the indefinite s-parameter matrix, it is possible to convert the transformers in Figures 6.9 and 6.10 common-mode s-parameters (with port 5 grounded) Sp5dcm to the 4

3

[S ]=

1

5

S11 S12

S13

S21 S22

S23 S24

S14

S31

S32 S33

S34

S41

S42

S44

S43

[SI ] =

S 11I

S 12I

S 13I

S 14I

S 15I

S 21I

S 22I

S 23I

S 24I

S 25I

S 31I

S 32I

S 33I

S 34I

S 35I

S 41I

S 42I

S 43I

S 44I

S 45I

S 51I

S 52I

S 53I

S 54I

S 55I

2

Figure 6.9 Five-port indefinite matrix conversion to common four-port y-parameter matrix Yp4cm of a tapped transformer network.


169

transformer s-parameters Sp4cm response with port 4 as common-mode (terminated in Z0) or with port 4 grounded. Consider the example of Figure 6.10 in which the four-port transformer s-parameters are measured but port 5 is connected to ground. The five-port transformer indefinite s-parameter matrix elements are calculated from the four-port s-parameter measurements using the relationships of (6.29). Then, the common-mode response for any port x with a grounded termination is found by eliminating the column x and row x from the indefinite y-parameter matrix. The starting s-parameter matrix is S 11 S 21 [S ] S 31 S  41

S 12 S 22

S 13 S 23

S 32 S 42

S 33 S 43

S 14  Y 11  Y S 24  ⇒ [Y ] =  21 S 34  Y 31  Y S 44   41

Y 12 Y 13 Y 14  Y 22 Y 23 Y 24   Y 32 Y 33 Y 34  Y 42 Y 43 Y 44 

x

Y iyI = − ∑Y in , i is the measured port, x is the number of ports, and y is the comn =1

mon port

Y 15I  Y 11  I  Y Y 25  =  21 Y 35I  Y 31  I  Y 45  Y 41

Y 12 Y 13 Y 14 Y 22 Y 23 Y 24 Y 32 Y 33 Y 34 Y 42 Y 43 Y 44

  −1   −1     −1   −1  

x

Y yiI = − ∑Y nj , j is the stimulated port

[Y

n =1

I 51

Y 52I Y 53I Y 54I

Y 55I ] = [ −1 − 1 − 1 − 1 0 ] Y 11  Y 21 Y 31  Y 41  0

Y 12 Y 13 Y 14 Y 22 Y 23 Y 24 Y 32 Y 33 Y 34 Y 42 Y 43 Y 44 0 0 0

The final indefinite y- and s-parameter matrix becomes

Y 15I   Y 25I  Y 35I   Y 45I  0 

170


Y 11  Y 21 I [Y ]Y 31  Y 41 Y 51I

Y 12 Y 13 Y 14 Y 22 Y 23 Y 24 Y 32 Y 33 Y 34 Y 42 Y 43 Y 44 Y 52I Y 53I Y 54I

Y 15I   Y 25I  Y 35I  ⇒ [S I ]  Y 45I  Y 55I 

x

1 = ∑ S inI , i is the measured port, x is the number of ports n =1 x

(6.29)

1 = ∑ S , j is the stimulated port n =1

I nj

Once the indefinite s-parameter matrix is determined the response with a grounded port can also be determined. In this case the indefinite s-parameter matrix is converted to the indefinite admittance matrix. Then an alternate set of common-mode s-parameters with a grounded port is found by eliminating the y-parameter row and column associated with the common-mode port. This procedure is as shown in Figure 6.10 in which port 4 is grounded. The s-parameters of with the common-mode port 4 grounded can be found by converting the y-parameters back to s-parameters. Summary. The common network matrix representations of linear small-signal

circuit networks were reviewed. Each of these matrix representations has its advantage with respect to a specific application or purpose. Mathematical transformations from one n × n matrix parameter set to another parameter set exists for s-parameters, z-parameters, and y-parameters. These transformations are used in simulation programs with a limit to 2 × 2 matrixes for h-parameters, ABCD-, and t-parameters. Sections 6.3 through 6.5 will provide examples of mixed-mode s-parameters and small-signal parameter extraction. 3

4

Y11 Y12 Y13 Y14 Y15 Y21 Y22 Y23 Y24 Y25 [Yp4cm] =

Y31 Y32 Y33 Y34 Y35 Y41 Y42 Y43 Y44 Y45

1

5

2

Y51 Y52 Y53 Y54 Y55

Y11 Y12 Y13 Y15 Y31 Y32 Y33 Y35 Y41 Y42 Y43 Y45 Y51 Y52 Y53 Y55

Figure 6.10 Five-port indefinite matrix conversion to common four-port y-parameter matrix Yp4cm of a tapped transformer network.


171

S-parameters are the most popular RF/microwave network representation because of the use of practical termination impedances instead of a short or open. The short and open are impractical to achieve physically as frequency increases into the microwave-domain. Power-wave representation has resulted in a number of linear network analyses and design tools in the frequency-domain. These include matching-port impedances, simultaneousport-conjugate matching, gain circles and power circles, stability potential, and unilateral figure of merit. Mixed mode s-parameter provides a method for these two-port network analysis tools to be applied to more than two-port networks. The following sections will demonstrate the application of these analysis tools to mixed-mode networks. The indefinite s-parameter or y-parameter network matrix representation provides a way of extending four-port measurements to a five-port circuit model and evaluating performance at different common ports. De-embedding of the ground circuit connection during the s-parameter measurement can improve the indefinite matrix accuracy. Microwave circuit simulators offer indefinite matrix operations on three-port transistor networks. Applying de-embedding and extension beyond transistor common-mode conversion requires the user to implement microwave s-parameter equations within the simulator environment.

6.3 Differential Band-Pass Filter Filters select and transmit specified frequency bands and block signals at unwanted frequencies; they are used throughout wireless communications systems. In receivers, band-pass filters are used to reject undesired RF signals such as the image frequency, half-IF (intermediate frequency), or intermodulation distortion signals that interfere with the received communication signal. Wireless transmitters produce out-of-band noise and spurious signals that the FCC requires to be suppressed before conduction to the antenna. These out-band signals can become radiated interference signals for aircraft, emergency services, cell phones, WLANs, and other communications equipment. One class of RF filters used in wireless RF applications is coupled resonator-based filters. Filter pass-band selectivity is provided through frequency-dependent input impedance that reflects out-of-band power waves. Interfacing active circuits with the filter’s strong signal out-of-band signal reflections requires stability analysis and nonlinear circuit simulations to prevent oscillations. The demand for mixed-mode RF filters increases because differential circuit designs are migrating through wireless systems from baseband subcircuits to the RF subcircuits towards the antenna. This section will demonstrate conversion from a single-ended input to mixed-mode output using a coupled-resonator pair band-pass filter design. The

172


process will be taken in steps. A key analysis step is anticipating the impact of RF parasitics on the filter design and performance. Filter design is such a broad subject that this section will focus on the use of mixed-mode s-parameters in filter analysis rather than the general filter design process. In addition, this section presents the mixed-mode band-pass filter with arbitrary mixed-mode termination impedances. The conversion of single-ended s-parameter measurement data (with 50Ω loads) to mixed-mode provides a set of mixed-mode s-parameters with 100Ω differential-mode terminations and 25Ω commonmode terminations. Converting the single-ended s-parameters with other termination impedances (75Ω) modifies the mixed-mode terminations as well. However, the 4 to 1 impedance ratio between the differential-mode and common-mode impedance still exists. Also, this section analyzes mixed-mode s-parameters with independent and arbitrary differential-mode and commonmode termination impedances. Coupled-resonator band-pass filters are either parallel resonant with low out-of-band impedance or series resonant with high out-of-band impedance. Some resonator circuits are built using helical coils, microwave conductors on ceramic material, narrowband quartz-series resonators, and discrete inductorcapacitor networks. The resonator coupling is provided by mutual inductance, distributed edge coupling, broadside conductor coupling, or discrete capacitor circuits. A simple parallel resonance example (see Figure 6.11) will be shown after a brief review of RF filter parameters. This review will emphasize the RF processing of differential-mode and the use of mixed-mode s-parameters. Band-pass filter design begins with selecting the center frequency, Fc and the desired bandwidth (BW ) or upper and lower pass-band frequencies, FL and FH. Q is the quality factor which defines the relative selectivity of a circuit or the half-power bandwidth of the circuit. Q =

2π ⋅ maximum instantaneous energy stored in the circuit average energy dissipated per cycle

= quality factor

(6.30)

Q = ( 2 πFc L ) R L =Fc BW=Fc

( FH − FL ) M

RP RL

CP

LP

LP

CP

RP RL

Figure 6.11 A nodal or parallel resonant dual-coupled-resonator band-pass-filter network with mutual inductance.


173

In (6.30) and in Figure 6.11, L is the parallel combination of the resonator mutual inductance, M and LP, the input inductance when the output is open. RL is the shunt resistance defining the loaded Q. The design process is a trade-off between practical values of L, the coupled inductor and RL, the power-wave termination impedance. In many cases, the inductors are off-the-shelf components; this limits the inductor value selection and the values of RL. The circuit termination impedance can be scaled down with the use of a tapped capacitor or inductor. A design with a differential tap is a bit more complex, it requires centering the circuit design about the middle or virtual ground of the inductor or capacitor element of the resonator. Let’s extend the example of Figure 6.11 to represent a generalized transformer which has an input LP1 replacing LP on the left side of the transformer and an output LP2 replacing LP on the right. LP1 is the transformer’s input inductance with the output open-circuited and LP2 is the transformer’s output inductance with the input open-circuited. M, the mutual inductance is determined from k, the coupling coefficient. k is a function of the physical implementation of the inductors and their proximity to each other, M = k (L P 1 L P 2 )

12

for the symmetrical transformer L P 1=L P 2=L P M=k (L P L P )

12

(6.31)

= kL P

L = (1 L P + 1 M )

−1

In (6.31), k is the coupling coefficient associated with the coupled-inductor resonators. For maximum power transfer, the critical coupling is equal to kc = 1 Q

(6.32)

In Figure 6.11, RP represents the real portion of the composite resonator components LP and CP. If the value of RP is ≥ 10 times, the load resistance RL, the filter relationships of (6.30) apply (approximately) and the composite loss of RP can be neglected. However, if high-accuracy filter design is required then a filter design simulation is advised which includes all the parasitic effects such as RP. For inductors and transformers built off the integrated circuit, typically, RP is ≥ 10RL and the inductors and transformers have a very high Q. For on-chip inductors and transformers typically RP ≤10RL the inductors and transformers are low Q and simulation must be used to correctly determine the circuit response.

174


The network schematic of Figure 6.11 shows the nodal dual-resonator circuit has two pairs of terminals associated with the filter input and output for a total of four terminals. Assuming there is no parasitic capacitance, the circuit can be operated as a two, three, or four-port filter. The number of filter ports depends on how many RF grounds are applied to the four terminals. A three-port filter based on Figure 6.11 is single-ended at one set of terminals and differential-mode at the other. It converts single-ended signals to differential-mode signals and processes the input signals differently than the output signals. With one terminal grounded on each pair of terminals, the filter of Figure 6.11 would be single-ended at both input and output. An ideal dual-resonator schematic (single-ended terminations) and with simulation plots of dB(S21) and S11 are shown in Figure 6.12. Agilent ADS simulation tools were used to perform the filter synthesis and determine the standard s-parameter response. The results are based on ideal-circuit elements and show a filter response with the design center frequency of 450 MHz, a 3-dB bandwidth of 50 MHz and a single-ended mode power-wave termination impedance of 460Ω. Since an ideal differential-mode to differential-mode filter will have a response exactly like the single-ended to single-ended filter, this section will skip right to the interesting case of the single-ended to differential-mode filter. This single-ended to differential-mode circuit is shown in Figure 6.13 with both pairs of terminals using a tapped capacitor designed to step a 460Ω termination down to 50Ω. The differential terminals on the right of Figure 6.13 have the tapped capacitance balanced on both terminals. This balancing is also done with the mutual inductance values, L5 and L6 of the coupled inductance.

Term1 Num = 1

C2 C = CP

− Z = Rload/2 Ohm

L3 L=M L1 L = L1 R = R=

S(1.1)

Fc = 450 MHz BW = 50 MHz L1 10.94 nH CP = 12.5 pF M = 116.4 nH Rload/2 = 460 Ohms freq (100.0 MHz to 1.000 GHz)

L2 L = L1 R=

dB(S(2.1))

+

+

C1 C = CP

−

Term2 Num = 2 Z = Rload/2 Ohm

0 −10 −20 −30 −40 −50 −60 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 freq. GHz

Figure 6.12 An example ideal dual-resonator band-pass filter amplitude response dB(S21) and input impedance (S11) with single-ended terminations.


+

−

Term1 Num = 1 Z = RI Ohm

C5 C = Css

C4 C = Cs

L6 L8 L = M/2 L = L1

C6 C = 2*Css L7 L = L1

L5 L = M/2

175

+ C3 C = Cs−


C8 C = 2*Css

Figure 6.13 Band-pass filter schematic with a 50Ω single-ended termination and a 50Ω ideal differential-mode or balanced termination.

The simulation results of the ideal band-pass filter conversion from single-ended input to differential-mode response are shown in Figure 6.14. There is a slight rotation in the S11 input impedance plot (as compared to Figure 6.12) due to the tapped-capacitor network. A tapped-inductor would create a similar rotation of the S11 plot but in the opposite direction. The magnitude of the forward transmission dB(S21) is also very similar to the magnitude of the single-ended response dB(S21) of Figure 6.12. S-parameters associated with the schematic of Figure 6.13 are single-ended at one pair of terminals (or port) and differential-mode on the second pair of terminals. Here, the single-ended input has one of the two-port terminals connected to ground. The response to the differential-mode load shown on the right side of Figure 6.13 can only be calculated within simulators, this response cannot be directly measured with single-ended equipment. The differential-mode port shown in Figure 6.13 has a real differential-mode impedance of Rl Ω and infinite common-mode impedance. A single-ended measurement system with impedance Rl connected to each of the four filter terminals provides a two-terminal differential impedance of 2*Rl and a two-terminal common-mode 0

S(1.1)

dB(S(2.1))

−10 −20 −30 −40 −50 −60 freq (100.0 MHz to 1.000 GHz)

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

freq. GHz

Figure 6.14 Simulation results S11 and dB(S21) for the filter shown in Figure 6.13.

0.9

1.0

176


impedance of Rl/2. It is desirable to create a measurement system that provides s-parameters with independent mixed-mode and common-mode load impedances or the matrix calculation of mixed-mode s-parameters circuit response for arbitrary port impedances. For a network with zero magnitude cross-mode terms, the pure differential-mode and common-mode s-parameters can be independently calculated given arbitrary termination impedances. The mixed-mode s-parameters for arbitrary differential-mode and common-mode termination impedances can be determined with a non-4-to-1 differential-mode to common-mode impedance ratio but the calculation cannot be reversed. There is one single-ended set of s-parameters with arbitrary load terminations that can be processed back and forth between standard single-ended and mixed-mode network-matrix representations. Equal value single-ended termination impedances must be applied on terminal pairs associated with a mixed-mode terminal pair or port. As a result, a 4-to-1 mixed-mode differential-mode impedance and common-mode impedance ratio must be maintained on each mixed-mode terminal pair or port. For a system with multiple mixed-mode ports, each mixed-mode port can have different differential-mode termination impedances but the associated common-mode port impedances must be one-fourth of the differential-mode port impedances. This restriction maintains the matrix transformation back and forth between mixed-mode and standard single-ended s-parameters. So far this design exercise has employed lossless ideal components (no parasitics considered). Lossy components result in a reduction of the filter pass-band transfer signal dB(S21) below the 0-dB (no loss) reference line on the graph of the filter output response (see Figure 6.12); this reduction in signal level is called insertion loss. Each real inductor and capacitor has parasitic resistance, capacitance or inductance created in physical implementations. Short component interconnects are modeled as series resistances and shunt capacitances to ground. A physically long interconnection (more than 0.1λ) becomes a distributed series resistance/inductance with shunt capacitor conductance or a transmission line. Since the circuit designer only selects filter components with acceptable pass-band frequency response j the component losses primarily affect magnitude of the pass-band response. The nonideal component models are unique to each component value and component vendor. This example filter design and analysis is continued with the addition of a parasitic shunt capacitance to form a short interconnect model (see Figure 6.15 components C9 through C14). Some of this shunt parasitic capacitance can be absorbed as part of the filter resonator capacitance. However, the replacement of resonator capacitance with parasitic capacitance is not perfect because of the ground connected to each parasitic capacitance. This ground connection affects the filter response, especially when a shunt capacitance produces a parallel resonance with a series


177

connected mutual inductance. The response plot of Figure 6.15 shows a parallel circuit resonance at 950 MHz, well above the 450-MHz pass-band. The terminal ground associated with the single-ended port creates an imbalance in the filter design. The ground connection shorts out a portion of the parasitic capacitance and a portion of the balanced tapped-capacitor circuit. Some effect is seen in S11 and S21 as shown in the plots of Figure 6.15. These differences are a result of the parasitic capacitance associated with the component interconnections. With care in filter implementation (keeping nonideal circuit element parameters at a minimum), a practical single-ended mode to differential-mode filter design can be realized. Next, the measurement verification of the filter performance is compared to the design requirements. Single-ended s-parameter measurements were acquired for the completed design and converted into mixed-mode s-parameters.

C9 C = Cp2


C5 C = Css

C4 C = Csm1

Fc = 450 MHz BW = 50 MHz RI = 50 Ohms Cpx = 0.25 pF

C11 C = Cp3

C10 C = Cp1

L8 L = L1 R=

C12 C = Cp4

C6 L7 C = 2*Cssm2 L = L1 R=

L6 L = M/2 R=

C9 C = 2*Cssm2 C14 C = Cp1

L5 L = M/2 R=

Term2 Num = 2 Z = (2*RI) Ohm

C3 C = Csmm2

C13 C = Cp2

dB(S(2.1)) 0 −20

S(1.1)

−40 −60 −80 −100 0.1 freq (100.0 MHz to 900.0 MHz)

0.2

0.3

0.4

0.5 0.6 freq. GHz

0.7

0.8

0.9

1.0

Figure 6.15 Band-pass filter schematic including shunt parasitic capacitance absorbed into the filter design with one single-ended interface and one differential-mode or balanced interface.

178


C9 C = Cp2

C5 C = Css

Term1 C4 Num = 1 Z = RI Ohm C = Csm1

C10 C = Cp1

C11 C = Cp3

L6 L = M/2 L8 L = L1 R = R=

C6 L7 C = 2*Cssm2 L = L1 R=

L5 L = M/2 R=

C8 C = 2*Cssm2 C14 C = Cp1

C12 C = Cp4

C3 C = Csmm2

C13 C = Cp2



Figure 6.16 Single-ended to differential-mode band-pass filter simulation analysis using single-ended terminals on each port.

A three-port measurement includes the common-ground parasitics of the single-ended port. The mixed-mode s-parameters include single-ended to mixedmode and cross-mode terms at the differential-mode port. The measurement and analysis schematic is shown in Figure 6.16 and the filter design is modified to have a single-ended impedance of Rl and to have a differential-mode impedance of 2*Rl. There is common-mode impedance associated with the single-ended standard s-parameter measurement of Rl/2. This is significantly different from the infinite common-mode impedance in the analysis of the schematic of Figure 6.15. If both of the filter pairs of terminals were differential-mode, commonmode impedance termination would have no impact on the differential-mode response. However, the shared ground connections of the single-ended input, each of the parasitic shunt capacitors and the common-mode impedance affect the circuit differential-mode response. The differential filter response can be seen in the standard s-parameters shown in Figure 6.17. Figure 6.17 contains three parts, Figure 6.17(a) which graphs the magnitude of S12 and S13, Figure 6.17(b) which shows the polar plots of S22 and S32, and Figure 6.17(c) which graphs the magnitude plots of S23 and S32. The complete set of nine graphs can be seen in the simulation examples included on the accompanying CD. For a balanced system, S12 is equal to S13, this is not seen in the s-parameters of Figure 6.17(a). Although the out-of-band response is similar, the pass-band response of S13 has more insertion loss with great variation in the loss as compared to S12. Another indication of the


179

0

0

−5

−5

−10

−10

−15

dB(S(1.3))

dB(S(1.2))

imbalance from the single-ended port to the mixed-mode terminal 2 and terminal 3 is shown by the difference in the graphs of S22 and S33. The pass-band response seen in S23 and S32 indicates there is little isolation between these two differential-mode terminals. Although there are hints of the single-ended to differential-mode response in the standard single-ended s-parameters, conversion to mixed-mode s-parameters obtains an intuitive insight into the differential-mode response. The s-parameter conversion equation for the three-port filter standard s-parameters to mixed-mode s-parameters is the same conversion equation used for the 180° splitter/combiner in Chapter 5. Single-ended to differential-mode 2 × 2 s-parameters are defined as

−20 −25 −30

−15 −20 −25 −30

−35

−35

−40

−40 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 freq. GHz

freq. GHz

S(2.2)

S(3.3)

(a)

freq (100.0 MHz to 1.000GHz)

freq (100.0 MHz to 1.000GHz) (b)

Figure 6.17 Standard s-parameters (a) S12 and S13, (b) S22 and S33, and (c) S23 and S32 of the single-ended three-port schematic shown in of the single-ended three port.

Microwave Differential Circuit Design Using Mixed-Mode S-Parameters 0 −2

0 −2

−4

−4

−6

−6

dB(S(3.2))

dB(S(2.3))

180

−8 −10

−8 −10

−12

−12

−14

−14 −16

−16 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 freq. GHz

(c)

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 freq. GHz

Figure 6.17 (continued).

S ss 11 = S 11

) 2)(S

S sd 12 = ( 2 2 (S 12 − S 13 ) S ds 21 = ( 2

21

− S 31 )

(6.33)

S dd 22 = (1 2 )(S 22 − S 23 − S 32 + S 33 ) Single-ended to common-mode 2 × 2 s-parameters are defined as S ss 11 = S 11

) 2)(S

S sc 12 = ( 2 2 (S 12 + S 13 ) S cs 21 = ( 2

21

+ S 31 )

(6.34)

S cc 22 = (1 2 )(S 22 + S 23 + S 32 + S 33 ) The cross-mode terms associated with the mixed-mode port 2 are S cd 22 = (1 2 )(S 22 − S 23 + S 32 − S 33 )

S dc 22 = (1 2 )(S 22 + S 23 − S 32 − S 33 )

(6.35)

Single-ended to differential-mode and single-ended to common-mode mixed-mode s-parameter plots are shown in Figure 6.18(a, b). Like the 180° splitter/combiner the goal is to favor single-ended to differential-mode signal conversion and reject single-ended to common-mode signal transfer. This can be expressed as common-mode rejection Scs21, the conversion of a single-ended power-wave at port 1 to a common-mode power wave at mixed-mode port 2.


181

single-ended to differential-mode

0

Sss11

dB(Ssd12)

−10 −20 −30 −40 −50 −60 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 freq. GHz

freq (100.0 MHz to 1.000 GHz)

0

−20

Sdd22

dB(Ssd12)

−10

−30 −40 −50 −60 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 freq. GHz

freq (100.0 MHz to 1.000 GHz) (a)

Figure 6.18 Single-ended to (a) differential-mode and (b) common-mode band-pass filter simulation using single-ended terminals on each port.

This is expressed as a ratio of S ds 21 S cs 21 called the common-mode rejection ratio (CMRR), a ratio of the targeted circuit response compared to the unwanted response. Since the network configuration and component values are defined for the targeted pass-band j response the only parameter available for creating superior of the common-mode rejection is the common-mode termination impedance. Common-mode rejection is improved with short (0Ω) or open (infinite Ω) common-mode impedance. Infinite common-mode impedance has no affect on the differential-mode impedance or circuit response, so infinite impedance (open termination) becomes the obvious choice for the best common-mode-rejection ratio. Summary. Conversion of single-ended s-parameters to mixed-mode s-parameters limits the differential-mode and common-mode impedance to 2Z0 and Z0/2. Z0 is the single-ended reference impedance usually 50Ω. Conversion of

182

Microwave Differential Circuit Design Using Mixed-Mode S-Parameters single-ended to common-mode 0

Sss11

dB(Ssc12)

−10 −20 −30 −40 −50 −60 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 freq. GHz


0

−20

Scc22

dB(Scs12)

−10

−30 −40 −50 −60 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0


freq. GHz (b)

Figure 6.18 (continued).

standard single-ended s-parameters to arbitrary mixed-mode termination impedances is possible with an independent value for the termination impedance at each port. Conversion of standard single-ended s-parameters to mixed-mode s-parameters requires equal or balanced values for each of the two terminals associated with a mixed-mode port. Each of the mixed-mode ports can have independent differential-mode and common-mode impedance terminations associated with a mixed-mode s-parameter matrix. However, conversion of mixed-mode s-parameters to single-ended s-parameters limits the differential-mode to common-mode impedance ratio to a 4-to-1 factor. Conversion of single-ended standard s-parameter into mixed-mode s-parameters restricts the application of arbitrary mixed-mode impedance terminations. Calculations for arbitrary mixed-mode termination impedances can be performed on the individual differential-mode and common-mode 2 × 2 submatrix elements if the cross-mode terms are small enough to neglect any


183

cross-mode contributions to the circuit response. If the cross-mode terms cannot be neglected as is the case in this filter, one of the impedance terminations must be de-embedded from the mixed-mode circuit. For this single-ended to differential-mode filter example, the common-mode impedance terminations create part of the differential-mode response. Once the common-mode impedance termination response is de-embedded from the differential-mode submatrix (obtained from the single-ended standard s-parameter matrix), arbitrary differential-mode termination impedances can be applied to the differential-mode submatrix. This example filter circuit can be connected to active circuits on both ports, as the output load and/or the input load. The port reflection coefficient is close to zero within the pass-band and close to one outside of the pass-band, with a transition from zero to one between the pass-band and the stop-band. At a terminal of the filter circuit, a reflection coefficient of one reflects an incident power-wave back into the signal source circuit much like an oscillator feeds backs signal to its input. A filter differential-mode or common-mode reflection coefficient with magnitude approaching unity can create circuit instabilities when attached to an active circuit. Designers need to consider active circuit stability analysis in both the differential-mode and common-mode termination impedance over the entire circuit frequency range of operation. The frequency region between the pass-band and the stop-band, where the reflection coefficient is getting close to one and the insertion loss is still low is a region to be strongly concerned about stability. There are a number of differential-mode and common-mode circuit termination elements available to produce various termination impedances. Investigation of a circuit under various termination impedances in a simulation environment offers the most flexibility; the designer can use ideal broadband elements not realizable in a measurement environment. Alternatives to single-ended measurement systems have been built to better handle differential-mode and common-mode characterization and will be the subject material of future papers and textbook editions. A tapped transformer is one independent mixed-mode termination element presently available. The tapped transformer or the hybrid splitter/combiner provides separate terminal pairs for the differential-mode and common-mode impedances that are isolated and independent from each other. This hybrid splitter/combiner was reviewed in Chapter 5. The presentation included standard single-ended and mixed-mode s-parameters. A simple alternative hybrid configuration uses three-port terminations on each mixed-mode port that are configured in a π-termination or T-termination network. As a π-network, the differential-mode termination is independent of the common-mode termination impedance. In a balanced network, the T-network common-mode termination impedance is independent of the differentialmode termination impedance. However, care must be taken in mixed-mode

184


termination impedances that are arbitrary and in the analysis of networks that are not balanced such as the filter example of this section. Integrated circuit implementations offer higher impedance environments with close to infinite common-mode termination impedances that are not possible in single-ended microwave environments. These integrated solutions realize volume production of circuits in RF/microwave applications and promise to continue increasing frequency in the future. A useful future measurement tool would be single-ended and mixed-mode probed systems for high-impedance oscilloscope power-wave measurement and analysis systems.

6.4 Dual Directional Coupler A directional coupler is a microwave component that samples a small portion of the power-wave in each direction (incident and reflected) along a conductor. Directional coupler designs for high-level signal sampling, up to 3 dB (such as a Lange coupler), were covered in Chapter 5 as splitter/combiner components. Couplers designed for a low-level signal sampling are used in the wireless communications transmitter outputs to monitor the RF power amplifier to antenna interface. The circuit objective is to maintain a maximum power-level flowing into the transmitter antenna over a number of variable environmental conditions such as battery voltage, temperature, and the antenna impedance. Other mixed-mode applications across the military and commercial microwave industry include wideband phase shifters, balanced amplifiers, mixers, transmitter linearization feedback system, power-wave measurement systems, and beamforming networks for array antennas. Figure 6.19 shows a dual-directional coupler implemented with microwave-transmission lines and the cross-coupled arrow symbol of a dual-directional coupler. The ideal standard s-parameter network representation of the dual-directional coupler of Figure 6.19 is   0    0   S = jc sin θ   2  1 − c cos θ + j sin θ  1−c2   1 − c 2 cos θ + j sin θ 

0

0 1−c2 1 − c 2 cos θ + j sin θ jc sin θ 1 − c 2 cos θ + j sin θ

jc sin θ 1 − c 2 cos θ + j sin θ 1−c2 1 − c 2 cos θ + j sin θ 0

0

1−c2

 

1 − c 2 cos θ + j sin θ 

   1 − c 2 cos θ + j sin θ    0     0   jc sin θ

(6.36)

The coupling term, c, describes signal sampling between the ports as shown in Figure 6.19,


185

2

3

1

4 θ°

Figure 6.19 Uniform dual-directional coupler implemented with coupled microwave-transmission lines.

c = S 31 = = S 24

b3 a1

b = 2 a4

= S 42 = a2 = a3 = a4 = 0

= S 13 a1 = a2 = a4 = 0

b4 a2

b = 1 a3

a2 = a3 = a4 = 0

(6.37)

a1 = a2 = a4 = 0

Directivity, D, is a measure of coupler quality and ideally its value is infinite; infinite D occurs when no signals exit from the isolated port. With port 1 of Figure 6.19 defined as the input, the forward-wave is coupled to port 3 and port 2 is the isolated port. Also, the backward-wave is coupled to port 2 and port 3 is the isolated port, D 31B = 20Log

S 31 S 21

, D 21 F = 20Log

S 31 S 21

(6.38)

The directional coupler of Figure 6.19 has a symmetrical design and is also called a uniform coupler design. Directional couplers can be implemented in many different forms including nonuniform and tapered structures. Design specifications can vary and include additional functions such as filtering, selectivity, and phase velocity compensation. An inhomogeneous media consisting of a dielectric substrate and air above the substrate is often used for building directional couplers. The design and analysis of microstrip conductors in an inhomogeneous media is one of the main problems in realizing directional coupler components. Microstrip cannot support a true TEM propagation-mode, and the resulting quasi-TEM propagation-mode creates dispersion. Microstrip characteristic impedance and velocity of propagation are a function of the conductor dimensions. Mixed-mode s-parameters describe coupled-transmission-line design parameters and can be used to extract of mutual-coupling reactance, self reactance, complex characteristic impedance, and complex

186


propagation constants in a mode-specific model or mode-independent formats. Mixed-mode s-parameters can aid in microstrip and directional coupler design. A design example of coupled transmission lines is reviewed in the enclosed disc with a design file for Agilent’s Advanced Design Simulator (ADS). The CD-based example includes a set of mixed-mode templates for application to other mixed-mode applications, such as coupled transmission-line-filter structures.

6.5 Differential Isolator An isolator is a two-port device that transfers energy from input to output with little attenuation and from output to input with high attenuation. The isolator symbol is shown in Figure 6.20 and the isolator circuit can be derived from a three-port circulator by simply placing a matched load that produces no power-wave reflection on one port. Junction isolators are made in this manner. Field displacement isolators and resonance isolators are strictly two-port devices and do not have a third port. This section will explore a resonance isolator design as an exercise in mixed-mode s-parameters and differential circuit design. Isolators are used to separate circuit impedance variations from a circuit output or input. Isolator applications include separating transmitter outputs from antenna loads or antenna input signals, removing oscillators load impedance variations that can modulate the oscillator operating frequency and protecting low-noise amplifiers inputs to isolate the local oscillator signal from the antenna. Isolators have become low cost and small-size components and can be employed in products where they may not have been considered before. Isolators are unique passive RF devices with a nonreciprocal transfer function characteristic. The forward and reverse transfer functions are not equal as is

Input

Figure 6.20 Two-port isolator circuit symbol.

Output


187

expected with most passive devices. Ideally, the nonreciprocal characteristic of the isolator is the phase. The forward signal-transfer function has 180° phase offset from the reverse signal-transfer function. For example, a two-port circuit with the forward s-parameter S21 with magnitude of one and phase of 0° and a reverse s-parameter S12 with a magnitude of one and phase of 180° would make an ideal isolator with nonreciprocal characteristics, 0 −1 S std =   1 0 

(6.39)

This ideal nonreciprocal device s-parameters converted to Y-parameters becomes Y

std

 0 1 =   −1 0 

(6.40)

A resistor is placed in parallel with the forward/reverse propagation path with a value chosen to provide a feedback signal that exactly cancels the 180° reverse signal, Y12 of the nonreciprocal component. The normalized resistor Y-parameter matrix is Y

resistor

0 −1 =  0 0 

(6.41)

The result is a neutralized network with reverse isolation S12 equal to zero. The output is isolated from the input. Changes on the output port impedance have no effect on the input impedance S11 of the forward transfer function S21. Y

std

=Y

resistor

 0 1 0 −1  0 0  = +  =   −1 0  0 0   −1 0 

(6.42)

The neutralized y-parameters are then converted to the ideal isolator s-parameters, 0 0  S isolator =   1 0 

(6.43)

These real isolator s-parameters are limited by their reactive component resonance bandwidths and loading relationships; this bandwidth limitation is

188


similar to that of a coupled-resonator filter. Losses in the implementation will reduce the forward transfer S21 to a value less than one which creates the isolator insertion loss. For the example circuit of Figure 6.21 reverse isolation is limited to the effectiveness of the signal cancellation of the resistor and nonreciprocal signals and S12 of ≅ −20 dB is a practical design and measurement limitation for this circuit. The isolator feedback resistor was chosen to provide good isolation over operational bandwidth in spite of the presence of magnetic losses, dielectric losses, and parasitic circuit elements which varied with frequency. However, other physical implementations of isolator structures will have different S12 limitations. In an isolator as in a filter function, the out-of-band impedance, S11 and S22, go from the ideal zero or matched value to one, the maximum signal reflection. Expansion of the two-port ideal isolator s-parameters to a differential implementation is easier to visualize once the physical implementation is reviewed. Figure 6.21 shows a stacked drawing of the isolator component assembly using low-cost PC boards to insulate and provide the two connection conductors looping a ferrite material at right angles. The resulting circuit is a four terminal or four single-ended ports comprised of two coupled inductors similar to the dual-resonator filter reviewed in Section 6.3. Two discrete neutralized resistors are mounted on the PC board across the coupled inductors along with two discrete capacitors to resonate with the inductors at the pass-band center

Magnet

PC Board Insulator

Discrete Resistor a second resistor is on the PC Board underside

Gnd Port 2 Gnd Port 1 Gnd

Ferrite

PC Board Insulator

Gnd Port 4 Gnd Port 3 Gnd

Figure 6.21 Physical implementation of isolator structure using low-cost PC-board construction.


189

frequency. The circuit model of the differential isolator is shown in Figure 6.22, including the neutralization resistors R13 and R24. The ideal standard singleended s-parameter representation of a differential isolator is shown in Figure 6.23 with a differential isolator symbol and signal flow arrows. Conversion of the differential isolator standard s-parameters to mixed-mode is accomplished with the M-matrix operator, S mm = MS di M −1 1 − 1  1 0 0 M = 2 1 1 0 0 

S mm

0 1 = 0 0 

(6.44)

0 0 1 −1  0 0 1 1 

(6.45)

0 0 0 0 0 0  0 0 0 0 0 0 

(6.46)

The design analysis of the isolator physical construction begins with single-ended measurements of the four-port isolator without the resistors and resonator capacitors. These standard s-parameters are then converted to mixed-mode s-parameters and analyzed over frequency for Gtmax using R13

Port 1

Port 3

C1

L1

L2

C2

Port 4

Port 2 1:1

R24

Figure 6.22 Differential resonate isolator circuit model, including the neutralization resistors R13 and R24.

190

Microwave Differential Circuit Design Using Mixed-Mode S-Parameters S31 Port 1

Port 3

S21 Infinite Isolation

S12

Sdi =

0

0

0

0

0

0

0

0

1

0

0

0

0

1

0

0

Dissipated in the Isolator

Dissipated in the Isolator

Port 4

Port 2

S42

Figure 6.23 Differential isolator symbol with standard single-ended s-parameter network representation.

simultaneous-conjugate-match-matrix algorithms on the differential-mode submatrix. Figure 6.24 shows the forward-mode and reverse differential-mode s-parameter plot of Sdd21 and Sdd12 without the neutralization resistors and resonating capacitors. Figure 6.24 displays the nonreciprocal relationship between the forward and reverse differential-mode s-parameters. Sdd21 the forward differential-mode response is the conjugate of Sdd12, the reverse differential-mode response. Maximum Gtmax or minimum insertion loss is measured at marker M1 (405 MHz) shown in the plot of Figure 6.24. The next isolator design step selects the neutralization resistance value, resonant capacitor value, and the termination impedance. This can be done using microwave design tools and the Gt max analysis results. Summary. Expansion of a single-ended circuit into a differential-mode circuit

is often accomplished within the same design. A single-ended design often becomes a differential-mode with the elimination of the reference ground connections. This was demonstrated with the dual-resonator filter and the resonantisolator circuit. An ideal differential-mode circuit that is balanced will have no cross-mode signals, no conversion of differential-mode signals to commonmode signals or conversion of common-mode signals to differential-mode signals. With zero magnitude cross-mode terms, there is isolation between differential-mode and common-mode submatrices permitting independent matrix operations such as simultaneous conjugate matching, stability analysis, and power circles.

191

A

B


B1

Sdd 21 Sdd 12

M1

M1

Y-FS = 0.25 Y-FS = 0.25

A1

45.0 MHz

M1 M1 = Z0*(941.53E-03+j67.699E03) I1 = 405.00E+06

FREQ

2.045 GHz

M2 M1 = Z0*(1.0801E+00-j70.663E-03) I1 = 405.00E+06

Figure 6.24 Measured forward and reverse differential-mode s-parameters showing the nonreciprocal relation Sdd21 = Sdd12.

References [1]

Chen, W. K., (ed.), The Circuits and Filter Handbook, Boca Raton, FL: CRC Press, 1995, pp. 532–549.

[2]


[3]

Gonzalez, G., Microwave Transistor Amplifiers: Analysis and Design, 2nd ed., Upper Saddle River, NJ: Prentice Hall, 1997, p. 62.

[4]

Carson, R. S., High Frequency Amplifiers, New York: Wiley-Interscience, 1975, pp. 7–9, 167–169.

7 Mixed-Mode and Time Domain 7.1 Introduction The small-signal frequency-domain network representation of microwave circuit responses meets most RF/microwave circuit designers’ needs. The major exception is for large-signal microwave circuits such as power amplifiers, mixers, and oscillators. RF/microwave frequency-domain representations are typically s-parameter-based and can be generated via microwave circuit simulations or s-parameter measurements. However, high-speed digital circuit waveforms are not easily characterized and represented in the frequency domain. Digital circuit designers require signal-integrity parameters associated with these high-speed digital circuits. Digital signals can be comprised of multiple harmonically related frequency components; the fundamental frequency and the odd-order harmonics (ideally, no even-order harmonics) can extend to very high microwave frequencies. In communication circuits, encoding information as a digital binary signal on a signal-carrier frequency requires a signal bandwidth spread about the fundamental digital-signal-carrier frequency. Characterization of a high-speed digital network requires the circuit response over all signal frequencies simultaneously. Digital circuits signal transfer can change with time; digital circuits do not have easy-to-analyze linear transfer functions. However, the digital data transmission media between the active digital I/O drivers can be built with linear microwave-transmission circuits. This chapter investigates techniques that can model a time-varying digital transmission through linear microwave-transmission circuits. In the field of high-speed digital design, input and output time-domain response analysis tools include bit error rate (BER), error vector magnitude (EVM), and eye diagrams described in Chapter 1. These signal-integrity tools 193

194


process the high-speed nonperiodic digital circuit response in the time-domain into meaningful digital performance parameters. Time-step nodal analysis and impulse-response convolution are two time-analysis methods that can be applied to linear time-invariant networks where mixed-mode and standard s-parameters are used. Often, time-step nodal analysis is used in analog circuit simulators but can have problems modeling distributed circuit response. The mixed-mode or standard s-parameters data can be used to extract lumped R, L, C, and G elements as defined by Telegrapher’s transmission-line relationships. This time-step analysis process is often limited in application by computation resource requirements and most time-step circuit simulators cannot handle complex frequency-domain functions that represent the transmission line R, L, C, and G terms. Impulse response convolution can model the distributed and lumped passive circuit responses from frequency-domain data. The linear time-invariant impulse-response representation of a passive element network can also be developed from the mixed-mode s-parameters. Network response to a number of nonperiodic signals such as impulse, step, and digitally encoded data signals are transformed through the network impulse response to obtain the circuit-output response. Two of these time-response techniques used in microwave-transmission analysis are time-domain reflectometry (TDR) and time-domain transmission (TDT). Impulse response-based convolution can be better for modeling critical signal paths since it can include a wide variety of distributed circuit effects. However, impulse response-based convolution is in general too slow for using in very many nodes in a circuit simulator. This chapter will focus on the impulse response-based time-domain analysis of linear time invariant microwave transmission networks. The data used to determine the impulse response will come from mixed-mode s-parameters. The discussion will include a review of microwave circuits’ ac responses, the ac response transformation to an impulse waveform, and the use of impulse response for general circuit analysis. Time-domain reflectometry and transmission analysis will be reviewed along with how to identify parasitic components in the signal path and how to use de-embedding (or subtract) the effects of the parasitic components. The circuit impulse response waveforms can be used to determine: • Digital system signal-integrity parameters; • Microwave circuit-transient response; • Circuit model extraction and validation.

Much of this chapter will review the use of Fourier analysis techniques to calculate circuit-transient response from s-parameter circuit data.


195

7.2 Steady State AC Network Response The network of Figure 7.1 can be represented with a set of four transfer functions in terms of its 2 × 2 power-wave-based s-parameters where the input signals at port k are defined as the sum of time-domain power waves x k (t ) = A ω e jωt at a frequency f = ω 2 π. The set of complex exponential power waves summed using superposition is x k (t ) = A1 e j ( ω 1t ) + A 2 e j ( ω 2t ) + A 3 e

j ( ω 3t )

+K

(7.1)

If the input signals are at a single frequency f, the output time-domain power-wave will be also be a complex exponential power wave at the input frequency defined as y k (t ) = As e j ( ωt + θ s )

(7.2)

where As is the network power-wave amplitude responses and e jθs is the network power-wave phase responses; these responses directly relate to s-parameters. The signals of (7.2) are time-domain periodic steady-state signals with period 2 π ω = 1 f . The output amplitude of yk(t) is scaled by a constant and has a phase shift but is the same frequency as the input signal. The network response is a complex value representing amplitude gain (or loss) and a phase shift of the input signal. For a linear time-invariant network, the output-to-input transfer function, y(t )/x (t ), is the ac steady-state frequency

x1(t) = e j (ωt) Network S11

y1(t) = A12e j (ωt+θ12)


y1(t) = A11e j (ωt+θ11)

x1(t) = e

j (ωt)

Network S12

y2(t) = A21e j (ωt+θ21)


y2(t) = A22e j (ωt+θ12)

Figure 7.1 Linear time-invariant-network power-wave-response flow diagrams in terms of amplitude and phase s-parameters.

196


response. The s-parameters are a ratio of the output-to-input power waves, the power-wave frequency response. Every port has a power-wave reflection response SKK, and each pair of different ports has a power-wave-transmission response SLK. These s-parameter responses are a function of the port-impedance values. If all of the port impedance values are equal (typically Z0), power waves can be expressed in terms of ratios of input-to-output voltages or currents. The ac network transfer functions can be applied to mixed-mode or standard s-parameters. Arbitrary port-impedance terminations for any N-port network can also be applied to standard or mixed-mode s-parameters ac transfer functions. Chapter 7 will present a basic introduction to s-parameters expressed with periodic steady-state time-domain signal sources. These s-parameters are defined with port-termination impedances that are the same value for the port as the circuit signal source or circuit loads. Typically, during circuit characterization, s-parameters are stepped over a range of frequencies; the s-parameter data is measured and analyzed (calibrated) at each frequency. A plot of the s-parameter magnitude and phase in the y-axis versus frequency in the x-axis is known as the ac transfer function. The next step is to extend this s-parameter network response to nonperiodic signals such as impulse and step signals.

7.3 Impulse Response Expressing the entire input-signal-frequency response in the form of one input time-domain signal provides a compact analysis tool for nonperiodic input signals. Consider the input signal of a circuit with frequency response or s-parameters at equal frequency steps (fstep) up to a maximum frequency (fmax): x( f

f max f step

)= ∑

n =1

cos( 2 πnf step

)

(7.3)

Each signal has an equal magnitude and initial phase value represented in the plot of Figure 7.2 as a two-sided frequency spectrum composed of discrete elements or a continuous function. In fact, the spectrum is zero for f > f max a band-limited set of signals. The input frequency-domain signal of Figure 7.2 is defined as x( f

)=

f 1 Π 2 f max 2 f max

(7.4)


197

Also, shown in Figure 7.2 is the inverse Fourier transformation of the series of equal amplitude sinusoids to a single time-domain waveform, x (t ) =

sin ( 2 f maxt )

(7.5)

2 f maxt

The side lobes of the sin (t ) t function are emphasized in Figure 7.2 and are well below 10% of the t = 0 signal magnitude in the time domain. Most of the band-limited impulse function is within the −1 ( 2 f max ) and 1 ( 2 f max ) time-domain points on the x-axis. This band-limited impulse function can be approximated as a triangular or rectangular pulse of width and area equal to one and pulse edges at t = −1 ( 2 f max ) and t = +1 ( 2 f max ). The time-domain signal of Figure 7.2 represents an entire series of frequency-domain sinusoid signals in either a discrete or continuous frequency analysis. Applying the time-domain signal of Figure 7.2 at the input of a network is equivalent to applying a band-limited series of frequency-domain sinusoids at the input. The output result is a time-domain signal composed of the entire series of sinusoid signals each scaled and shifted by the network transfer function or s-parameters. Inverse Fourier transformation of the network frequency response or s-parameters from the frequency domain to the time domain results in an output time-domain signal that is the time-domain response of the input time-domain signal of Figure 7.2. This is the band-limited impulse response of the network.

continuous function

−f

amplitude

−fmax

discrete components

fstep 2fstep 3fstep

fmax

f

discrete impulse component δ(t) = 1

continuous function = sin(t) / t

−t

t −1/fmax

−1/2fmax

1/2fmax

1/fmax

Figure 7.2 Frequency-domain inverse Fourier transformation to time-domain impulse signal.

198


As the bandwidth or fmax increases the time-domain function of Figure 7.2 approaches a “δ” or an impulse with increasing amplitude and decreasing pulse width in the time-domain. As mentioned before, this impulse timedomain function can be approximated as a rectangular pulse with edges at t = −1 ( 2 f max ) and t = +1 ( 2 f max ) and unit area equal to one.

7.4 Representation of Signals by a Continuum of Impulses An arbitrary time-domain function of voltage, current, or power can be approximated in an interval from –T to T by a closely spaced series of rectangular pulses. The height of each pulse is equal to the value of the function at the center of the pulse. This is illustrated in Figure 7.3. As the width of the pulses, ∆T approaches zero, the accuracy of the approximate representation of the function f (t ) improves. The pulse located at the center t = k∆T can be expressed as ∆T  ∆T    f (k∆T )u t − k∆T +  − u t − k∆T −    2 2 

  

(7.6)

The approximation of f (t) can be written as f (t ) =

N

∑

k =−N

∆T  ∆T    f (k∆T )u t − k∆T +  − u t − k∆T −  2  2  

   (7.7) 

where the total number of pulses is 2N +1 = 2T/∆T +1. Multiplying the (7.7) relationship by ∆T/∆T yields

f(−∆T)

f(t) f(0)

−T

−3∆T 2

−∆T 0 2

∆T 2

Figure 7.3 Signal approximation as a series of pulses.

f(∆T)

3∆T 2

f(2∆T)

t T


f (t ) =

N

∑

k =−N

∆T  ∆T    u t − k∆T + 2  − u t − k∆T − 2 f (k∆T ) ∆T

199

  

(7.8)

As ∆T is made smaller the bracketed factor in (7.7) approaches δ, an impulse function located at t = k∆T. In the limiting case, as ∆T → 0, N becomes infinite. However, for a constant T, the product (2N ) ∆T remains constant and equal to 2T. The product k∆T takes on all possible values in the interval −T < t < T and can be considered to be a continuous variable λ. Likewise, the increment ∆T approaches a differential d λ. In this limiting case, the summation becomes an integral with respect to λ over the range −T to T and f (t) becomes f (t ) =

T

∫

−T

f ( λ )δ(t − λ )dλ, −T < t < T

(7.9)

The function f (t) is represented as the summation or integral of a continuum of impulses that have strengths at any time t of f (t)dt. Increasing the network analysis bandwidth or frequency range, improves the accuracy of the predicted time-domain impulse signal response associated with the inverse Fourier transform. This results in an improved representation of arbitrary time functions as input signals applied to the network.

7.5 Impulse Response The function f (t) defined in Section 7.4 can be defined over the complete time , by letting T f (t ) =

∫

∞

−∞

f ( λ )δ(t − λ )dλ

(7.10)

This relationship defines the unit impulse response. In linear system theory, the impulse response h(t) of a system is defined as the output that results when the input is a unit impulse, h (t ) ≡ y (t ), when

x (t ) = δ(t )

(7.11)

The response to an arbitrary input, x(t) is then found by convolving h(t) with x(t), f (t ) = h * x (t ) =

∫

∞

−∞

f ( λ )δ(t − λ )dλ

(7.12)

200


Equation (7.12) also is called the superposition integral and is the basis of time-domain circuit analysis. This analysis method requires knowing the circuit or network impulse response as well as having the ability to carry out the convolution operation. For a linear system represented with standard or mixed-mode s-parameters, the circuit power-wave impulse response can be determined with the use of the Inverse Fourier transformation. As the frequency range of the s-parameter representation increases, the accuracy of the calculated impulse response improves. Each s-parameter data provides a separate power-wave impulse time-domain response. The power-wave time-domain response can be associated with a port reflection response or power transfer between a circuit input port and circuit output port, h KK (t ) = F −1 [S KK =

∫

∞

−∞

]

S KK e jπft df , hS KL (t ) = F −1 [S KL ] =

∫

∞

−∞

S KL e jπft df

(7.13)

For example, each of the 16 s-parameters (a 4 × 4 set of standard or mixed-mode s-parameter set) can be transformed into a set of 16 power-wave-based impulse-response waveforms. Each response waveform is a time-domain representation of the port reflection or transmission output to an input impulse signal. The time-domain impulse response waveform is defined by the frequencies used in compiling the s-parameter terms. This frequency-domain to time-domain transformation is shown in Figure 7.2. Windowing functions can be used to condition the frequency-domain data prior to transformation to the time-domain to overcome the unrealistic truncated edge effects associated with a finite s-parameter data set. For an ideal lossless transmission line with source and load termination impedances equal to Z0, the impulse-response reflections are hS KK = 0 while the impulse response transmissions are hS KL = hS LK = 1. There are no port reflections in an ideal transmission line with no discontinuities or mismatch at the ports. The simplest reflection calculation is for constant load resistance, Rload that is not Z0, the characteristic impedance. A pure resistance results in a scaled copy of the incident impulse signal; the copy is multiplied by a positive sign for Rload Z0 and minus sign for Rload Z0. For series connected transmission systems with different characteristic impedances, the input port-reflection waveform would have multiple signed copies of the incident impulse signal separated in time as shown in Figure 7.4. In an ideal lossless transmission system, the time-domain transmission between two ports replicates the incident impulse signal shifted in time. The time shift represents the overall frequency-band propagation delay across the transmission line or a “group delay.” If the signal propagation delay is equal at

Mixed-Mode and Time Domain Z0

Z1

201 Z2

Series connected transmission system

Incident impulse signal

reflection impulse response

hS (t) KK

−t

t

Incident step signal

Z − Z0 Z + Z0

reflection step response

TDR = ∫hS (t)dt KK

−t

Z1

Z0

t

Z2

Figure 7.4 Series connected transmission system and the associated impulse and step-response time-domain plots.

all frequencies then the output impulse response is a copy of the input impulse signal shifted in time. Time delay variation with frequency causes impulse waveform distortion. The group delay is a measure of the time delay or phase shift across the frequency bandwidth of a signal. A transmission line with a nonideal frequency response (this includes losses) results in a more distorted output for an impulse input. The objective of a transmission system is to transport signals between two places, reproducing the input signal exactly at the output with no changes in the amplitude or phase response. This becomes a challenge as the communication signal bandwidth increases beyond the limits of the transmission system. This is what is happening as the active device (transistor) performance increases into microwave/millimeter-wave range. Time-domain analysis of nonperiodic signals such as digitally encoded transmissions requires: (1) the determination of a circuit’s power-wave-impulse response from standard or mixed-mode s-parameters, and (2) convolution of the circuit-impulse response with the input signal. The time-domain analysis enables digital communication circuit parameter extraction, such as EVM and eye diagram values from s-parameters, where the s-parameters can be measured

202


values using standard single-ended network analyzers. These measured singleended s-parameters can then be postprocessed with arbitrary port termination impedance, as mixed-mode s-parameters, or a combination of both arbitrary port-termination and mixed-mode s-parameters. In summary, postprocessed s-parameters can then be processed into time-domain power-wave-impulse responses for the analysis of nonperiodic signals. What results is a method of time evaluation of any form of nonperiodic input signals in any linear network with arbitrary terminations. The ability to evaluate linear network performance under a wide range of what-if conditions, is possible without assembling and time-domain measurement equipment. The analysis input is frequency-domain s-parameter measurements.

7.6 Step Response and TDR One early method for the evaluation of a transmission-line network and its load involves applying a sinusoid wave and measuring the signal level caused by the incident wave and the reflected waves along the line. The reflected waves result from discontinuities along the transmission-line network. From these measurements, the standing-wave ratio is determined and used as a figure of merit for the transmission-line-signal integrity. When the transmission-line network includes more than one discontinuity, the standing-wave ratio measurement fails to isolate these discontinuities. This standing-wave measurement method is automated with the network-analyzer-based s-parameters and determines the port-reflection coefficient. However, to separate multiple discontinuities along a transmission-line network, the frequency-domain s-parameters will need to be transformed into the time domain. The inverse fast Fourier transform (IFFT) is used to transform port power-wave s-parameters into the power-wave impulse responses. A continuous series of power-wave-impulse response signals is built to provide a power-wave step-signal response. The power-wave step-signal response is used to analyze the step response of a transmission-network port. What results is a time-domain signal representing the combination of incident power-wave signals and reflected power-wave signals, isolating the reflections along the time axis of the TDR measurement. A TDR functional block diagram is shown in Figure 7.5 with a combined step generator and time-domain signal sampler as a signal source. This signal source is connected to one port of a transmission-line circuit for analysis of the transmission-line electrical integrity. The electrical integrity is a measure of the continuous characteristic impedance along the transmission-line length free of discontinuities and impedance loading mismatch. An example TDR signal is shown in Figure 7.6 for a matched and mismatched load condition. T is the


203

time sampling

Er

Ei

transmission line network

step generator

ZL

D transmission system

Figure 7.5 TDR functional block diagram. Er = 0

Ei Ei + E r

t 0

T

Figure 7.6 TDR signal examples with Er equal to zero and a mismatch case with Er not equal to zero.

transit time from source-monitoring point to the load mismatch and back again, measured on the time sampling block of Figure 7.5. The reflected wave is easily identified since it is separated in time from the incident wave. This time is also useful in determining the length of the transmission system from the monitoring point to the mismatch. Physical identification of the cause of the mismatch reflection can be used to improve the transmission system design, D = vpT 2

(7.14)

D is the physical length of the transmission system to the mismatch event and vp is the velocity of propagation. The velocity of propagation is assumed to be constant along the transmission network. Knowledge of Ei and Er allows ZL to be determined in terms of Z0 the characteristic impedance of the transmission network, ZL = Z0(Ei + Er)/(Ei − Er). Port s-parameters or reflection coefficients can be determined from the relationship,

204


ΓKK =

Z − Z0 Z + Z0

(7.15)

where Z0 is the characteristic impedance of the measurement system or impulse launching system and Z is the impedance along the signal transmission network. This relationship can be used to calculate the network TDR plot. For Z = 0 or a short, the reflection coefficient is –1 or the inverse of an impulse incident signal. A continuous flow of incident impulse signals started at a time t = 0 represents an incident step signal applied to a transmission-line network. A short termination on the output port of this transmission-line network results in a continuous flow of reverse impulse signals after t2 with an inverse voltage to that of the input impulse signal. Once the continuous flow of reverse-impulse signals begin to Incident impulse signal at t = 0

t

Series of impulses representing incident step signal t = t1 t

t = t2 time it takes for incident signal to reach short circuit termination

t

Series of reflected reverse impulses at t = t3

time t = t4 = 2*t2 t

Composite signal at input line sampling block goes to zero

Figure 7.7 Sequence modeling port-step response implemented with a series of impulse incident signals and short-circuit-termination reverse-reflection impulse signals.


205

coexist along the transmission line with the forward-impulse signals, the composite is a zero-magnitude power-wave signal. This zero-magnitude power wave is what would be measured at the time-sampling block shown in Figure 7.5, after a delay (t4 = 2t2) equal to twice the delay of the transmission network, t2. This sequence of series impulse responses is shown in Figure 7.7. For open-termination impedance, Z, the reflection coefficient would be +1, a reverse-impulse signal equal to the incident-impulse signal. For the open-termination case, the composite incident and reflected signal value at the input sampling block would be equal to twice the incident wave value after 2t2. Thus, a real (resistive) termination impedance between zero and infinite magnitude would result in a scaled version (between 0 and 2 times) of the incident impulse signal. Analysis of the reflection response can be used to isolate discontinuities along a transmission network, determine its impedance model, and evaluate performance if the discontinuity is removed. Time gating is a process that can isolate and remove discontinuities associated with the interface to a network under evaluation. In time gating, the impulse response associated with the isolated discontinuity is identified and subtracted from the network response. This modified impulse response (without the isolated discontinuity effects) is then processed into the TDR step response or convolved with alternate input signals to obtain the de-embedded output signal response. Time gating is useful to overcome measurement system imperfections in the signal transmission system. A discontinuity is often modeled as a shunt capacitance at a point along the transmission network. An incident impulse voltage signal on this capacitance results in a reverse voltage due to the capacitor resistance to instantaneous voltage changes. The capacitor responds with a current and storage of the incident signal energy. This stored energy within the capacitor is returned to the network as a reflected doublet pulse. A similar impulse response is seen with a series inductance that also is common as transmission network discontinuities. Ideal impulse and step responses of shunt capacitance and series inductance are shown in Figure 7.8.

step

series inductance

shunt capacitance

impulse

Figure 7.8 Ideal step and impulse responses of a series inductor and a shunt capacitor.

206


The reflection response of a load termination, Z can be determined by writing the reflection coefficient in terms of the Z. For a series resistance-inductance or parallel resistance-capacitance Z is R + sL and

R 1 + sRC

(7.16)

The termination impedance is then multiplied by the Laplace transform of an incident step function signal, Ei,: Ei s

(7.17)

This frequency-domain product is then transformed into the time-domain to solve the expression for the reverse reflection wave, Er. The reverse-reflection wave Er is effected by the termination impedance, Z and the reflection coefficient, . For the series resistance-R-inductance-L termination network, the reflection signal, Er, is  R − Z 0  R − Z 0  −t τ  L + 1 + E i 1 + , τ= e  R + Z0   R + Z0  R + Z0 

(7.18)

In (7.18), is the transit-time constant of the series resistance-inductance network that includes Z0, the network characteristic impedance. For the parallel resistance-R-capacitance-C termination network, the reflection signal, Er, is  R − Z 0  −t E i  1 +  (1 − e R + Z   0 

τ



), 

τ=

Z 0R C Z0 +R

(7.19)

These two networks are shown in Figure 7.9 along with port step-response reflection for each transmission network. The impulse and step-reflection responses can be used to determine a great deal of information about the signal behavior along a transmission network. Discontinuities can be isolated, characterized, and de-embedded from the network. These are the basic tools for evaluation of any linear network in the time domain using frequency-domain s-parameters. These time-domain tools can be used on any linear network including narrowband filters. However, they are most often applied to transmission-line networks where very broadband frequency response is expected. Broadband transmission systems are being implemented in every electrical medium available from printed circuit board to virtually all integrated-circuit


Ei

207

Er R

Ei

t 0

0 t

Ei

R − Z0 Ei 1+ R + Z0

−Ei

L

Er Ei 1+

R − Z0 R + Z0

R

C

Figure 7.9 Port-step response reflection for a transmission network with a reactive series resistance-inductance and parallel resistance-capacitance termination impedances.

technologies. Signal-transmission systems include interconnections across different electrical interfaces such as wire bonds, socket connectors, and trace conductors. The impulse and step-reflection response analysis offers many approaches to optimized design and analysis of these systems. However, it is not easy to determine what the impact of a discontinuity is on the specific communication parameters in a network system or any other application. In Section 7.7, impulse-transmission response and nonperiodic signal convolution are introduced and used to examine signaling parameters. Additional signal transmission system issues are associated with the transmission system environment. These include undesired coupling to adjacent transmission systems, power supply conductors, parasitic reactive components, and grounding systems. Impulse and step-reflection responses can be used to evaluate and optimize these undesired coupling issues.

7.7 Impulse Transmission Response and TDT Although impulse response can apply to port-reflection waveforms, this section is focused on impulse transmission response between two ports. This represents the signal transfer that is intended or not intended between two ports. S-parameters are a representation of the frequency-domain-response reflection and transmission at and between each port. The s-parameter frequency-domain representation is not enough to characterize nonperiodic signal parameters such as the eye opening of digital circuits. Some of the microwave-circuit-transmission properties of interest are differential (balanced), cross-mode (mixed-mode

208


conversion), and single-ended responses. Isolation and crosstalk is another important transmission analysis that includes a variety of physical elements such as supply and ground conductors. Nonperiodic signals are not present in all of these transmission cases; nonperiod signals require use of impulse response and convolution with a unique input signal. However, knowing about the tools that analyze linear networks in the time domain, equips the designer to handle unique digital applications using s-parameters network representations. Digital transmission systems high-speed performance is often limited by the packaging and interconnect distributed discontinuities and the transmission conductor and not by the switching speed of semiconductor devices. Distributed transmission system circuit elements effects include crosstalk, ground bounce, supply noise, delay distortion, rise time degradation, fall time degradation, frequency-dependent losses, signal overshoot, and ringing. Designing higher speed (data rate) performance is often focused on PCB layout, IC layout, and conductor topological properties that relate to improved signal propagation. Increased device switching rates may not be an issue at all. The transmissionline-network frequency-dependent effects such as loss, dispersion, and discontinuities need to be modeled in the time domain for determining the digital-processing parameters of interest. Some simple examples of high-speed digital transmission systems and associated crosstalk are shown in Figure 7.10. These examples include differential and common-mode signal transmission, singleended to mixed-mode crosstalk (interference), and single-ended or mixed-mode interaction with supply and/or ground conductors. The transmission systems of Figure 7.10 can be represented as a signaltransfer network with input signal x(t) and output signal y(t). The transmission system is represented by its frequency-domain s-parameters shown as in Figure 7.11. S-parameters are a complete description of a linear time-invariant network with port-termination impedances defined; s-parameters provide port reflection and port-to-port transmission response in terms of power waves. For port-to-port transmission response, the input signal is defined as a single frequency tone and the output is a scaled and shifted version of the input signal (no harmonics), x (t ) = cos( ωt ),

y (t ) = A cos( ωt + θ )

(7.20)

The input excitation signal, x(t), is a real sinusoid with arbitrary radian frequency and with zero reference phase shift, and the output signal, y(t), has its amplitude scaled by factor A and phase shifted by the term . For a linear system, this is defined as the steady-state ac response that can be expanded into a periodic steady-state response involving a multitone input excitation using superposition.


209

UnBal

single-ended to balanced or differential using UnBal (unbalanced to balanced) component

single-ended to balanced crosstalk or balanced to single-ended crosstalk

duplex balanced transmission system

single-ended digital clock distribution transmission system

Figure 7.10 Some examples of high-speed digital transmission systems including balanced low-voltage-differential signal (LVDS).

If x 1 (t ) → y 1 (t ) and x 2 (t ) → y 2 (t ), then x 1 (t ) + x 2 (t ) → y 1 (t ) + y 2 (t )

(7.21)

However, a digital-signal description is more complex than a multitone signal defined in frequency-domain terms. A digital signal with random bit encoding sampled over a statistically representative period of time will have

x(t) − input tone excitation signal

port-to-port transmission system SKL s-parameter

y(t) − scaled and shifted input signal

Figure 7.11 Transmission system port-to-port s-parameter response block diagram.

210


occupied a very broad frequency bandwidth. A digital signal with nonperiodic statistical properties will have different representative frequency components at one point in time compared to other points in time. The linear circuit impulse response is created using the IFT of the circuit s-parameters. In a digital circuit, the linear part is typically the transmission system between the active devices. This impulse response represents a time-domain signal with all of the frequency components limited to the s-parameter data frequencies. Transformation of the s-parameters frequency-domain input signal x ( 2πf ) into an input time-domain impulse signal x(t) creates an impulse time duration equal to the inverse of the s-parameter data set maximum frequency, fmax, and a rise or fall time equal to the inverse of 2 times the maximum s-parameter frequency. A time-domain signal is more accurately modeled using many short impulses superimposed together. Short impulses come from higher fmax s-parameter data. This ideal frequency-domain input signal x ( 2πf ) transformation to ideal time-domain input impulse and step functions x(t) is shown in Figure 7.12. The ideal input signal is shown with equal amplitude and zero relative phase shift at each frequency component. Any ideal nonperiodic input signal waveform can be defined by convolving the ideal input-impulse signal with the ideal input signal. This process is shown in Figure 7.13 with an ideal nonperiodic digital input signal encoded with a random binary signal 1001110110. The ideal squarewave rise time and fall time of the input signal become a rise time and fall time defined

continuous function frequency function

−f

amplitude

−fmax

S-parameter discrete frequency components

fstep 2fstep 3fstep

fmax

f

discrete impulse component δ(t) = 1 continuous function = sin(t) / t

step function = ∫sin(t)/t dt

−t

t −1/2fmax

Step input rise time

1/2fmax

Figure 7.12 IFT of s-parameter frequency-domain input function x(2 f) to time-domain impulse and step input excitation functions x(t).


211

ideal input binary signal x(t) with 1001110110 encoding 1

0

0

1

1

1

0

1

1

0

−t

t tb ideal x(t) convolved with band limited frequency domain impulse transform

1/fmax = 10*tb

−t

1/fmax = 3*tb

t

Figure 7.13 Ideal input impulse convolved with ideal nonperiodic input signal.

by the maximum frequency fmax associated with the ideal s-parameter input signals. In communications systems the digitally encoded signal is often processed with a pulse-shaping function to limit the rise times and fall times of the ideal squarewave signal. This is done to reduce the frequency bandwidth of the signal modulated with a statistically representative random binary encoding. The goal is to provide the highest number of bits/hertz/second as a communication channel figure of merit. Application of a pulse-shaping function to the digital signal is needed to accurately represent the measured eye diagram or other signal-integrity measurement parameter. Not including the pulse-shaping function results in a worst-case transmission system stress test and models a signal with more bandwidth that in the real world. The waveforms of Figure 7.13 represent the ideal nonperiodic input signal x(t) shown in the system block diagram of Figure 7.14. Here, h(t) is the inverse Fourier transform of the port-to-port frequency-domain s-parameters or the port-to-port impulse response waveform. Each separate port-to-port s-parameter is transformed into separate time-domain port-to-port impulse response waveforms. Convolving this port-to-port impulse-response waveform with the ideal nonperiodic binary-encoded squarewave input signal results in the output response waveform y(t).

212


x(t) − input tone excitation signal

port-to-port transmission system hSKL(t)

y(t) − input response signal

Figure 7.14 System block diagram using the impulse response transform to represent time-domain port-to-port network response. The response is derived from frequency-domain port-to-port s-parameters.

All forms of s-parameters can be processed into port-to-port impulse response waveforms. This includes standard and mixed-mode s-parameters and all four 2 × 2 subsets of the mixed-mode s-parameters. It is necessary to model a balanced differential system using mixed-mode s-parameters because single-ended impulse response cannot separate the even-mode, odd-mode, common-mode, and differential-mode waves. Mixed-mode s-parameter postprocessing into the associated impulse responses is essential to successfully characterize differential-mode and common-mode nonperiodic signal behavior. This includes accounting for mode-conversion between the differential-mode and common-mode waves.

7.8 Parallel, Cascade, and Feedback Connections A communications system is comprised of many interconnected units or subsystems. When the subsystems are described by individual transfer functions, it is possible to lump them together into a composite s-parameter network representation. This system network s-parameter representation is converted into an overall composite impulse response waveform. An alterative technique would be to convert the individual subsystem s-parameters into separate impulse response waveforms for separate analyses and considerations. A composite system impulse response would be provided with the combination of the separate subsystem impulse response waveforms. The following is a review of the impulse response calculated for two subsystems connected in parallel, cascade, and with feedback. More complex connection configurations can be analyzed by successive application of these basic approaches. One essential assumption is that interactions or loading effects have been accounted for inside the individual circuit blocks and their waveforms so that they represent the actual response of the subsystems in the context of the overall system. Figure 7.15 is a block diagram of two parallel-connected subsystems. Both subsystems have the same input x(t) and the outputs are summed to get


213

port-to-port transmission system h1 SKL(t)

y(t)−input response signal

x(t)-input excitation signal

+


Figure 7.15 Parallel connection of subsystems.

the system’s output response y(t). From superposition it follows that impulse response y(t) is equal to the summation of the subsystems impulse response convolved with the input x(t), ∞

∫ (h ( λ) + h ( λ))x (t − λ)dλ

y (t ) = (h1 + h 2 )∗ x (t ) =

1

2

(7.22)

−∞

Figure 7.16 is a block diagram showing two series connected subsystems called a cascade connection. The output of the first subsystem is the input to the second subsystem. The result is a convolution of the input by both subsystem impulse response terms, y (t ) = h1 ∗ h 2 ∗ x (t ) =

∞

∞

−∞

−∞

∫ h 2 ( λ) ∫ h1 ( λ)x (t − λ)dλdλ

(7.23)

Figure 7.17 is a block diagram of two series connected subsystems connected in a negative feedback arrangement. The output of the system is taken


x(t)-input excitation signal port-to-port transmission system h1 SKL(t) h1*x(t)

Figure 7.16 Cascade connection of subsystem.


h2*h1*x(t)

214


+

+

x(t)-input excitation signal


(h1 / (1+h2*h1)) * x(t)


−

h2*h1*x(t) port-to-port transmission system h2 SKL(t)

Figure 7.17 Parallel connection of subsystems.

from the node between the series connected subsystems. The result is an input signal that is the sum of the input signal and the convolution of the two impulse responses with the input signal. The system impulse response has a forward path and a feedback path, y (t ) =

h1 ∗ x (t ) 1 + h 2 ∗ h1

  ∞  = ∫ h1 ( λ ) 1 + ∫ h 2 ( λ )h1 (t − λ )dλ   x (t − λ )dλ  −∞  −∞  ∞

(7.24)

7.9 Summary of S-Parameter Applications in the Time Domain There are a number of methods to apply time-domain analysis to distributed microwave networks that are best represented with frequency-domain parameters. This section covered the impulse response since it is the most generalpurpose time-domain analysis tool. Periodic steady-state frequency-domain parameters are easily transformed into time-domain impulse and step-response parameters. These impulse responses can then be convolved with arbitrary nonperiodic input signals to represent any unique time-domain parameter of interest such as the parameters seen in an eye diagram. In addition, much of this analysis is industry accepted with various implementations available within off-the-shelf network analysis programs. Moreover, with the general relationships reviewed in this section, the designer is able to implement time-domain impulse and step nonperiodic signal estimation within a variety of simulation and general-purpose math analysis tools. Process in the time domain can be applied to any form of s-parameters including three-port and four-port single-ended to mixed-mode conversions. It


215

is widely used in analysis of very broadband transmission systems and the increasing complex interconnections between subsystems. However, impulse response-based analysis can be used in narrowband applications such as filters where distributed components are often used in the implementation of these filter behaviors. It can also be applied in other unique microwave circuits such as isolators and circulators where frequency-domain network representations have dominated. All of these applications are assumed to be linear time-invariant functions, where frequency-domain s-parameter transformation to impulse reflection and transmission response can be applied.

References [1]

McGillem, C. D., and G. R. Cooper, Continuous and Discrete Signal and System Analysis, 2nd ed., Austin, TX: Holt, Rinehart & Winston, 1984.

[2]

Carlson, A. B., Communication Systems: An Introduction to Signals and Noise in Electrical Communication, 2nd ed., New York: McGraw-Hill, 1975.

[3]

Kraniauskas, P., Transform in Signals and Systems, Reading, MA: Addison-Wesley, 1992.

About the Authors William R. Eisenstadt received a B.S., an M.S., and a Ph.D. in electrical engineering from Stanford University, Stanford, California, in 1979, 1981, and 1986, respectively. In 1984, he joined the faculty of the University of Florida, Gainesville, Florida, where he is now an associate professor. His research focuses on mixed-signal embedded IC testing, high-speed I/O characterization, BIST, and differential s-parameter characterization of integrated circuit devices, packages, and interconnect. In addition, he works in large-signal microwave circuit design and test and power amplifier design. He was the technical program cochair of the Fourth Workshop on Test of Wireless Circuits and Systems, 2005, and the technical program chair of the 64th ARFTG, December 2004 (automatic RF test group) conferences. Dr. Eisenstadt serves on the ARFTG Executive Committee, the ISCAS Analog Signal Processing Technical Committee, and the Wireless Test Workshop Executive Committee. He has over 25 years of experience in IC design and test. Dr. Eisenstadt received the NSF Presidential Young Investigator Award in 1985. He has over 100 refereed conference and journal publications and several patents. Robert Stengel received a B.S. and an M.S. in electrical engineering from the University of Florida and Florida Atlantic University. He has been associated with Motorola’s wireless communications product design and development and is presently a member of Motorola Labs in Plantation, Florida. His principal responsibility is development of the next generation wireless integrated circuits and systems, with emphasis on transmitter and signal generation. Mr. Stengel has 50 issued U.S. patents and seven publications on mixed-mode s-parameter technology and transceiver power amplifiers. 217

218


Bruce M. Thompson is a distinguished member of the technical staff at Motorola Labs in Florida. He has designed custom RF and microwave integrated circuits at Texas Instruments, Anadigics, E-Systems, and Motorola for both governmental and commercial applications. Mr. Thompson holds several U.S. patents and has published numerous technical papers. He is an IEEE senior member and is on the technical program committee for the RFIC Symposium. Mr. Thompson received a B.S. in electrical engineering from the University of Illinois at Urbana-Champaign.

Index α. See Attenuation constant β. See Phase constant γ. See Propagation constant

Balanced differential network, 10–11 Balun 87, 111 Band-pass filter, differential, 171–184 Base collector capacitive feedback, 158 BER. See Bit error rate BiCMOS, 26 Binary signal, 3 Bit error rate, 7, 193 Bit window, 8 Bluetooth, 27 Broadside conductors, 67–68, 148, 150 Bypass capacitance 18, 21–22

ABCD parameters, 66–68, 151–152, 155, 163–165 cascading networks, 59–160 chaining matrices, 155–161 characterizing, 160 definition, 160 Accumulated jitter, 7 AC network amplitude, 195 flow diagram, 195 phase, 195 power waves, 195–196 response, 195–196 transfer function, 196 ADS simulator, 20, 174, 186 Amplitude window, 7 Analog signals 3–4 Also see Signals Arbitrary source and load generalized s-parameter response, 165–166 port reflection factor, 165–166 termination loading factor, 165–166 ASIC, 1 Attenuation constant, 49 Available power gain, 100

CAD, 2, 79, 148 Capacitive coupling, 14 Cascading networks, 159–162 CD, 26 CGD. See Differential open loop voltage gain Characteristic impedance, 49–50, 58 Circuit under test, 17 Clock period, 5 CMG. See Common mode gain CML. See Current mode logic CMR, 141–142 CMRR. See Common-mode rejection ratio CMOS circuits 4,9 delay time, 6 frequency division, 150 gate 2, 4–5 gate capacitor, 6

Balanced circuit, 10–13

219

220


inverter, 5–6 logic, 2–5 noise, 3 nonratio logic, 5 pseudo-NMOS, 5 voltages, 2–3 Coaxial transmission line ideal lossless, 57 propagation modes, 51–53, 59–60 Combiner 3-dB example, 118 common-mode transfer, 138–140 differential-mode transfer, 138–140 flow diagram, 139–140 general analysis, 137–141 introduction, 113–114 magnitude imbalance, 138–139, 141, 152 mixed-mode flow diagram, 127–129 mixed mode parameters, 152 parameters, 120–122 power waves, 138–140 phase imbalance, 138–139, 141 RCM, 139–140 RDM, 139–140 RRCM, 140 RRDM, 140 single-ended flow diagram, 125–126 s-parameters, 116–120, 123–125 summary of parameters, 142 transformation matrix, 129 Wilkinson 114–116, 122–124 Common base lossless feedback, 158 Common emitter series inductor feedback, 157–158 Common-mode circuit voltage and current, 31–32, 53–55 circuit dynamic range, 22–23 coupled s-parameter, 54–55 coupling, 18, 21 See Coupling coefficient gain, 86, 95, 109 impedance definition, 21, 34, 36, 56, 58, 68 impedance matching 92 interference, 21 matching, 91–92 postprocessing, 97–98 propagation constant, 56 rejection, 94–95

s-parameters, 41 transmission line, 54–55 Common-mode power supply, 18–19 Common-mode rejection ratio, 95–96, 109–111, 147, 181 splitter/combiner 125, 130–131, 135–137, 140, 147, 152 Conversion of s-parameters to R, L, C, G parameters, 66–68 Convolution, 61, 193 Coupling Capacitance, 13 Coefficient, 68 DLNA cross-coupled losses, 100–103 inductive, 15 magnetic, 15 Coupled-line hybrid, 150–151 Coupled-line time-domain analysis, 65–66 Coupled three-conductor system, 61–65 Cross-mode DLNA, 88 losses, 100–103 signal balance, 90–91, 130 s-parameters, 41, 93 Crosstalk 13–16 Current mode logic, 5 CUT. See Circuit under test Cycle-to-cycle jitter, 6 Data-dependent jitter, 6 DDJ. See Data-dependent jitter DDUT, 28 Delay locked loop, 150 Delay time, 6 Deterministic jitter, 6 Device matching, 94 Digital clock signal jitter, 7 Digital signals, 193 Differential balanced circuit, simple 11–13 balanced network, 10–11 circuit, 8, 10 circuit advantages, 23–26 circuit currents, 31, 53–55 circuit definition, 9–10 circuit voltages, 31, 53–54 coupled s-parameter, 53–56 current, 31 device matching, 94 device under test, 28

Index dynamic range, 23 See also Differential low-noise amplifier even-order distortion, 23 four-port system, 27–28 ground supply noise, 19 See also Differential low-noise amplifier distortion (DLNA) harmonic response, 24–25 impedance, 34, 36, 56, 58, 68 impedance matching, 91 matching, 91–92 mode, 29 mode s-parameters, 41 noise, 14–16 open loop voltage gain, 95 propagation constant, 56 signal flow diagram, 89 signal source, 11 transmission line 13–14, 54–56 voltage, 31 Differential isolator application, 186 circuit model, 189 conjugate match, 189–190 definition, 186 design limitations, 188 junction, 186 matrix operator, 189 neutralization, 187–188 physical implementation, 188 resonant, 186 s-parameters, 187–191 y-parameters, 187 Differential low-noise amplifier (DLNA) available power gain, 100 balanced cross-coupled losses, 100–103 common mode gain, 86 common mode postprocessing, 97–98 common mode rejection, 94–95 cross coupled signal balance, 90–91 cross mode parameters, 41–42, 44, 88, 93 current source, 86–87 description, 19, 41–42, 44, 79 differential mode gain, 86 differential signal flow diagram, 89 distortion 85, 103–106 even order distortion, 108–111 gain, 85 ground response, 96–97

221

ideal gain, 85–86 ideal mixed-mode s-parameters, 82 ideal single-ended s-parameters, 81 Also see S-parameters impedance matching, 91 implementation, 80–81 matching limitations, 83 mixed mode s-parameters, 87–88 neutralization, 89–90 noise analysis, 98–100 noise figure, 99 noise rejection, 83–84 odd-order distortion, 106–108 passive circuits, 90–91 s-parameters, 87–88 supply response, 96–97 second-order harmonic distortion, 105 third-order harmonic distortion, 105–106 unilaterialization, 89 Differential-mode coupled 53–55 gain, 86 s-parameter impedance, 56, 58, 68 See also Differential low-noise amplifier (DLNA) Differential-mode rejection ratio, 125, 130, 140, 152 Digital clocked systems, 4 signals, 2 Distortion differential, 85, 103–106 even-order, 23, 108–111 odd-order, 106–108 second-order harmonic, 105 third-order harmonic, 105–106 Distributed circuit, 47 Distributed transmission line, 68–71, 146 DJ. See Deterministic jitter DLNA. See Differential low-noise amplifier DMG. See Differential mode gain DMR, 141–142 DMRR. See Differential-mode rejection ratio Dual directional coupler definition, 184 directivity, 185 s-parameters, 184–186 Dual gate FET, 168 Dual resonator circuit, 174–184, 188 DUT, 30–31

222


Duty cycle, 5 cycle clock, 6 Dynamic range definition, 21–22 differential, 23, 29–30 Electric coupling, 15 Electromagnetic coupling, 13–17 Even-order distortion, 23, 108–109, 111 Even mode description, 31, 66–68 impedance, 68 hybrid coupler, 150 Even-order harmonic response, 24 EVM, 193, 201 Eye amplitude, 8 Eye diagram, 7 Eye opening, 7–8 Fall time, 5, 9 FCC, 171 Filar wire, 146–148 Filter bandwidth, 172 CMRR, 187 center frequency, 172 coupling coefficient, 173 coupled resonator, 171–184 differential band-pass, 171–184 dual resonator, 174 inductances, 173 insertion loss, 175 isolation, 179 load impedances, 176 measurement response, 177–179 mixed-mode conversion, 179–180 mixed-mode parameters, 172 mode responses, 178, 180, 182 parasitic effects, 176–177 pass band frequencies, 172 quality factor, 172 RF parameters, 173 single ended to differential, 174–175 stability analysis, 183, termination impedance, 173, 183 transformer, 173 Forward wave, 31–32 Four-port system, 27–28, 164 Fourier analysis, 194 Frequency division, 150

Gt max, 27, 152 Harmonic balance simulation, 60 Harmonic distortion description, 23 differential even-order, 23 Harmonic response, 24 second-order, 24–45 H-parameters, 47, 155, 159, 163–165 characterizing, 156–157 definition, 156–157 series parallel feedback, 159 Hybrids. See Hybrid splitter/combiner Hybrid splitter/combiner common-mode components, 142–143 differential-mode components, 143–144 mixed mode s-parameters, 143–144 operation, 141, 143 parameters, 144 quadrature component, 143–144 sigma/delta, 141–143 sum/difference, 141–143 types, 141 transformer implementation, 144, 146–148 Hybrid transformer, 149–151 IC clock speed, 5 components and technology, 1–3, 7–9, 20–21, 26, 60 IF, 113, 150, 171 IFFT, 202 Image rejection mixer, 149–150 Impulse response discussion, 61 Impedance conductor, 18 common-mode, 19 definition, 21 differential matching limitations, 83 differential matching, 91 matching, 92 Impulse response, 196–202 band-limited, 197 continuum of pulses, 198–199 distortion, 201 frequency band in time, 196–197 formal definition, 199–200 group delay, 200–201

Index inverse Fourier transform, 197 lossless transmission line, 200 mixed mode s-parameters, 200 nonperiodic signals, 201 propagation delay, 200–201 power wave response, 200 signal representation, 198–199 superposition integral, 199–200 Indefinite matrix, 166–171 creating, 167 definition, 166 determining device response, 167 ground connection parasitics, 168 modeling three terminal transistors, 166–167 tapped transformer, 168–170 Inductive noise, 17 Interconnect coupled, 13–14 distributed, 9 Interference common mode, 21 description, 13, 21 International Technology Roadmap for Semiconductors, 1 I/O circuits, 4, 60, 158, 193 IP3, 106, 111 IIP3, 107, 111 IIP2, 111 Isolation, 7–8 ITRS. See International Technology Roadmap for Semiconductors Jitter accumulated, 7 cycle to cycle, 6 data-dependent, 6 description, 5–7 deterministic, 6 digital clock, 7 period, 6 random, 6 Lange coupler, 184 LAN, 7, 19–21, 24–25 Laplace transform, 206 LINC, 117 linear time invariant network, 153 LNA. See Low-noise amplifier LO, 90, 113 Lossless two-port, 52–53

223

Low-noise amplifier, 19–21, 24–25, 29, 79, 81–83, 94, 104, 107, 150 differential harmonic response, 24–25 gain compression, 104 supply noise rejection, 19–21, 81 See also Differential low-noise amplifier (DLNA) Low temperature co-fired ceramic, 148, 150 LTCC, See Low temperature co-fired ceramic Lumped circuit transmission line, 58 Magnetic coupling description, 15–17 transformer model, 16–17 Matching DLNA, 83 Microstrip coupler, 185 Mixed mode definitions, 30 four port, 28, 36, 38–42, 56–57 ideal s-parameters, 82 matrix, 38, 41–42 measurement, 36 naming convention, 38 port model, 33 ports, 30 power, 55 power waves, 28 single-ended conversion, 175–176 s-parameters, 28–29, 37–38, 56–57, 87–88 splitter/combiner, 116–120, 123–125, 127–129 test setup, 40 three-conductor system, 61–65 three-port, 164–165 two-port, 30 uses, 27 waves, 75 Mixers, 90, 113, 141, 149 Mixer image rejection, 149–150 MMIC, 113 Modal power, 55 Multiport, 164 Network, base-to-collector feedback, 158 cascading, 159–162 de-embedding, 157–158 linear time invariant, 153 linear two-port parameters, 155 multiport measurements, 155

224


one-port, 154 one-port impedance, 154 parameter conversion, 162–171 RF source impedances, 155 single-ended ports, 155 series inductor feedback, 157 series-parallel feedback, 159 small signal conditions, 155 three-port splitter, 163–164 two-port, 154 two-terminal 153–154 Neutralization, 89–90, 187–188 Noise, differential, 14–16, 98–100 figure, 99 ground supply, 19–20 power supply, 19–20 random, 5 random jitter, 6 rejection, 20, 83–84 phase, 7 voltage, 13 n-port circuit, 30, 51, 164 Odd mode description, 32, 66–68 hybrid coupler, 150 impedance, 68 Odd-order distortion, 106–108, 110 One-port network, 154 OIP3, 111 Parameter conversion, 162–171 arbitrary load s-parameters, 165–166 indefinite matrix, 111, 166–171 s-parameter to y-parameter, 162–163 Phase noise, 7 Phase constant, 49 Phasor, 48, 50 Periodic jitter, 6 Power series, 23 Power splitter. See Splitter Power combiner. See Combiner Power waves common-mode definition, 35 differential definition, 35 formal definition, 35, 51 forward, 32–35 impedance, 36

mixed-mode, 28, 38 normalized, 34–35 reverse, 32–35 splitter, 130–136 transmission line, 51 two port, 161 See also s-parameters Propagation constant, 49 Quarter-wave transmission line, 149 Quadrature local oscillator 114, 130, 150 Quadrature signal set, 150 Random jitter, 6 Return current, 56 Reverse wave, 31–32 RCM, 124, 139–142, 152 RDM, 124, 139–142, 152 RF, 1–2, 7–10, 18, 22, 27, 30, 47, 79, 112, 150, 171, 186 RF component modeling, 147 RF differential circuit, 31, 130 RF filter differential design, 171–184 Rise time, 4, 9 RJ. See Random jitter R, L, C, G. parameters, 49–50, 56, 58–59, 60, 66, 69–70, 151, 193 RRCM, 140, 142 RRDM, 140 Series parallel networks, 159 SiGe, 20 Signals analog, 3 balanced losses, 100–103 common mode, 71–272 communication subsystems, 212 convolution, 210–214 differential mode, 71–72 digital, 203, 209–211 feedback subsystem, 213–214 high-speed data, 208–209 integrity, 4–9 linear system, 209 parallel subsystem, 212–213 pure-mode, 75 series subsystem, 213 signal to noise, 7 s-parameter and IFFT, 209–210 transmission, 207–212

Index Simultaneous conjugate match, 152 Single-ended circuit, 21–22, 31 common mode 71–72 differential mode 71–72 s-parameters, 35, 81 four port, 37–38 dynamic range, 22 in mixed-mode terms, 71–78 small signal s-parameters, 27 S-parameter arbitrary source and load, 165–166 characteristic two port, 161 combiner, 116–120, 123–124 common-mode impedance, 56, 58, 68 comparison of modal systems, 59–60 coupled common-mode, 54–55 coupled differential-mode, 53–54 coupled three-conductor, 62–65 DLNA, 82 differential-mode impedance, 56, 58, 68 directional coupler, 184–186 filter, 171–184 four-port measured, 36 four-port matrix, 37–38 hybrid transformer, 151 indefinite matrix, 166–171 isolator, 187–191 lossless two-port, 52–53 mixed-mode definition, 28–29, 37–38 mixed-mode, 56–57 mixed-mode four port, 28, 36, 38–42, 56–57 mixed-mode test setup, 40 n-port circuit, 51 single-ended, 35 single-ended four-port, 37–38 splitter, 116–120, 123–124 three-conductor coupled system, 62 three-port, 164–165 transform coupled three-conductor, 63–64, transform mixed mode to R, L, C, G parameters, 66–69 transform standard to mixed-mode, 42–45 transform y-parameter, 162–163 transforms, 163–164 two-port definition, 161 use of mixed mode, 27 SPICE circuit simulator, 6, 60 Splitter, 113–114

225

3-dB example, 118 common mode transfer, 133 CMRR, 130–131, 135–137 differential-mode transfer, 130–135 DMMR, 130, 136 flow diagram, 131–132 general analysis, 130–137 introduction, 113–114 magnitude imbalance, 131–136, 152 mixed-mode flow diagram, 127–129 mixed-mode parameters, 152 parameters, 120–122, 130–136 phase imbalance, 131–135 single-ended flow diagram, 125–126 s-parameters, 116–120 summary of parameters, 142 transformation matrix, 129 Wilkinson 114–115, 122–124 SoC. See System on a chip Stability (K), 27, 152 Star connection, 18, 21–22 Step response, 201 parallel resistance/capacitance, 206–207 reflection of a load, 206–207 series resistance/inductance, 206–207 Supply voltage, 21 System on a chip, 2, 60 Taylor series, 14, 23 TDR. See Time-domain reflectometry TDT, 194 Telegraphers’ equation characteristic impedance, 49–50, 58 coax one-port, 51 coupled mode application, 60 description, 32, 49 power waves, 51 TEM, 54, 185 Three-port, 164 Third-order intercept, 106–107, 111 Time-domain analysis coupled line, 65–66 distributed line, 69–71 Time-domain reflectometry, 9, 194, 202–207 capacitor response, 205 characteristic impedance, 203–204 discontinuities, 205–206 functional block diagram, 202 impulse, series of, 204 inductor response, 205

226


open termination, 205 physical length, 203 reflected wave, 203 reflection of a load, 206 short termination, 204 signal examples, 203 time gating, 205 velocity of propagation, 203 Time step nodal analysis, 193 Time window, 7 TOI. See Third-order intercept T-parameter, 152, 163–165 cascading networks, 161 chaining matrices, 162 chain s-parameters, 161 definition, 162 Transform coupled three conductors, 63–64 mixed-mode s-parameter to R, L, C, G, parameters, 66–69 standard to mixed-mode, 42–45 s-parameter to y-parameter, 162–163 Transformer circuit, 16–18 indefinite matrix, 168–170 sigma/delta hybrid 144, 146–148 tapped network, 168–170, 183 transmission-line model, 147 Transformer hybrid amplitude imbalance, 149 block diagram, 149 broadside coupling, 150 coupler design equation, 150 even-mode impedance, 151 mixer image rejection, 149–150 phase imbalance, 149 phase offset, 151 odd-mode impedance, 151 receiver image rejection, 149–150 single-ended port impedance, 150 single-ended s-parameters, 151 voltage coupling factor, 150 Transmission line attenuation constant, 49 broadside, 67–68, 148, 150

common mode, 54–55 coupled three conductor, 61–65 differential, 13–15, 54–55 distributed coupled model, 69–70 even mode, 66–68 filar wire, 146 ground plane current, 66–68 lossless matrix, 53 lumped equivalent model, 50, 69–70 normalized voltages, 50–51 odd mode, 66–68 phase constant, 49 phasors, 48, 50 power waves, 51 propagation constant, 49 R, L, C, G model parameters, 49–50, 58–59, 60, 66, 69–70 theory, 50 three-coupled conductors, 61–65 transformer, 115, 147–148 Tri-filar wire. See Filar wire Twisted-pair conductor, 16 Two-terminal network, 154 Two-port, 30, 154, 164 Unilateralization, 89 Virtual ground, 86–87 Wave equation, 49 Wilkinson splitter/combiner, 114–120, 122–124 WLAN, 27, 171 Y-parameter, 27, 47, 79, 152, 155, 159 characterizing, 156 de-embedding, 158, 163–164 definition, 156 indefinite matrix, 169–170, 162–163 parallel feedback, 158 s-parameter transform, 162–163 Z-parameter, 27, 79, 155, 159, 163–164 characterizing, 155–156 definition, 155–156 series connected, 157

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