Ambient Intelligence with Microsystems: Augmented Materials and Smart Objects (Microsystems)

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Ambient Intelligence with Microsystems

Kieran Delaney

Ambient Intelligence with Microsystems Augmented Materials and Smart Objects

Kieran Delaney Department of Electronic Engineering Cork Institute of Technology Bishoptown, Cork, Ireland

ISBN: 978-0-387-46263-9 DOI: 10.1007/978-0-387-46264-6

e-ISBN: 978-0-387-46264-6

Library of Congress Control Number: 2008928644 © 2008 Springer Science + Business Media, LLC All rights reserved. This work may not be translated or copied in whole or in part without the written permission of the publisher (Springer Science + Business Media, LLC, 233 Spring Street, New York, NY 10013, USA), except for brief excerpts in connection with reviews or scholarly analysis. Use in connection with any form of information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed is forbidden. The use in this publication of trade names, trademarks, service marks, and similar terms, even if they are not identified as such, is not to be taken as an expression of opinion as to whether or not they are subject to proprietary rights. Printed on acid-free paper 9 8 7 6 5 4 3 2 1 springer.com

Preface

1

Introduction

The future of information technology systems will be driven by concepts such as that of Ambient Intelligence (AmI). In this vision, Ambient Intelligence will surround us with proactive interfaces supported by massively and appropriately distributed computing and networking technology platforms. This provides a challenge for technology development that is likely to result in the vast integration of information systems into everyday objects, such as furniture, clothes, vehicles, roads and even materials like paint, wallpaper, etc. Thus, it is a vision that is fundamentally based upon deriving solutions enabled by current and future microsystems. The recent level of progress in the area of microsystems opens up numerous opportunities; however, the development of practical approaches to realise this potential is non-trivial. An effective methodology is to create some form of co-design process between hardware, software and user-design research that encapsulates the full requirements of the AmI vision and the physical capabilities and constraints of its component technologies. The approach has already led to significant developments, both in terms of theory and practical research; these include the Disappearing Computer initiative, Augmented Materials, Smart Matter, the eGrain and eCube programmes, as well as related initiatives in wireless sensor networking that have their origin in the concept of Smart Dust.

2

Scope

This book investigates the development of networkable smart objects for Ambient Intelligence (AmI) with specific emphasis upon the implementation of the microsystems and nanoscale devices required to achieve effective smart systems. In this context, it seeks to investigate the challenges and potential solutions that will ensure the technology platforms are created to be capable of being seamlessly v

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integrated into everyday objects. In particular, this includes the requirements and possibilities for integrated computation and MEMs sensors, embedded microelectronic electronics sub-systems, including the System-in-Package (SiP) and MultiChip Module (MCM), as well as novel assembly techniques for autonomous MEMs sensors. However, in order to do this effectively, many aspects of the creation of hierarchical systems must be investigated; thus, a series of chapters are also included here to provide an insight into this. This covers conceptual topics designed to create common multi-disciplinary visions, such as AmI, Pervasive Computing, Smart Dust, etc. The framework for part of this discussion on vision-statements will be the concept of Augmented Materials; these are materials with fully embedded distributed information systems, designed to measure all relevant physical properties and provide a full knowledge representation of the material; in effect, the material would “know” itself, and its current status. It is a concept that seeks to harness the steps used to physically fabricate and assemble smart objects as a natural programming language for these ‘materials’. This book also includes chapters describing technology platforms that are specifically important to the creation of smart objects (and indeed AmI itself), including sensor subsystems development (for example, using toolkits), wireless networking technologies and systems-level software. Numerous challenges, when viewed through a ‘whole-systems’ perspective, cross many of these ‘layers’ of technology and thus require solutions that are optimized through some form of co-design process. Two topics have been selected from among these problem-statements and are discussed in more detail, namely the well-heralded issue of energy management and scavenging and the more elusive, though no less important, issue of robustness and reliability. The challenge of co-design itself is also addressed in this context. To be successful in realising methodologies requires more that just a systemic technological solution. The nature of AmI and Smart Environments is such that multiple forms of augmented (tangible) artifact will need to function together. Importantly, there is the question of what to build: in other words, what user need is being served and is it meaningful? There also the issue of how to build it. Broader interaction between industry and academia is certainly a challenge here, particularly, given that researching networkable smart systems is going to require multiple academic disciplines. So, what are the approaches that can help companies to bridge this gap more easily? How can it provide added value to both industry and academia? These issues are dealt with directly in two dedicated chapters. Finally, there is the practical issue of creating Smart Systems. Finding solutions to the challenges of building networkable smart objects is best researched by prototyping them; often, a process where multiple prototypes will be build, offers the greatest insight. Three approaches to investigating, building and demonstrating prototypes are presented. The first approach uses existing devices and systems to built new experiences, elements of a ‘responsive environment’ that are crystallized through creating and demonstrating tangible systems. The second investigates how an augmented material might be built into a new object through a case study about

Preface

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a ‘smart table’; both ‘top-down’ and ‘bottom-up’ approaches are applied. The third approach discusses a case study following the design and implementation of a monitoring system derived from specific user requirements. The realization of networkable smart objects, and their integration into a larger AmI landscape, is a significant undertaking. The search for effective solutions is a hugely multi-disciplinary exercise, as rewarding as it is challenging. If it is undertaken purely on technological terms then, while numerous interesting ‘gadgets’ may emerge, the solutions are not likely to have an impact. Gadgets are consumable. If, however, we invest in a process where all of the important disciplines - technological, social, industrial – work together, completing the hard process of genuine collaboration, then the impact may well be huge.

Contents

Part I

The Concepts: Pervasive Computing and Unobtrusive Technologies

1

An Overview of Pervasive Computing Systems .................................... Juan Ye, Simon Dobson, and Paddy Nixon

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2

Augmenting Materials to Build Cooperating Objects .......................... Kieran Delaney, Simon Dobson

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Part II

Device Technologies: Microsystems, Micro Sensors and Emerging Silicon Technologies

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Overview of Component Level Devices .................................................. Erik Jung

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Silicon Technologies for Microsystems, Microsensors and Nanoscale Devices ............................................................................ Thomas Healy

Part III

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Hardware Sub-Systems Technologies: Hybrid Technology Platforms, Integrated Systems

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Distributed, Embedded Sensor and Actuator Platforms...................... John Barton, Erik Jung

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Embedded Microelectronic Subsystems ................................................ John Barton

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Contents

Part IV

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Networking Technologies: Wireless Networking and Wireless Sensor Networks

Embedded Wireless Networking: Principles, Protocols, and Standards ........................................................................................ Dirk Pesch, Susan Rea, and Andreas Timm-Giel

Part V

Systems Technologies: Context, Smart Behaviour and Interactivity

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Context in Pervasive Environments ..................................................... Donna Griffin, Dirk Pesch

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Achieving Co-Operation and Developing Smart Behavior in Collections of Context-Aware Artifacts ........................................... Christos Goumopoulos, Achilles Kameas

Part VI

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System-Level Challenges: Technology Limits and Ambient Intelligence

Power Management, Energy Conversion and Energy Scavenging for Smart Systems.............................................................. Terence O’Donnell, Wensi Wang

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Challenges for Hardware Reliability in Networked Embedded Systems ................................................................................ John Barrett

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Part VII

System Co-Design: Co-Design Processes for Pervasive Systems

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Co-Design: From Electronic Substrates to Smart Objects ................ Kieran Delaney, Jian Liang

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Co-Design for Context Awareness in Pervasive Systems .................... Simon Dobson

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Part VIII

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User-Centered Systems: From Concept to Reality in Practical Steps

User-Centred Design and Development of Future Smart Systems: Opportunities and Challenges .................................. Justin Knecht

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Contents

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Embedded Systems Research and Innovation Programmes for Industry ..................................................................... Kieran Delaney

Part IX

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Applied Systems: Building Smart Systems in the Real World

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Sensor Architectures for Interactive Environments ........................... Joseph A. Paradiso

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Building Networkable Smart and Cooperating Objects .................... Kieran Delaney, Ken Murray, and Jian Liang

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Dedicated Networking Solutions for a Container Tracking System..................................................................................... Daniel Rogoz, Fergus O’Reilly

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Conclusion ......................................................................................................

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Index ................................................................................................................

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Contributors

John Barrett Department of Electronic Engineering, Centre for Adaptive Wireless Systems, Smart Systems Integration Group, Cork Institute of Technology, Rossa Avenue, Bishopstown , Cork, Ireland John Barton Tyndall National Institute, Lee Maltings, Prospect Row, Cork, Ireland Kieran Delaney Centre for Adaptive Wireless Systems, Cork Institute of Technology, Rossa Avenue, Bishopstown, Cork, Ireland Simon Dobson Systems Research Group, School of Computer Science and Informatics, UCD Dublin, Belfield, Dublin 4, Ireland Christos Goumopoulos Distributed Ambient Information Systems Group, Computer Technology Institute, Patras, Hellas Donna Griffin Centre of Adaptive Wireless Systems, Cork Institute of Technology, Rossa Avenue, Bishopstown, Cork, Ireland Thomas Healy Tyndall National Institute, Cork, Ireland Erik Jung Fraunhofer IZM, Gustav-Meyer-Allee 25, 13355 Berlin, Germany Achilles Kameas Distributed Ambient Information Systems Group, Computer Technology Institute, Patras, Hellas Justin Knecht Centre for Design Innovation, Sligo, Ireland

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Contributors

Jian Liang Centre for Adaptive Wireless Systems, Cork Institute of Technology, Rossa Avenue, Bishopstown, Cork, Ireland Ken Murria Centre for Adaptive Wireless Systems, Cork Institute of Technology, Rossa Avenue, Bishopstown, Cork, Ireland Paddy Nixon Systems Research Group, School of Computer Science and Informatics, UCD Dublin, Belfield, Dublin 4, Ireland Terence O’Donnell Tyndall National Institute, University College Cork, Cork, Ireland Fergus O’Reilly Technologies for Embedded Computing (TEC) Centre, Cork Institute of Technology, Rossa Avenue, Bishopstown, Cork, Ireland Joseph A. Paradiso Responsive Environments Group at the MIT Media Laboratory, 20 Ames Street, Cambridge, MA, USA Dirk Pesch Centre of Adaptive Wireless Systems, Cork Institute of Technology, Rossa Avenue, Bishopstown, Cork, Ireland Susan Rea Centre for Adaptive Wireless Systems, Cork Institute of Technology, Rossa Avenue, Bishopstown, Cork, Ireland Daniel Rogoz Technologies for Embedded Computing (TEC) Centre, Cork Institute of Technology, Rossa Avenue, Bishopstown, Cork, Ireland Andreas Timm-Giel TZI/iKOM/ComNets, University of Bremen, Bremen, Germany Wensi Wang Tyndall National Institute, University College Cork, Cork, Ireland Juan Ye Systems Research Group, School of Computer Science and Informatics, UCD Dublin, Belfield, Dublin 4, Ireland

Part I

The Concepts Pervasive Computing and Unobtrusive Technologies

1.1

Summary

Innovation, particularly when relating to Information and Communication Technologies (ICT) is guided by technology roadmaps and, increasingly, by vision statements. With multi-disciplinary research becoming a ‘norm’, a common framework, often built around the user as participant in a form of scenario, is required to even begin the process of ‘co-innovation’. In an increasing number of areas, this is being derived from vision statements that capture the imagination of both the research community and society at large. In this part, we discuss a selection of visions and concepts. Realising the vision of Pervasive Computing, in part of in total, is certainly an overarching aim for many research initiatives. The concept, which envisions services that respond directly to their user and environment, with greatly reduced explicit human guidance, is one of the most influential in the past twent years. A second vision statement, that of Augmented Materials, has evolved from other established concepts, such as Smart Dust, Smart Matter and the Diseppaearing Computer, to address a key requirement in the creation of Pervasive Computing Systems: the introducton of unobtrusive technologies.

1.2

Relevance to Microsystems

Simply put, a vision like Pervasive Computing, or concept like Augmented Materials, creates the conditions for determining what will be required in the future for hardware and software technologies. It provides a framework for determining what is currently possible – and perhaps even required – with existing solutions. It also points the way to new innovation; targets for new forms of hardware, including microsystems with new geometries, materials and functions, will emerge from the drivers created by these visions. In effect, these opportunities are only limited by the imagination. However, this major opportunity for ‘technology push’ is balanced by a growing analysis of user needs. The emphasis placed upon this is in fact a

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Part I The Concepts: Pervasive Computing and Unobtrusive Technologies

litmus test of whether these visions are being correctly applied. Finding and understanding the real need remains a key goal; in this context, the difference is that, since these visions largely do not yet exist in reality, an appropriate amount of exploration must take place.

1.3

Recommended References

There are numerous publications that would support a deeper understanding of these concepts and the driving forces behind them. In addition to the references provided in each chapter the following three publications should provide further insight to interested reader: 1. Mark Weiser, “The Computer for the Twenty-First Century,” Scientific American, pp. 94-10, September 1991 2. Adam Greenfield, Everyware: The Dawning Age of Ubiquitous Computing, New Riders Publishing, 2006 3. Emile Aarts and José Encarnação, True Visions: The Emergence of Ambient Intelligence, Springer, 2006 4. Simon Dobson, Kieran Delaney, Kafil Mahmood Razeeb and Sergey Tsvetkov. A co-designed hardware/software architecture for augmented materials. In Proceedings of the 2nd International Workshop on Mobility Aware Technologies and Applications. Thomas Magedanz, Ahmed Karmouch, Samuel Pierre and Iakovos Venieris (ed). Volume 3744 of LNCS. Montréal, CA. 2005.

Chapter 1

An Overview of Pervasive Computing Systems Juan Ye, Simon Dobson, and Paddy Nixon

Abstract Pervasive computing aims to create services that respond directly to their user and environment, with greatly reduced explicit human guidance. The possibility of integrating IT services directly into users’ lives and activities is very attractive, opening-up new application areas. But how has the field developed? What have been the most influential ideas and projects? What research questions remain open? What are the barriers to real-world deployment? In this chapter we briefly survey the development of pervasive computing and outline the significant challenges still being addressed. Keywords Pervasive computing, Ubiquitous computing, Location, Adaptation, Behaviour, Context, Situation

1

Introduction of Pervasive Computing

This history of computing is peppered with paradigm shifts on how the relationship between humans and computers is perceived. After mainframe computing, minicomputing and personal computing, a fourth wave is now taking place – pervasive (or ubiquitous) computing, proposed by Mark Weiser in his seminal 1991 paper. Weiser describes a vision of pervasive computing that still inspires more than 15 years later: The most profound technologies are those that disappear. They weave themselves into the fabric of everyday life until they are indistinguishable from it. [1]

The essence of Weiser’s vision was the creation of environments saturated with computing capability and wireless communications, whose services were gracefully integrated with human user action [2]. Computing thus becomes pervasive; available always and everywhere.

Systems Research Group, School of Computer Science and Informatics, UCD Dublin, Belfield, Dublin 4, Ireland

K. Delaney, Ambient Intelligence with Microsystems, © Springer 2008

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We could distinguish (as some authors do) between ubiquitous computing that is provided by a continuous networked infrastructure of accessible devices, and pervasive computing that focuses on providing seamless and cognitively integrated services to users – however, this distinction is becoming increasingly unnecessary in the era of WiFi and Bluetooth networks and we shall focus almost exclusively on service provision. In pervasive systems, people rely on the electronic creation, storage, and transmission of personal, financial, and other confidential information. This in turn demands the highest security for these transactions, and requires access to time-sensitive data – all regardless of the physical location. Devices like personal digital assistants (PDAs), “smart” mobile phones, ultra-mobile laptops and office PCs, and even home entertainment systems are expected to work together in one seamlessly-integrated system. In addition, a pervasive computing environment assumes a number of invisible sensing/computational entities that collect information about the users and the environment. With the help of these entities, devices can deliver customised services to users in a contextual manner when they are interacting and exchanging information with the environment [3]. Simply put, pervasive computing is a post-desktop model of human-computer interaction where computation is embedded in everyday objects that gather information from users and their surrounding environments and accordingly provides customised services [4, 5]. Pervasive computing aims to empower people to accomplish an increasing number of personal and professional transactions using new classes of intelligent and portable appliances, devices, or artifacts with embedded microprocessors that allow them to employ intelligent networks and gain direct, simple, and secure access to both the relevant information and services. It gives people access to information stored on powerful networks, allowing them to easily take action anywhere and at any time. In principle, to be effective pervasive computing must simplify life by combining open standards-based applications with everyday activities. It must remove the complexity of new technologies, enable us to be more efficient in our work and leave us more leisure time; delivered thus, pervasive computing will become part of everyday life. Achieving this in practice will prove to be a challenge.

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Representative Examples of Pervasive Computing Applications

Pervasive computing is maturing from its origins as an academic research topic to a commercial reality. It has many potential applications, from the intelligent office and the smart home to healthcare, gaming and leisure systems and public transportation. Three specific application domains are outlined here: healthcare, public transportation, and the smart home. Pervasive healthcare is an emerging research discipline, focusing on the development and application of pervasive/ubiquitous computing technology for healthcare

1 An Overview of Pervasive Computing Systems

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and life wellness [6, 7]. Pervasive computing technologies introduce new diagnostic and monitoring methods that directly contribute to improvements in therapy and medical treatment [8]. These examples involve sensors and monitoring devices, such as blood pressure cuffs and glucose meters, which can collect and disseminate information to healthcare providers. They can support better understanding of facets of a patient’s daily lives and then appropriately modify therapies to the individual. One of the scenarios would be a hospital where a patient is constantly monitored, and the findings are linked to a diagnostic process. Thus, it could be possible to advise the hospital canteen to prepare special food for this particular patient and to adapt the patient’s specific medication according to his current health condition. Pervasive computing technologies can also improve the procedure of medical treatment (an example is given in Fig. 1.1). In emergency care, they can accelerate access to medical records at the emergency site or seek urgent help from multiple experts virtually. In the surgical field, they can collect and process an ever-increasing range of telemetric data from instruments used in an operating room and augment human ability to detect patterns that could require immediate action [9]. Pervasive computing technologies are also entering our everyday life as embedded systems in transportation [11, 12]. A number of applications have emerged. In tourist guides, a pervasive computing system can provide personalised services (like locating a specific type of restaurant or planning a daytrip) for visitors based on their location and preferences. In traffic control, a system can be immediately informed of incidences of congestion or the occurrence of accidents and notify all approaching drivers. In route planning, a system can suggest the most convenient routes for users based on the current traffic conditions and the transportation modes being used. At a public transportation hub, a system can provide high value-added services to improve customer convenience [13] (Fig. 1.2).

Fig. 1.1 An example scenario of pervasive computing technologies in Healthcare [10]

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Fig. 1.2 A “smart station vision” scenario of providing on-demand information services for customers from departure place to destination [13]

The introduction of pervasive computing into transportation is facilitated by a range of technologies, particularly networks and positioning systems. Pervasive computing technologies are also becoming essential components in the home environment. A house can be set up to act as an intelligent agent; perceiving the state of the home environment through installed sensors and acting through device controllers. The goal is to maximise the comfort and security of its inhabitants and minimise operation cost. For example, applications in a smart home can improve energy efficiency by automatically adjusting heating, cooling or lighting levels according to the condition of the inhabitants (for example, location or body temperature). They can also provide reminders of shopping orders according to the usage of groceries and schedule the entertainment system (for example, playing music or movie, or switching on a TV) according to the inhabitant’s hobbies and habits. In these cases, pervasive computing technologies are applied to identify, automate and predict the activity patterns of inhabitants from synthetic and real collected data [14, 15].

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The History and Issues of Pervasive Computing

Pervasive computing represents a major evolutionary step in a line of work dating back to the mid-1970s. Two distinct earlier steps are distributed systems and mobile


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computing [16]. Fig. 1.3 shows how research problems in pervasive computing relate to those in distributed systems and mobile computing. The advent of networking enabled independent personal computers to evolve into distributed systems. The mechanisms for linking remote resources provided a means of integrating distributed information into a single structure and distributing computing capabilities. The network has pioneered the creation of a ubiquitous information and communication infrastructure, and thus it is a potential starting-point for pervasive computing [17]. A similar evolution is driving distributed systems to become pervasive by introducing seamless access to remote information resources and communication with fault tolerance, high availability, and security. Mobile computing emerged from the integration of cellular technology and the network. Short-range wireless and wide-area wireless (or wired communication) then boosted the development of mobile computing. Both the size and price of mobile devices (for example, laptop or mobile phones) are falling everyday and could eventually support pervasive computing with inch-scale computing devices readily available to users for use in any human environment. In mobile computing, the research problems overlapping with pervasive computing include mobile networking, mobile information access, adaptive applications, energy-aware systems and location sensitivity. While it is possible to get caught up in the “pervasive-ness” part of this new technology, it is also important to realise how much such systems rely on existing information bases and infrastructures. In transportation, for example, services such as Google Maps provide much of the raw information needed to create the valueadded, location-based service. Pervasive systems are therefore only part of a larger information infrastructure. It is necessary to appreciate both how small a part of the overall system may need to be pervasive, but equally how large is the impact of providing seamless integration of services in everyday life [16]. This brings us to several research issues. The first issue is the effective use of smart spaces. A smart space is a work or living space with embedded computers, information appliances, and multi-modal sensors that allow people to work and live efficiently (together or individually) with an unprecedented access to information and support from local computers [18]. Examples of suitable sites for smart spaces include a business meeting room, a medical consultation meeting room, a training and education facility, a house, a classroom, and a crisis management command center. A smart space should adapt to the changes in an environment, recognising different users, and providing personalised services for them. The second research issue is invisibility, which was described by Weiser as follows: “there is more information available at our fingertips during a walk in the woods than in any computer system, yet people find a walk among trees relaxing and computers frustrating. Machines that fit the human environment instead of forcing humans to enter theirs will make using a computer as refreshing as taking a walk in the woods”. Streitz and Nixon summarised two forms of invisibility [2]. Physical invisibility refers to the miniaturisation of computing devices and their embedding within and throughout the individual and the environment; for example in clothes, glasses, pens, cups, or even the human body itself. Cognitive invisibility refers

systems

Localized scalability

Invisibility

Uneven conditioning

Fig. 1.3 Taxonomy of computer systems research problems in pervasive computing [16]

Location sensitivity GPS, WaveLan triangulation, context-awareness...

Energy-aware systems goal-directed adaptation, disk spin-down...

Adaptive applications proxies, transcoding, agility...

Mobile information access disconnected operation, weak consistency... Smart spaces

Mobile computing

Distributed

Mobile networking Mobile IP, ad hoc networks, wireless TCP fixes...

Distributed security encryption, mutual authentication..

Remote information access dist. file systems, dist. databases, caching...

High availability replication, rollback recovery...

Fault tolerance ACID, two-phase commit, nested transactions...

Remote communication protocol layering, RPC, end-to-end args...

Pervasive computing

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to the ability to use the system’s services in a manner that is free from distraction. A pervasive computing environment should interact with users at almost a subconscious level if it is to continuously meet the expectations of users; it should rarely present them with surprises. (This is also approximated by the minimal user distraction as described by Satyanarayanan [16].) The third research issue is localised scalability. Scalability is a critical problem in pervasive computing, since the intensity of interactions between devices will increase in these environments where more and more users are involved. The density of these interactions must be decreased by reducing distant interactions that are of little relevance to current applications. The fourth research issue is masking heterogeneity. The rate of penetration of pervasive computing technology into the infrastructure will vary considerably. To make pervasive computing technology invisible requires reductions in the amount of variation in different technologies, infrastructures, and environments.

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Significant Projects

Pervasive computing projects have been advanced both in academia and industry. Some of the most influential projects include Aura in Carnegie Mellon University [19], Oxygen at MIT [20], Gaia in UIUC [21], Sentient Computing at AT&T Laboratories in Cambridge [22], the Disappearing Computer initiative from the EU Fifth Framework Programme [23], the TRIL Center [6], GUIDE at Lancaster University [24], Cooltown in Hewlett-Packard [25], and EasyLiving in Microsoft [26]. Some of these projects will be described here to provide a sense of the breadth of research taking place in this topic. The Aura project in CMU aimed to design, implement, deploy, and evaluate a large-scaled computing system that demonstrates the concept of a “personal information aura”, which spans wearable, handheld, desktop and infrastructural computers [19]. In Aura, each mobile user was provided with an invisible halo of computing and information services that persisted regardless of the location. The goal was to maximise available user resources and to minimise distraction and drains on user attention. To meet the goal, many individual research issues evolved within the Aura project, from the work on hardware and network layers through the operating system and middleware to the user interface and applications. The Oxygen project depicted computation as human-centered and freely available everywhere, like the oxygen in the air we breathe [20]. Oxygen enabled pervasive, human-centered computing through a combination of specific user and system technologies. The project focused on the following technologies: device, network, software, perceptual, and user technologies. The Disappearing Computer initiative sought to design information artefacts based on new software and hardware architectures that were integrated into everyday objects, to coordinate these information artefacts to act together and to investigate new approaches that ensure user experience is consistent and engaging in an environment

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filled with such information artefacts [23]. This initiative included GLOSS [27], e-Gadgets [28], Smart-its [29], and other projects. A typical example was the GLOSS project (GLObal Smart Spaces), which aimed to provide information technology that respected social norms – allowing established ways of interaction to be generated or saved as required [27]. The project provided a theoretical framework and a technological infrastructure to support emerging functionality paradigms for user interactions. The goal was to make computing cognitively and physically disappear. The TRIL Center is a coordinated group of research projects addressing the physical, cognitive and social consequences of aging, recognising the increase in the aging population globally. The center’s objective is to assist older people around the world to live longer from wherever they call home, while minimising their dependence on others and improving routine interactions with healthcare systems. It entails multi-disciplinary research on pervasive technologies to support older people living independently [6]. The Cooltown project in HP aimed to provide an infrastructure for nomadic computing; that is, nomadic users are provided with particular services that are integrated within the entities in the everyday physical world through which users go about their everyday lives [25]. This project focused on extending web technology, wireless networks and portable devices to bridge the virtual link between mobile users, physical entities, and electronic services. The Microsoft EasyLiving project developed prototype architecture and technologies for building intelligent environments [26]. This project supported research addressing middleware, geometric world modeling, perception, and service description. The key features included computer vision of person-tracking and visual user interaction, the combination of multiple sensor modalities, the use of a geometric model of the world to provide context, the automatic or semi-automatic calibration of sensors and model building. Fine-grained events, adaptation of user interfaces, as well as deviceindependent communication and data protocols and extensibility were also addressed.

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Open Research Issues

Pervasive computing offers a framework for new and exciting research across the spectrum of computer science. New research themes cover basic technology and infrastructure issues, interactions where computers are invisible and pressing issues of privacy and security [3, 30].

5.1

Hardware Components

Hardware devices are expected to be cheaper, smaller, lighter, and have longer battery life without compromising their computing and communications capabilities. Their cost and size should make it possible to augment everyday objects with built-in computing devices (for example the prototype in Fig. 1.4). These everyday


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Fig. 1.4 The Mediacup is an ordinary coffee cup with sensors, processing and communication embedded in the base [31].

objects can then potentially gather information (including light, temperature, audio, humidity, and location) from its environment, then transmit it, and take actions based upon it. These devices should generally be low-power in order to free them from the constraints of existing or dedicated wired power supplies. Specialised circuit designs may permit operation over a much wider range of voltages or enable power savings using other optimisation techniques. Chalmers suggested that it may be possible to use solar cells, fuel cells, heat converters, or motion converters to harvest energy [30]. Other resource constraints can also be overcome. Satyanarayanan described Cyber-foraging as a potentially effective way to dynamically augment the computing resources of a wireless mobile computer by exploiting local wired hardware infrastructure [16].

5.2

Software Engineering

In pervasive computing systems, the number of users and devices will greatly increase, as will the degrees of interaction between them. A tremendous number of applications are distributed and installed separately for each device class, processor family, and operating system. As the number of devices grows, these applications will become unmanageable. Pervasive computing must find ways to mask heterogeneity since, in the implementation of pervasive computing environments, it is hard

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to achieve uniformity and compatibility. The challenges encompass a new level of component interoperability and extensibility and new dependability guarantees, including adaptation to changing environments, tolerance of routine failures, and security despite a shrunken basis of trust [32]. From a systematic perspective, infrastructures deployed in a pervasive computing system should be long-lived and robust. These infrastructures include sensors and devices, hardware for input and output interaction, software for manipulating and controlling interaction devices, and communication structures from a small to large scale. These infrastructures will be able to perform in situ upgrades and updates and the interactions within this infrastructure should be fluent. This can be enabled by developing an appropriate programming primitive. This new programming model will deal with sensor communication, the semantics of the system (for example, knowledge, data, and software for applications), the corresponding implementations, and so forth [3].

5.3

Context-awareness

Perception or context-awareness is an intrinsic characteristic of intelligent environments. Context can be any information about a user, including environmental parameters such as location, physiological states (like body temperature and heart rate), an emotional state, personal history, daily activity patterns, or even intentions and desires. All of this context is acquired from various kinds of sensors, which are distributed in a pervasive computing environment. Compared to traditional data in a database, context has much richer and more flexible structures and, thus, it is much more dynamic and error-prone. This requires a new data management model to represent context in a sharable and reusable manner and to resolve uncertainty by merging multiple conflicting sensor data streams. It is also required to deal with a huge amount of real-time data and contain a storage mechanism for fresh and out-dated context. The research in modeling context has developed from the simplest key-value pattern [33] to object-oriented models [34], logical models [35], graphical models [36], and ontology models [37]. After analysing the typical context models in pervasive computing, Strang [38] and Ye [39] regarded ontologies as the most promising technique to model and reason about context. In terms of software, the error-prone nature of context and contextual reasoning alter the ways in which we must think about decision and action. Any decision may be made incorrectly due to errors in input data, and we cannot blame poor performance on poor input data quality: we must instead construct models that accommodate uncertainty and error across the software system, and allow low-impact recovery.

5.4

Interaction

By interaction, we mean the way that a user interacts with an environment, with other people and with computers. As pervasive computing environments become


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increasingly part of our everyday lives, people will start interacting with these environments more intensively. The way that people interact with each other is enriched with a hybrid mix of communication technologies and interaction devices, including multi-media and multi-modal technologies [30]. Interactive elements in an environment will range from small-scale embedded or wearable devices that focus on the individual to large-scaled installations that focus on the general public. Each interactive element may bring about significant overhead and complexity in the users’ interaction, particularly if it has a different mode of interaction from other devices or it is a poor fits with users’ everyday activities. It has long been the objective of interface design to remove physical interfaces as a barrier between the user and the work s/he wishes to accomplish via the computer. Input devices like the keyboard, mouse and display monitor have been commercial standards for nearly fifteen years [40]. This type of physical interface is anything but transparent to the user and it violates the vision of pervasive-ness without intrusion. As the vision becomes fulfilled and computational services are spread throughout an environment, advances are needed to provide alternative interaction techniques. Put another way, the essential quality of pervasive interfaces is that they be scrutable, in that they support the construction of predictive and explanatory mental models by users [41]. Proactivity and transparency should be balanced during the interaction. A user’s need for, and tolerance of proactivity is likely to be closely related to his/her level of expertise during a task and to his/her familiarity with the environment. To strike the balance between proactivity and transparency, a system should be able to infer these factors by observing user behaviour and context. We have to explore a range of new technologies that support interaction with, and through, diverse new devices and sensing technologies. These include gesture-based approaches that exploit movement relative to surfaces and artifacts, haptic approaches that exploit the physical manipulation of artifacts, as well as speech-based interfaces. We should also treat pervasive computing as part of the language and culture and open up powerful associations with other disciplines that handle activity, space and structure [30].

5.5

Security, Privacy and Trust

With the growth of the internet, security has become an important research topic, including the issues of authority, reliability, confidentiality, trustworthiness, and so on. More specifically, the security issue involves the cryptographic techniques used to secure the communication channels and required data, the assessment of the risk of bad things happening in an environment or specific situation, and the development of safeguards and countermeasures to militate against these risks [5]. Security is a much more severe issue in pervasive computing, since pervasive computing is hosted in a much larger network that involves a huge number of different types of computing devices. These devices can be “invisible” or anonymous (that is, with unknown origin). They can also join or leave any network in an ad hoc manner. These factors intensely complicate security in pervasive systems.

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Privacy is the claim of individuals, groups, or institutions to determine for themselves when, how and to what extent information is communicated to others [42]. Privacy is about determining how to control and manage users’ privacy, which is an existing problem in distributed and mobile computing. To provide personalised behaviour for users, a pervasive computing system needs to perceive all kinds of user context, including tracking user movement, monitoring user activities and exploring user profiles (like habits or interests) from browsed web pages. This massive amount of user information is collected in an invisible way and can potentially be inappropriately presented or misused. In this context, privacy control is not only about setting rules and enforcing them, but also about managing and controlling privacy adaptively according to changes in the degree of disclosure of personal information or user mobility [5]. In a pervasive computing environment, mobile entities benefit from the ability to interact and collaborate in an ad-hoc manner with other entities and services within the environment. The ad-hoc interaction means entities will face unforeseen circumstances ranging from unexpected interactions to disconnected operations, often with incomplete information about other entities and the environment [5]. The mechanism of trust is required to control the amount of information or resources that can be revealed in an interaction. Risk analyses evaluate the expected benefit that would motivate users to participate in these interactions. Trust management is needed to reason about the trustworthiness of potential users and to make autonomous decisions on who can be trusted and to what degree.

6

Changing Perspective Through Augmented Materials

From the perspective of this book, of course, embedding hardware components into everyday artifacts, evolved from the approaches related to those shown in Fig. 1.4, is an exciting prospect This will have a significant impact on the design of hardware, since it must integrate into materials that would not usually be considered as substrates for integrated devices; furthermore, they must withstand treatment (such as going through a dishwasher cycle!) not normally inflicted on computing devices. From a software perspective, combining pervasive computing with truly embedded devices emphasizes many of the issues raised in this chapter. In particular, such systems have limited interface bandwidth, possibly coupled with a rich variety of sensors. They must therefore rely substantially both on local inference and on connections to the wider world to access non-local information. At a system’s level, perhaps the greatest challenge is in the deployment, selfmanagement, self-organisation, self-optimisation and self-healing of networks of embedded systems: the self-* properties identified within autonomic systems. Such properties apply to computing capabilities [43], but perhaps more significantly they also apply to communications capabilities [44] of systems that must manage themselves with minimal human direction in very dynamic environments. Such self-reliance exacerbates the need for end-to-end management of uncertainty and


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so magnifies the need for different programming approaches. Dobson and Nixon have argued [45] for models that embrace explicit modeling of context and the environment, which may then be used to derive communications behaviour and evolve it in a principled way over time. Other approaches, based on inherently self-stabilising algorithms, similarly promise to exploit, rather than conflict with, dynamic interactions and changing goals, although the realization of all these techniques remain elusive.

7

Conclusions

Pervasive computing systems offer the potential to deploy computing power into new areas of live not necessarily addressed by traditional approaches. It is important to note that many of these areas simultaneously address issues of wellness, social inclusion, disability support and other facets of major significance to society. The challenges remain daunting, however, at hardware-, software- and systemslevel. Pervasive systems must offer seamlessly-integrated services in a dynamic environment, with little explicit direction, as well as uncertain sensing and reasoning and must do so over protracted periods without management intervention. Existing research has generated existence proofs that applications can be constructed in the face of these challenges, but it remains to be demonstrated as to whether more complex systems can be deployed. To address these problems, we need to broaden our discourse in certain areas and revisit long-standing design assumptions in others. Interfaces must be considered widely, and firmly from the perspective of user modelling and model formation. Traditional programming language structures and design methods do no obviously provide the correct abstractions within which to develop pervasive applications. Correct behaviour must be maintained even in the presence of known-to-be-faulty input data, where it may be more appropriate to refuse to act rather than act incorrectly – or it may not - depending entirely on the application. We are confident that the existing research strands will be broadened and deepened as these challenges are answered. Acknowledgements This work is partially supported by Science Foundation Ireland under the projects, “Towards a semantics of pervasive computing” [Grant No. 05/RFP/CMS0062], “Secure and predictable pervasive computing” [Grant No. 04/RPI/1544], and “LERO: the Irish Software Engineering Research Centre” [Grant No. 03/CE2/I303-1].

References 1. M. Weiser. “The Computer for the 21st Century”. Scientific American, pp. 94–104. September 1991. 2. N. Streitz and P. Nixon. “The Disappearing Computer”. The Communication of ACM, 48(3), pp. 33–35. March 2005. 3. P. Nixon and N. Streitz. EU-NSF joint advanced research workshop: “The Disappearing Computer. Workshop Report and Recommendation”. http://www.ercim.org/EU-NSF/index. html. April 2004.

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4. M. Jonsson, (2002). “Context shadow: An infrastructure for context aware computing”. Proceedings of the Workshop on artificial intelligence in mobile systems (AIMS) in conjunction with ECAI 2002, Lyon, France. 5. P. Nixon, W. Wagealla, C. English, and S. Terzis, “Privacy, Security, and Trust Issues in Smart Environments”. Book Chapter of Smart Environments: Technology, Protocols and Applications, pp. 220–240. Wiley, October 2004. 6. The INTEL Technology Research Center for Independent Living. http://www.trilcentre.org. 7. L. Coyle, S. Neely, G. Stevenson, M. Sullivan, S. Dobson and P. Nixon. “Sensor fusion-based middleware for smart homes”. International Journal of Assistive Robotics and Mechatronics 8(2), pp. 53–60. 2007. 8. J. Bohn, F. Gartner and H. Vogt. “Dependability Issues of Pervasive Computing in a Healthcare Environment”. Proceedings of the first International Conference on Security in Pervasive Computing, in Boppard, Germany, pp.53–70. 2003. 9. G. Borriello, V. Stanford, C. Narayanaswami, and W. Menning. “Pervasive Computing in Healthcare”. Proceedings of the International Conference on Pervasive computing, pp. 17–19. 2007. 10. K. Adamer, D. Bannach, T. Klug, P. Lukowicz, M.L. Sbodio, M. Tresman, A. Zinnen, and T. Ziegert, “Developing a Wearable Assistant for Hospital Ward Rounds: An Experience Report”. Proceedings of the International Conference for Industry and Academia on Internet of Things 2008. 11. K. Farkas, J. Heidemann and L. Iftode. “Intelligent Transportation and Pervasive Computing”. IEEE Pervasive Computing 5(4), pp. 18–19. October 2006. 12. R. Cunningham and V. Cahill. “System support for smart cars: requirements and research directions”. Proceedings of the 9th workshop on ACM SIGOPS European workshop: beyond the PC: new challenges for the operating system, pp.159–164. 2000. 13. The JR-EAST Japan Railway Company Research & Development. The Smart Station Vision Project. http://www.jreast.co.jp/e/development/theme/station/station08.html 14. D. J. Cook, M. Youngblood, E. O. Heierman, III and K. Gopalratnam. “MavHome: An AgentBased Smart Home”. Proceedings of the First IEEE International Conference on Pervasive Computing and Communications, pp. 521–524. 2003. 15. B. Logan, J. Healey, M. Philipose, E. M. Tapia, S. S. Intille, “A Long-Term Evaluation of Sensing Modalities for Activity Recognition”. Proc. 9th International Conference on Ubiquitous computing (Ubicomp 2007) pp. 483–500. 16. M. Satyanarayanan, “Pervasive Computing: Vision and Challenges”. IEEE Personal Communications, 8(4), pp.10–17. August 2001. 17. D. Saha, A. Mukherjee. “Pervasive Computing: A Paradigm for the 21st Century”, Computer, 36(3), pp. 25–33. March 2003. 18. V. Stanford, J. Garofolo, O. Galibert, M. Michel, C. Laprun. “The NIST Smart Space and Meeting Room Projects: Signals, Acquisition, Annotation and Metrics”. Proc. ICASSP 2003 in special session on smart meeting rooms, vol.4, pp. IV-736-9 April 6–10, 2003. 19. J. P. Sousa, and D. Garlan. “Aura: an Architectural Framework for User Mobility in Ubiquitous Computing Environments. Software Architecture: System Design, Development, and Maintenance”. Proc. 3rd Working IEEE/IFIP Conference on Software Architecture, Jan Bosch, Morven Gentleman, Christine Hofmeister, Juha Kuusela (Eds), Kluwer Academic Publishers, pp. 29–43. August 25–31, 2002. 20. R. Weisman, Oxygen burst. The Boston Globe, June 21, 2004. 21. M. Román, C. K. Hess, R. Cerqueira, A. Ranganathan, R. H. Campbell, and K. Nahrstedt. “Gaia: A Middleware Infrastructure to Enable Active Spaces”. In IEEE Pervasive Computing, pp. 74–83, Oct–Dec 2002. 22. Cambridge. Sentient computing. http://www.cl.cam.ac.uk/research/dtg/research/wiki/Sentient Computing. 23. The Disappearing Computer Initiative. http://www.disappearing-computer.net.


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24. K. Cheverst, N. Davies, K. Mitchell, A. Friday and C. Efstratiou. “Developing a Contextaware Electronic Tourist Guide: Some Issues and Experiences”. Proceedings of CHI 2000, pp. 17–24, in Netherlands. April 2000. 25. J. Barton, T. Kindberg. “The challenges and opportunities of integrating the physical world and networked systems”. Technical report TR HPL-2001-18 by HP Labs. 2001. 26. The Easy Living Project. http://research.microsoft.com/easyliving/. 27. J. Coutaz, J. Crowley, S. Dobson and D. Garlan. “Context is key”. Communications of the ACM 48(3), pp. 49–53. March 2005. 28. The e-Gadgets Project. http://www.extrovert-gadgets.net/. 29. The Smart-Its Project. http://www.smart-its.org/. 30. D. Chalmers, M. Chalmers, J. Crowcroft, M. Kwiatkowska, R. Milner, E. O’Neill, T. Rodden, V. Sassone, and M. Slomen. “Ubiquitous Computing: Experience, Design and Science”. Technical report by the UK Grand Challenges Exercise. February 2006. 31. H. Gellersen, A. Schmidt, M. Beigl. “Multi-Sensor Context-Awareness in Mobile Devices and Smart Artefacts”. Mobile Networks and Applications, 7(5), pp. 341–351. 2002. 32. T. Kindberg and A. Fox. “System Software for Ubiquitous Computing”. IEEE Pervasive Computing 1(1), pp.70–81. January, 2002. 33. A. K. Dey. “Understanding and using context”. Personal Ubiquitous Computing, 5(1):4–7. 2001. 34. A. Schmidt, M. Beigl, and H. W. Gellersen. “There is more to Context than Location”. Computers and Graphics, 23(6), pp. 893–901, 1999. 35. C. Ghidini and F. Giunchiglia. “Local Models Semantics, or Contextual Reasoning = Locality + Compatibility”. Artificial Intelligence, 127(2):221–259, 2001. ISSN 0004-3702. 36. K. Henricksen, J. Indulska, and A. Rakotonirainy. “Modeling context information in pervasive computing systems”. Proceedings of the First International Conference on Pervasive Computing, pp.167–180, London, UK, 2002. Springer-Verlag. 37. H. Chen, T. Finin, and A. Joshi. “An Ontology for Context-Aware Pervasive Computing Environments”. Special Issue on Ontologies for Distributed Systems, Knowledge Engineering Review, 18(3):197–207. May 2004. 38. T. Strang and C. Linnhoff-Popien. “A context modeling survey”. In Proceedings of the Workshop on Advanced Context Modelling, Reasoning and Management, Nottingham/ England. Sepember 2004. 39. J. Ye, L. Coyle, S. Dobson and P. Nixon. “Ontology-based Models in Pervasive Computing Systems”. Knowledge Engineering Rev. 22(04), pp. 513–347. 2007. 40. G. D. Abowd. “Software Engineering Issues for Ubiquitous Computing”. Proc. 21st International Conference on Software Engineering, pp.75–84. 1999. 41. M. Czarkowski and J. Kay. “Challenges of scrutable adaptation”. Proc. 11th International Conf on Artificial Intelligence in Education, pp. 404–407. IOS Press. 2003. 42. A. F. Westin. “Privacy and Freedom”. Publisher: Bodley Head.1970. 43. J. Kephart and D. Chess. “The vision of autonomic computing”. IEEE Computer 36(1), pp.41–52. January 2003. 44. S. Dobson, S. Denazis, A. Fernández, D. Gaïti, E. Gelenbe, F. Massacci, P. Nixon, F. Saffre, M. Schmidt and F. Zambonelli. “A survey of autonomic communications”. ACM Transactions on Autonomous and Adaptive Systems 1(2), pp. 223–259. December 2006. 45. S. Dobson and P. Nixon. “More principled design of pervasive computing systems”. In Rémi Bastide and Jörg Roth, eds, Human computer interaction and interactive systems. LNCS 3425. Springer Verlag. 2004.

Chapter 2

Augmenting Materials to Build Cooperating Objects Kieran Delaney1, Simon Dobson2

Abstract The goal of pervasive computing systems and ambient intelligence (AmI) provides a driver to technology development that is likely to result in a vast integration of information systems into everyday objects. The current techniques for implementing such integration processes view the development of the system and object elements as very much separate; there is a significant inference load placed upon the systems to accommodate and augment the established affordances of the target object(s). This does not conflict with the ultimate vision of AmI, but it does limit the ability of systems platforms to migrate quickly and effectively across numerous varieties of object (in effect, creating a bespoke technology solution for a particular object). To begin the process of addressing this challenge, this paper describes the proposed development of augmented materials. These are materials with fully embedded distributed information systems, designed to measure all relevant properties, and provide a full knowledge representation of the material; in effect, the material would “know” itself, and its current status. The basic premise is not new; many systems techniques have proposed and implemented versions of this idea. Advances in materials technology, system miniaturisation, and contextaware software have been harnessed to begin to prove the possibility of integrating systems directly into the fabric of artefacts (e.g. smart paper, etc). Where augmented materials would differ from current approaches is in its focus on integrating networks of element into materials and employing the actual material and object fabrication processes to programme them. Keywords Augmented Materials, Smart Objects, Micro-Electro-mechanical Systems (MEMS), Sensors, Embedded Systems Wireless Sensor Networks, Smart Dust, Ubiquitous Computing, Ambient Intelligence

1 Centre for Adaptive Wireless Systems, Cork Institute of Technology, Rossa Avenue, Bishopstown, Cork, Ireland 2 Systems Research Group, School of Computer Science and Informatics, UCD Dublin, Belfield, Dublin 4, Ireland


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K. Delaney, S. Dobson

Introduction

The future of information technology systems is being driven by visions like ubiquitous, or pervasive, computing [1, 2] and ambient intelligence, or AmI [3]. In the AmI vision, which may simplistically viewed as a user-oriented evolution of pervasive computing, we surround ourselves with proactive, contextually effective and “always-on” interfaces that are supported by globally distributed computing and networking technology platforms. Such concepts are in many ways so broad that they have helped to prompt other new approaches, also represented through vision statements; in simple terms, these are software-centric (e.g. autonomic computing [4], proactive computing [5], etc) and hardware- or object-centric (Smart Dust [6], Smart Matter [7], Internet of Things [8], Disappearing Computer [9]). Logically, the goal of AmI provides a driver to technology development that will result in the close integration of information systems with what we consider to be everyday objects; research to build information systems into many different objects, such as furniture [10], clothes [11], Textiles [12], vehicles [13], aircraft [14], roads [15] and even materials such as paint [16] and paper [17, 18], is already well underway. This research is in many ways about providing required bespoke solutions to specific application domains. Concepts such as the Internet of things [8] seek to create methods to build active networks of these objects, which could potentially provide a foundation for realizing AmI. This encapsulates long-term research challenges framed in the context of hardware systems innovation by “hard problems” [19] that include reaching targets for size and weight, energy and the user interface. Thus, determining general approaches to creating these networks of embedded objects (and systems) becomes integrated with the methods employed to fabricate the objects themselves. It is now becoming commonly understood that solving such problems requires effective points of convergence for relevant research disciplines. In fact, although creating and sustaining coherent multidisciplinary initiatives is typically difficult, they can bring significant direct success and build greater frameworks to facilitate new discoveries (for example, miniature RF ID tags, created for applications such as asset tracking, are now being used to study the behaviour of wasps [20]) and lower barriers to broader implementation; new international collaborative programmes are driving a sharp reduction in the complexity associated with fabricating many types of objects, at least in prototype form [21, 22]. In Europe, a focal point of this type of multidisciplinary research has been the “Disappearing Computer” [9], a programme consisting of 17 collaborating projects [23]. The goal of this programme was to explore how people’s lives can be supported and enhanced through developing new methods for the embedding computation in everyday objects, or artefacts, through investigating new styles of functionality that can be engineered and through studying how useful collaborative behaviour in such interacting artefacts can be developed. A subsequent Disappearing Computer programme, entitled PALCOM [24], has focused further upon user-centric methods, developing the concept of palpable computing as an approach to “make technologies

2 Augmenting Materials to Build Cooperating Objects

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a lot easier to understand, use and construct on-the-fly” [25]. Related initiatives have been replicated globally [26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 7], and are increasingly driving the research agenda. For example, European research projects on cooperating objects, launched in 2005 [36], have helped to seed significant new EU initiatives on networked embedded and control systems [37] and the new European Technology Platforms programmes, EPOSS, on Smart Systems Integration [38] and ARTEMIS, on embedded systems [39]. One of the central challenges in developing the effective and scalable immersive technologies necessary to realise AmI is implementing a methodology that genuinely integrates the fabrication of “smart”, cooperating objects on a physical level with their creation on a digital level. The research programmes driving Moore’s Law can support this by providing improved performance coupled with scope for greater miniaturisation. However, this alone will not be effective in realising seamless integration. New avenues of research in wireless sensor networks [40, 41, 42, 43, 44] can underpin the development of novel sensor node formats and help in the derivation of the heterogeneous architectures required to build infrastructures for effective cooperating objects. These architectures will need to support adaptive, reliable behaviour for sustained periods, particularly where the objects are deemed to be of high value. Thus, a level of autonomous capability is required. A comprehensive solution to the goal of creating unobtrusive integrated services in everyday environments requires a fully realised co-design process enabling specific types of distributed platform to be developed and physically immersed in everyday objects. The nature of these platforms requires both self-managing and long-life embedded systems behaviour to be successfully integrated into this system model. Thus, realising these systems to a certain extent represents a convergence of grand challenges. One such conceptual system is “Augmented Materials [45]”, a challenge to develop “self-aware” materials to be used to compose augmented, or smart, objects.

2

The Augmented Materials Concept

We propose that physically embedded networks of distributed sensors and actuators can be systemically programmed to augment the behaviour of synthetic materials. We further proposes that the implementation of typical material processing techniques can provide a natural programming construct (or language) for the creation and assembly of functionally effective augmented (or smart) objects and ‘intelligent’ everyday artefacts from these materials. The idea is that the materials are infused with systems capability that allows a digital representation to be developed at a selected formation stage (e.g. curing) and maintained thereafter as an ability to report on status; status means the ability to effectively represent all non-negligible energy transitions taking place within and, at the interfaces of, the material. An effective implementation of this capability would yield a situation where any

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subsequent materials processing sequences would behave as programming (or actuation) steps. In this context, we propose to develop new techniques for embedding proactive systems into everyday artifacts. The basic intention is find a successful way to embed micro- and nano-sensing, processing and communications elements into a physical substrate. Through this approach, the material provides a physical means of “matching” to an environment, and a route to sensing it and the physical processes acting on the object translate into interface actions or semantic cues to the embedded software.

2.1

The First Vision Statement

The following vision statement was originally created as an attempt to capture what might be required in order to fully realise the ‘invisible computing’ concept proposed by Weiser. Its first iteration acknowledged the nature of the assembly of electronics, but did not immediately address true feasibility in the context of current microelectronics devices and systems. In the early stages we choose to defer to Moore’s Law [46] as the means through which form and function would ultimately merge. Of course, that assumption and the vision in itself provides no easy insight into what adaptation of this concept may be practically realised (now and in future). This was a process that commenced subsequently and is still underway; in fact, the greatest value of this first ‘story’ was in generating a common picture across relevant disciplines and enabling its feasibility to begin to be tested in the first place. The multidisciplinary interface generated has turned out to be one that is deep and growing. The concept of creating an augmented material is analogous to mixing additional component elements into an established material composite in order to affect a particular physical attribute (e.g. adding nanoscale elements to a ceramic in order to increase tensile strength). In augmented materials, the nodes, or elements, will be deployed into synthetic material through a typical mixing process, designed to distribute them randomly, but uniformly within the material. Once the elements are uniformly distributed, or mixed, a process of self-organisation can take place. This involves the digital creation of networks of elements and the definition of the elements’ functions based upon relative location in the material and the most appropriate physical parameters for these elements to monitor. For example a specific process to implement the network in augmented materials might follow this conceptual outline (see Fig. 2.1): ●

●

●

System elements are introduced while the material is being made and the fabrication process forms part of the system programming sequence. The physical distribution of the system is primarily correlated to its nature and secondarily to its shape; the pattern of how each maps to the other is an important part of the system’s physical implementation model. In implementation mode, the system will operate on an interrupt based characteristic, focused upon all energy transitions in the material; as a result the system node distribution will not necessarily be uniform.


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New Vision Deploy Autonomous Sensors (< 5mm3 modules)

Enable Scaled Distributed Systems Research

Light Light

Embed I-Seeds Systems into Materials

Proximity Proximity Strain Strain

Heat Heat Pressure Pressure

Fig. 2.1 The first vision of augmented materials

●

Most likely, the network will be systemically compartmentalized to specific parameters.

In the case of certain materials, where the formation process includes a liquid or viscous fluid stage, the elements could be designed and developed to be capable of limited 3-D motion. This would allow the physical self-organisation of the elements from the uniformly random to 3-D distributions that would optimise the element capacity and performance to all requirements in effectively measuring the physical parameters of the material. These distributions would become localised network groups that specialize in the measurement of specific physical stimuli for the entire material structure. This would contribute to the optimization of the element and network resources for the augmented material in question. The implementation of local network groups enables the initiation of a heterogeneous network from which the digital representation of the material could be composed, stored and communicated to an internet-level user-interface. This representation would be the first stage in implementing responsive capability; actuators are next distributed in the material in a manner correlated to its sensing architecture to create the capability for a controlled physical response to stimuli (for example automatically adjusting shape in response to a mechanical stress) or to a change in context (for example, a change in user-defined circumstances).

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K. Delaney, S. Dobson Light

Light

Light

Light

Light Proximity

Heat

Mobility

Heat

Strain Mobility Heat

Pressure

Pressure

Pressure

Pressure

Pressure

Fig. 2.2 The variation of local network groups could depend upon the nature of the material in which these groups are embedded

This heterogeneous network is by definition strongly correlated to the physical behaviour of the material itself. One could expect that element location, function and the structure of the local network groups would vary significantly depending upon parameters such as the rigidity of the material (see Fig. 2.2). This would require system specifications such as the resolution of the sensory devices to also vary according to these parameters, with a resultant impact upon the computational, power and memory requirements of the elements themselves. The nature of the material would also impact upon the physical size of the elements and upon their design; as a result, new design tools may need to become increasingly complex. The successful implementation of this concept of augmented material requires reliable communications between the local network groups to develop a full digital representation of the materials status (i.e. ‘self-knowledge’). This global material network should be capable of adjusting its structure and stored knowledge according to events that affect the material. An example is when the material is cut to a new shape (or shapes); under these conditions the network should alter to a new structure (or structures) correlated to the new shape(s). Further, for the augmented materials concept to be relevant the structure and data management actions of the embedded network should adapt also to the process of combining materials together to create smart objects. In this case, a networking action analogous to that of physically bonding two materials together should take place (see Fig. 2.3). This “digital bonding” should link the two material networks and extend the local network groupings across material boundaries to accommodate elements with common or similar tasks, and possibly alter the network structure (and/or element behaviour) based upon any relevant constraints developed by the fact that the materials are now physically bonded (e.g. when a flexible material is bonded to a rigid materials the resulting combination is rigid). Through the disciplines of physics and chemistry, developing a new material (or improving the performance of existing materials) is a long-term process that may take over ten years. Thus, fully realising augmented materials, where the physical and digital are so closely integrated represents a significant and very long-term challenge in itself. However, the framework for implementing augmented materials


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Fig. 2.3 The goal of an augmented material includes the successful implementation of “digital bonding”, or linking material networks in an object in a manner that is correlated to the actual physical infrastructure

in the future can be investigated now using current research and technology platforms; methodologies should be created to guide effective implementation of augmented materials as a practically integrated, physically heterogeneous infrastructure. In short, it is possible to create versions of augmented materials that roadmap the approach to this concept; in fact, practical examples exist that could be seen as direct building blocks [47, 48]. More specifically, numerous significant challenges in miniaturisation, sensing, networking and material integration will need to be addressed before the full concept becomes possible; however, roadmaps to achieve this are in progress [49]. As previously noted, the vision describes developments that have many parallels with work ongoing in wireless sensor networking. There remains the question of how existing technology platforms (i.e. internet-level systems, laptops, mobile phones, PDAs, etc) may be merged effectively with this approach, both to create gateway capability for the integrated “material” networks and to provide seamless services between augmented objects and those objects that will not be readily accessible to these materials (e.g. wooden furniture, etc).

2.2

Evolving the Vision

The process of creating objects through combining materials will be part of the systems programming (or configuration) sequence. Digital representations of physical interfaces will be required as the physical interfaces are created. The representations will also be based on material behavioral parameters, this time associated with

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the interactive effects between each material. The systems for each individual material will remain effectively autonomous, but will, through triggers from the assembly sequence, encompass the effects of the combination process. In some cases, where the effects on each material system are small, this will create an interface layer, which will behave rather like a new digital representation (a pseudo-material). In other cases, the impact will be large enough to fully alter each material’s behaviour, creating a coalescence of the two systems into a digital composite, which represents the status of both materials. The affordances of the object will be mapped through “material-system” to “material-system” association processes. This will enable an abstract representation that can be subsequently developed as a framework through the implementation (and evolution) of context-aware dynamic and user-driven systems. The full efficacy of the augment materials model will be tested by its capabilities in permitting the context layer to evolve well beyond predictable behaviour when the user is manipulating groups of such materially augmented objects. In this respect a direct evolution from current ‘context-awareness’ research is required.

2.2.1

Computation and Composition

An intelligent material must in many ways climb two learning curves simultaneously: the physical curve of miniaturisation, integration and subsystems assembly of components in small packages; and the informational curve controlling how sensor information can be fused and used to drive higher-level processes. Both of these areas hinge on a strong notion of composition, and this is the unifying theme of the approach (see Fig. 2.4). At its lowest level, computation in a smart material consists of providing a suitable programming interface for use on the individual components. A good example

Individual module local sensing and processing Smart material global representation Cluster of materials sensitive to external semantics

Fig. 2.4 Local sensing is aggregated and provides global representations of smart materials that can ‘cluster’ to create object level behaviour


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would be to provide software abstractions for the various sensors, actuators and communication sub-systems. A single component might (for example) sense the tensile stresses in its vicinity and make these available through an inductive communications medium. There is a substantial challenge in providing a usable programming model for such a constrained device, but it is a challenge common to most embedded systems. A smart material consists of a large number of components scattered through a substrate [50]. Each component has a local view of the material, reflecting only part of the material’s overall environment. The next stage of information integration is to synthesize the local capabilities of the individual components. Extending the example above, the material-level challenge is to fuse the local stresses into a view of the material’s current deformation under load. The material level can determine global information not available at the component level. The challenge is to allow this global information to be built up and maintained in a distributed and scalable manner, accounting for delays and failures at the component level. Using a distributed representation minimizes the consequences of local failures, improves parallelism and allows the use of cheaper individual components; it also introduces all of the standard distributed systems issues of concurrency and coupled failure modes, albeit on a smaller scale than is usually considered. The final stage of integration is inter-material, the purpose of which is to provide the “external semantics” of the materials and their behaviour in the world. A good example is where the materials of two smart objects are brought close together. At the component level this might manifest itself as a new ‘wireless’ communication channel between two previously separated component populations: this can be interpreted at the material level as proximity, possibly computing which material has moved to bring the two together, and their orientations. At the inter-material level this proximity might be interpreted as (for example) placing a smart book onto a smart table, which has semantic implications in terms of information transfer [51]. It is easy to see that there are challenges in composition across these stages. Components must be coordinated into a communications structure, and must provide their information and computation in a distributed and fail-soft architecture. Materials must be able to handle a range of information depending on the sensors available, and draw common inferences from different underlying evidence [52]. Clusters of these materials must compose to provide intelligible behaviour consistent with the expected properties of the artefacts they embody. Most programming environments for ubiquitous computing make heavy demands on both power and computation – a good example is the Context Toolkit [53]. While the lessons of such systems are vital, the techniques used are inappropriate to augmented materials. Other approaches such as swarm intelligence [54] do not appear to be able (at least in their current state) to capture phenomena with high semantic content – although they offer insights into lower-level issues such as communication and discovery. ‘Amorphous’ computing paradigms, while tackling lower-level issues than are appropriate for smart materials, offer insights into resource discovery and ad hoc routing in compositional systems [55].

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Event-based systems [56] are widely used in wide-scale distributed systems where they provide loose coupling between distributed components to help tolerate failures and variable latencies. As mentioned above we regard a ‘smart’ material as a “widely distributed system writ small”, in the sense that the properties observed are more similar to those of wide-area systems than traditional embedded systems. This means that techniques used on wide-area systems (for example locationsensitive event infrastructures) can be usefully re-applied. Event-based systems have known problems as programming environments, however, especially in representing complex algorithms involving shared knowledge. A compromise is to use events to maintain a distributed model of context, which is then queried and accessed as a unit. Shared models have been used extensively, for example as a component in n-tier enterprise architectures [57]. We may adapt these architectures to provide lightweight distributed representation and querying in the style of distributed blackboard systems. Inter-material composition sits comfortably in the domain of context-aware systems in which the major issues are in task modeling [58] and knowledge representation. Materials need a clear model of “what they do” at the highest level that relates closely to “what they sense” at the lower levels. In many ways the current research can be likened to the challenges of largerscale compositional environments, for example [59], in the sense of combining low- and high-level information cues and utilising dynamic populations of resources. This means that the approach can both build on and influence work in the wider community.

2.3

A Systems Description for Augmented Materials

2.3.1

The Local Systems Architecture.

The development of the augmented materials network will be based upon defined local and global systems architectures. The local systems architecture will be represent by small sets of nodes designed to measure physical parameters at specific locations in the material. The systems description could be determined by the development of two element categories – sensing elements and aggregating elements – which are evenly distributed through the substrate. These two classes’ gossip, but in different ways: ●

●

Sensor elements gossip with nearby aggregating elements by sending changes in their local states, which are then aggregated to provide a summary of the state of the local area Aggregate elements gossip with other aggregators, but exchange management information about which aggregate is summarizing a locale

The global systems architecture will collate and represent this local data at a material level.


2.3.2

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The High-level Systems Description

An artefact may be constructed from an augmented material at four distinct levels (see Fig. 2.5). At the physical level, the material exhibits certain structural properties such as stiffness, ductility, conductivity and so forth, which condition the physical applications for which it can be used. At the element level, each processing ‘node’ in the material functions as an independent component capable of local sensing, local processing and communications with nearby elements. At the material level, the individual elements co-ordinate their actions to present a global behaviour; at this level the local sensing information is typically integrated into a global view of the material. At the artefact level, the material can “understand” its function and relationships with other augmented materials in its vicinity. A good example here might be offered by building materials, where compositions of individual elements with embedded sensing and actuation could be used to significantly improve the capabilities of “adaptive” architecture [60] by combining physical properties sensed at the materials level (temperature, wind induced stresses) with artefact-level goals (heat retention, stability). A further categorisation of the construction of artefacts from augmented materials is required for practical reasons; many viable cooperating objects will be composed from materials that are not directly conducive to this physical integration process or to the concept. Thus, an approach to integrating such forms into the augmented material construct is required. An artefact that is composed from a single augmented material, or from a number of shapes formed from that single material, is described as being intrinsically augmented. An artefact that is composed from a number of differing (but fully developed) augmented materials is described as being compound augmented. An artefact that combines an augmented material with a physically connected computational or sensory capability in the form of a dedicated module is described as a hybrid augmented artefact. An artefact that applies the augmented material system

ARTEFACT

PSEUDO-AUGMENTED

MATERIAL

HYBRID AUGMENTED

ELEMENT

COMPOUND AUGMENTED

PHYSICAL

INTRINSIC AUGMENTED

(a) Augmented Materials Systems Levels

(b) Categorisation of Artefacts

Fig. 2.5 A description of (a) the hierarchical levels within the augment materials system and (b) a categorisation of artefacts made in full or part from an augmented matter process

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and networking approach through computational or sensory modules physically distributed (and bonded) to one or more of its non-augmented material layers is known as a pseudo-augmented artefact (see Fig. 2.5).

3 3.1

Previous Research Top-Down and Bottom-up Methodologies

Numerous research domains are associated with increasing the functional capabilities of material systems. These domains may be viewed as taking ‘top-down’ or ‘bottom-up’ approaches. In the domain of material research, dominated by a ‘bottomup’ perspective, the influence of biological systems is having its impact; a particular example is that of self-repairing polymeric composites [61]. In this case, a healing capability is imparted through “incorporation of material phases that undergo self-generation in response to damage”. A related research activity is that of selfregulating materials [62]. These can be created by using magnetostrictive particles as “tags” in a host composite material; their interrogation and response indicates the location of damage sites. These techniques are clearly relevant to augmented materials and exhibit a form of autonomic behaviour that would have clear value when integrated into larger intelligent systems. Logically, as materials demonstrate this type of increasing versatility, an infrastructure must be created to merge digital and physical behaviour and to harness this potential. The concept of immersing the computer more fully into the fabric of our daily lives, as represented in the Disappearing Computer programme [9], is central to achieving a genuine representation of AmI. Smart systems development in such programmes are typically dominated by a ‘top-down’ or systems-oriented perspective. This particular programme applied a multi-project approach to developing solutions for diffusing information technology into everyday artefacts; a focus on physical integration was provided by a small selection of projects, such as FiCom [63], and a focus on systems by the majority of projects, including Smart-ITs [64], Extrovert Gadgets [65] and GLOSS [66]. Although dominated by a ‘top-down’ perspective, specific strands of research took a more targeted approach, seeking to reinvent hardware systems in more radical forms. The FiCom, or Fibre Computing, project investigated new forms of silicon substrate to provide literally flexible platforms that could be more effectively integrated into many kinds of objects. Other research in creating novel silicon substrates has also been undertaken separately, including the implementation of spherical silicon circuits and transducers [67]. In these cases, the inherent potential of silicon is being investigated, though not necessarily yielding results that directly accelerate the realisation of AmI. Research in this area has uncovered intriguing possibilities for using silicon in application domains, such as the development of smart bandages. Perhaps more effective, though not less inventive, is the increased


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investigation, and use, of thin silicon, specifically for smart card technologies and high-density 3-D integration [68, 69, 70]. Numerous approaches have proved successful and are a focus of system-in-a-package solutions for electronics applications [71, 72, 73]. The progress of silicon technologies under Moore’s Law [46] has also underpinned implementation of system-on-a-chip solutions. These siliconoriented approaches to interconnection and packaging offer significant potential to develop new interfaces between materials and electronics systems and, as such, represent a key investigative medium through which the ‘top-down’ or ‘bottom-up’ approaches may ultimately merge.

3.2

Research on Hybrid Systems Integration

Physical Integration techniques, related to the system-in-a-package platform, are under investigation within the field of microelectronics itself. The topic of integral passive components [74] is active; embedding passive components into package and board substrates has the potential to minimize the assembly overhead for lowvalue passive components and thus reduce overall costs. In many respects, it also reflects the challenges inherent in creating any integrated technology platform; managing material behaviour invariably requires trade-offs in the design of fabrication and assembly techniques in order to create a balance between functionality and physical integrity [75]. The system-in-a-package platform has provided a driver for numerous fabrication and assembly techniques, including flex technologies [76], 3-D multichip systems [77], flip-chip technologies for circuits and sensors [78] and others; these support implementation of embedded systems and, ultimately, AmI. Some of these techniques have progressed to, or influenced, other vibrant research areas, such as wireless sensor networking, where there is a driver influenced by the vision of smart dust [6] for the miniaturisation of sensor nodes – current approaches vary but include using innovative thin silicon fabrication and 3-D assembly techniques [79]. These techniques are important to the establishment of miniaturised nodes that can be composed as embedded elements for an augmented material. An inherent part of the development of augmented materials is distributed, embedded sensing and, ultimately, actuation. Previous research does provide certain insights into approaches that may be suited to the distributed nature of an augmented material system. For example, an investigation on compliant systems [80] has provided a mathematical framework for distributed actuation and sensing within a compliant active structure. The method, which synthesizes optimal structural topology and placement of actuators and sensors, was applied to a shape-morphing aircraft wing demonstration with three controlled output nodes. Other investigations, focused within the domain of electronic packaging, investigate sensor devices that could be adapted to monitor material behaviour [81]. They also highlight the negative impact of embedding electronics in polymeric materials [82] and the necessity for care in the design of both the sensor/ aggregator element substrates and in the integration process itself.

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3.3


Wireless Sensor Networks

Much of the more practical wireless sensor network (WSN) initiatives describe physically large and heterogeneous systems based upon specific drivers, such as the EU water-framework directive [83]. Other areas provide clear potential for significant markets. The progress of RFID technology is particularly interesting in this regard. The emergence of cost-effective tag production technologies [84, 85] has opened select exploitation routes and avenues for innovation that relate closely to the immersive concepts of the Disappearing Computer (e.g. tag readers embedded in shelves progressing to a “smart shelf”), expressed as an “internet of things” [8]. The nature of WSN research, and its numerous challenges, has necessitated the development of a toolkit approach [86, 87] for supporting investigative programmes. This approach is not alone useful in sensor networking, but a requirement in the studying the architectural requirements for the effective, autonomous operation of distributed embedded systems. Toolkits were developed as part of the Disappearing Computer programme in projects such as “Smart-ITs” [63], “Extrovert Gadgets” [64] for this very reason. Specific toolkits [88] can be evolved in the Augmented Materials programme to implement practical investigations of local sensor (node- or element-level) and global (network-level) material behaviour. Autonomous sensor platforms, including inertial sensor systems [89], wearable sensors [90] and environmental sensors [91] currently exist in a wireless sensor node form factor; these are suited to providing a foundation for investigative studies on the architectures of the distributed, embedded elements. The ability to enable the control of certain aspects of the behaviour of autonomous systems is particularly important. Emerging subsystems, such as modular robots [92, 93], self-sensing sensors and actuators [94, 95] and reconfigurable wireless sensor nodes [96] are very relevant to this approach and can be integrated with the toolkits to develop the simplest feasible sensing and computational elements. Current research into the development of chemical sensor arrays [97] can also provide insight into the challenges and opportunities for employing distributed sensing techniques using suitable element architectures.

3.4

Related R&D Concepts

3.4.1

Smart Floors, Smart Matter and Digital Clay

Once concepts and grand challenges become in some manner established, they tend to engender new iterations; thus, either directly or otherwise, they are constantly evolving. From Weiser’s vision of ‘invisible computing’ and the growth of ubiquitous/pervasive computing through ambient intelligence, to more recent ideas, for example ‘Everyware’ [98], there is a constant flux around creating a deeper understanding of the future technologies that should exist in a knowledge society.


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An underlying theme in these concepts, that of unobtrusive and intuitive interaction, has provided a driver for hardware- or object-oriented concepts, such as physical computing [99], haptic computing [100], sentient computing [101] and tangible bits [102]. In this context, ‘objects’ of particular importance in our everyday environment have become the focus of augmentation research. One of many possible examples is the smart floor. An avenue of recent research in this domain has yielded the ‘magic carpet’ [103], which is comprised of a grid of rugged piezoelectric wires hidden under a 6 × 10 foot carpet coupled with Doppler radars to measure the upper body motion of users. The ‘Litefoot’ system [104] is a 1.76 meter square, 10 centimeter high slab, filled with a matrix of optical proximity sensors. The ‘smart floor’ [105] used load cells, steel plates, and data acquisition hardware to gather (ground reaction force) GRF profiles and non-invasively identify users to an accuracy of over 90%. A pressure sensitive floor system [106] was developed as a high-resolution pressure sensing floor prototype with a sensor density of one sensor per square centimeter designed to support multimodal sensing; the design integrated closely with video, audio and motion-based sensing technologies. This is indicative of the benefits of creating systems that support interoperability as is highlighted in research on networked embedded systems and cooperating objects. In fact, individual objects typically provide incomplete, or narrowly defined, services. Thus, objects should access broadened capabilities through cooperating; as systems that contain sensors, controllers and actuators they should communicate with each other and be able to achieve a common goal autonomously. This is inherent in the underlying platforms required for ubiquitous computing and to some extent this has been extrapolated through the concept of the ‘internet of things’ [8], where the principles that created the internet are being employed to investigate how networks of everyday objects can reach an equivalent level of scale, computing power and of course, effectiveness. Networking and distributed computation can also be built into individual ‘objects’ to address aspects of their performance. The Z-tiles project [107] developed another form of smart floor by building a self organising network of nodes, each connected together to form a modular and flexible, pixilated, pressure-sensing surface. This project is particularly interesting in relation to the concept of augmented materials because it utilizes a distributed networking approach that offers performance and scalability. In particular, as individual Z-tiles provide building blocks for both the physical floor space and for the underlying sensor and computational network, it is much closer to an instantiation of aspects of the augmented material concept than many other integrated sensing techniques. A number of other research areas also correlate with aspects of this concept. The emergence of nanotechnology and its potential, as crystallized in visions like ‘smart dust’ [6] has prompted a number of concepts based upon the merger of matter with electronics. Starting with the identification and use of materials with ‘smart’ properties, such as shape-memory alloys, and then the evolution of ‘intelligent materials’ as an topic of study, the concept of ‘Smart Matter’, introduced by PARC in the early 1990s [7], became a focal point giving a specific focus to an

34


evolution of the above approaches. The concept, which “consists of many sensors, computers and actuators embedded within materials” targeted MEMs specifically, and linked itself to nanotechnology, distributed management techniques and ultimately to distributed control, proposing a multihierarchy [108] as a control organization supporting systems stability. This initiative remained active until around 2000 and then devolved into research activities on wireless sensor networks, MEMs technologies and robotics. The activities on robotics evolved the concept to a form of “digital clay” [109], formed from stripped down modular robots – the use of the term clay conveys the intention that the modular robots have no active coupling or motion features and any adjustments in assembly must be made by the user.

3.4.2

Programmable Matter, Claytronics and Paintable Computing

Amorphous computing [54] focuses upon investigating ‘system-architectural, algorithmic, and technological foundations for exploiting programmable materials’ where ‘atoms’ are based upon an IC with an on-board microprocessor, program memory and a wireless transceiver, that has been miniaturised to the size of a small match head and powered parasitically. The term programmable matter as outlined here refers to one interpretation, that of a collection of “millimeter-scale” units that integrate computing, sensing, actuation and locomotion mechanisms. It has also been utilized to describe methods for “exploiting the physics of materials for computation” [110], which resulted in the creation of the field programmable matter array; liquid crystals are cited as a potential example of this type of matter [111]. In the context of augmented materials, there is a clear overlap when one considers programmable matter to include materials that incorporate large numbers of distribute programmable elements that react to each other and to the environment surrounding the material. Fully realised, it evolves to a material in which the properties can change on demand, thus, enabling the material to programme itself into any form. Here, the programmable matter in question would be based upon artificial atoms, of which the quantum dot is the most cited example, and, hypothetically, would be composed of structures such as ‘Wellstone’ – a nanoscale thread covered with quantum dots [112]. The focus of these research topics is very much in the domain of nanotechnology. However, specific concepts that build upon programmable matter can be related to the creation of augmented materials, particularly in providing routes to novel, highly miniaturised elements and in providing the scope for analysis of systems architectures that transition micro-nano-scale boundaries while maintaining connectivity with established the heterogeneous infrastructure. One such concept is that of claytronics [113], which explores methods to reproduce moving physical objects. A similar concept, known as ‘utility fog’ (i.e. polymorphic smart materials [114]) has also been described. Claytronics is based upon the idea of dynamic physical rendering, where programmable matter is used to mimic a physical artifact’s original shape, movement, visual appearance, sound and tactile qualities. The programmable element in this case is the claytronic atom, or catom; this is a mobile, reconfigurable computational unit that has no moving parts,


35

but is capable of communicating with, and sticking to, other catoms. According to the concept, power would typically be externally sourced through a table, or similarly suitable support artifact. The core of the concept is in creating convincing physical moving 3-D replicas of people or objects, including tangible and convincing representations of attendees at virtual meetings; a case study on a 3-D fax machine using claytronics is described in [115]. One suggestion derived from this case study was the use of catoms of different sizes where a skeleton of the object, or entity in question, is created using larger modules and smaller modules then selectively latch onto this skeleton to complete the ‘copy’. This suggests a form of heterogeneity that can be harnessed by other approaches to optimise performance; in this context, the table structure and larger catoms could be formed as load-bearing, sensor-aware augmented materials that act to ensure the completeness of the rendering process, while the miniature catoms fill in the detail of the ‘copy’. A second concept is paintable computing [116]. This is described as ‘an agglomerate of numerous, finely dispersed, ultra-miniaturized computing particles; each positioned randomly, running asynchronously and communicating locally’. In some ways, this is close to the description of the formative processes for pure augmented materials as both approaches describe elements, or particles, that are dispersed randomly and are capable of local communication. The physical test-bed developed as part of the paintable computing investigation is also of interest, the Pushpin computing wireless sensor network platform [117]. This is a multihop wireless sensor network of 100 nodes built onto a tabletop of one-square-meter area. The nodes have the form factor of a pushpin and can be inserted into a large specially constructed power plane. The pushpins, which are easily moved across the power plane, use IR transceivers to communicate locally and have a modular, stacked architecture that permits high levels of reconfigurability; this essentially creates a 2-D sensor layer suitable for the study of numerous distributed ad-hoc sensing applications. The ability of the system to determine relative location, as is required with paintable computing and augmented materials, makes this a highly flexible emulation tool. Further work was performed by the same researchers [118] on rich sensory systems (i.e. electronic skin) through the development of a sphere tiled with a multimodal sensor/actuator network, known as a TRIBBLE (Tactile Reactive Interface Built by Linked Elements). A similar approach to Pushpin Computing was adopted within the Pin&Play project [119]. The nodes are attached to a physical medium in the same manner as the pushpins; in this project, the board was built using multiple mesh layers to provide a medium for both data and power, permitting the network to be developed in this way. Implementing network connectivity using surfaces is an approach that is also employed in the ‘Networked Surfaces’ concept [120]. Objects are augmented with specific conducting paths, which when these objects are physically placed on the surface, enable connection through a handshaking protocol; the protocol assigns functions such as data or power transmission to the various viable conducting paths and, thus, create the network. Both of these concepts provide insight into enabling methodologies for networking in augmented materials at a prototype level – the challenge in this context is to evolve the approach from 2-D surfaces to 3-D embedded elements.

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3.4.3

Cooperating Objects and Spimes

The evolution and use of smart objects and appliances, such as those employed for ‘networked surfaces’ has progressed currently to gadget-level operability; the feasibility of integrating sensing, actuation and computation into objects has been amply demonstrated. Further, the potential of smart objects has been demonstrated to the extent that engaging in investigations to effectively network these objects together (i.e. cooperating objects) is now the primary research challenge. A full conceptual construct, called the Spime, has been developed to investigate what this might ultimately become. The term Spime has been proposed to describe an object that can be tracked through space and time throughout its lifetime [121]. Specifically, it should be possible to track the entire existence of an object, from before it was made, through its manufacture, its ownership history, its physical location, until its eventual obsolescence and the re-use/recycling process for new objects. It requires, at least, the convergence of six emerging technologies: 1. A small, inexpensive means of remotely and uniquely identifying objects over short ranges, for example RFID technology 2. A mechanism to precisely locate something on Earth (e.g. GPS) 3. A way to mine large amounts of data, similar to internet search engines 4. Tools to virtually construct nearly any kind of object, similar to computer-aided design 5. Processes to rapid prototype virtual objects into real ones, such as threedimensional printers 6. Effective object life-cycles: ‘Cradle-to-cradle’ life-spans for objects and cheap, effective recycling The Spime offers an appropriate framework for the type of object that should be constructed from augmented materials; thus, these technical requirements must be supported from within the fabric of an augmented material, if a genuine level of ‘self-awareness’ is to be developed in the material composite. However, for reasons of cost and fabrication, it is impractical to disperse ‘heavy’ electronics subsystems, such as GPS trackers, within augmented materials. Thus, in seeking an optimization of the full electronic system it will be necessary to develop a heterogeneous format, which embeds individual GPS-like subsystems at the object-level and which employs augmented materials, if constructed effectively, as a distributed sensor/actuator foundation in the realization of Spime-like behaviour. This follows the description of the hybrid augmented artifact in section 2.3.2.

4 4.1

Practical Augmented Materials Miniaturised Sensing Modules, or Elements

A core part of the successful development of an augmented material is to build suitable networkable sensor modules. These modules would be capable of (a) localised


37

sensing of relevant physical parameters, (b) local management of the data collected from sensors, (c) self management in terms of performance, lifetime and long-term data integrity and (d) communication with “nearest neighbor” modules, or local aggregators, to manage the data effectively. Most, if not all, of these targeted capabilities are the subject of current research in wireless sensor networking programmes throughout the world (for example, within the node-building programme at Tyndall National Institute [122], which is addressing the challenge of implementing miniaturised, 3-D and planar wireless sensor nodes. The focus of this programme operates across a number of node sizes, but mostly towards an architecture and assembly process for nodes with a typical mean dimension of 10mm and 5mm. In line with the goal of ‘smart dust, the research programme also seeks to push the boundaries of microelectronics by building a very highly miniaturised node, of the order of 1mm in dimension; novel thin silicon and thin flexible circuit assembly techniques must be employed to achieve this. The priority in developing modules with a size at, or below, 5mm is in providing adequate miniaturisation techniques for the purpose of transposing effective elements of the system’s functionality. In Fig. 2.6, a conceptual schematic (developed to support the original augmented materials concept) is shown to illustrate how a augmented material sensor element might be fabricated as a 5mm module. The hardware miniaturisation process applies numerous enabling technologies for high-density integration where the packaging material is largely removed, and the targeted form factor of the modular units is a stack of ICs. One methodology, upon which the above module concept is based, is the use of thin flex and thinned silicon, which is assembled using a process of flipping a number of silicon ICs and bonding them (face-down) to the flex; the element package ‘stack’ is created by folding the flex (as shown is Fig. 2.7). A fully functioning module could include bare die versions of commercially available IC microprocessors, wireless chipsets, and Chip Stacking (Thickness~50 microns) Flex Folding thickness (3~5 microns per layer)

Three Dimensional Interconnect of Thin ICs using Flex Folding

Assembly of Miniaturised Nodes Substrates and Components

Fig. 2.6 Conceptual Version of a Flex and 3-D Silicon Assembly for a miniaturised Sensor Element (e.g. 5mm modules)

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Fig. 2.7 Practical prototyping process for building 5mm modules [123]

Fig. 2.8 The figure shows an early conceptual drawing of a generalized highly miniature sensor element, of the order of 1mm in size. Research on areas of the fabrication and assembly requirement for this version have shown that while prototype versions could be build significant challenges may exist in translating to an effective volume of production

micro-sensors; however, it is more likely that specific ASIC designs will have to be made to achieve optimised functions, particularly for network-level performance. The implementation of 1mm modules, the “intelligent seeds” will require significant levels of innovation in hardware platforms (See conceptual outline, created in the early stages of the vision development process in Fig. 2.8). In this regard, the development of novel substrates, represented in the form of the silicon fibres (of the order of 50 microns wide by 1 micron thick), is extremely important, and issues such as substrate processing and handling become central to effective fabrication and assembly. Techniques with high potential for success here include self-assembly processes, which bridge that gap between Micro- and Nano-scale assembly.


4.2

39

Networkable Embedded Sensing Elements

The practical implementation of augmented materials in the medium term requires the physical integration of networkable sensor elements (into materials) to be adapted to the current capabilities of hardware interconnection and packaging technology platforms; effective use of these platforms should permit the augmented materials concept to be proved successfully even if the elements ultimately require further miniaturisation. A current approach is based upon embedding the miniaturised sensor elements in a mold of the material, creating pre-forms (see Fig. 2.9) that in isolation behave as autonomous sensing/computation elements and, when physically bonded together (e.g. through a heat step), form the augmented material construct as a two-dimensional layer. This bonding process should enable networking (and “digital bonding”), creating local-global data management and communications infrastructure and providing a viable augmented material behaviour for further study. The implementation of a full network of sensor elements integrated within a material (to provide a full state description of that material) brings challenges in complexity, and ultimately, cost. The use of relatively simple sets of physical sensors to monitor material behaviour offers a potentially promising approach to managing these challenges. However, utilising these types of sensors may require significant additional computational power and memory to resolve and manage the data. It is important to investigate the most appropriate optimisation of an augmented material network, ensuring the highest level of simplicity, by evaluating heterogeneous networks of sensing and computing elements; toolkits for wireless sensor networks will be employed as they offer the greatest flexibility in completing the analyses. The development of viable control systems behaviour using augmented materials is ultimately an enabling feature that would maximise the value of this technology platform. In principal, this would include embedded networks of actuators in augmented materials that are controlled by the network of sensor elements; full realization of this aspect of the system is a significant challenge.

Fig. 2.9 This shows the first stage implementation of augmented materials using nodes integrated into material pre-forms that can be physically bonded together using a heat step

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5


Conclusion

Creating smart spaces is the focus of much research attention, not least because it forms a core part of realising Ambient Intelligence in the future. Ambient Intelligence describes “the convergence of ubiquitous computing, ubiquitous communication, and interfaces adapting to the user. Humans will be surrounded all the time wherever they are by unobtrusive, interconnected intelligent objects”. These objects (e.g. furniture, DIY tools, office equipment, etc) will be infused with sensory and computational capability to create an information society characterised by high user-friendliness and individualized support for human interaction. A number of conceptual frameworks exist to enable this, including augmented materials; materials that can describe - even ‘know’ - their own status and can be used to build smart objects using the object fabrication process as a programming method. In practical terms this will become a heterogeneous system linking networks of sensors that are physically embedded in objects with internet-level information management systems that enable collections of smart objects to collaborate to provide proactive services to the user. The full realization of augmented materials is a significant challenge on a number of levels. Key research issues in this regard will include (but are not limited to): investigating effective processing and assembly technologies for 3-D integration of computational platforms and sensor subsystems into the appropriate element sizes; creating a packaging technique for the element suited to the parameters of the target material to be augmented; researching power supply, management and optimisation issues based upon the availability of constrained power sources (e.g. rechargeable, portable batteries) supplying numerous elements with a requirement for distributed power management at the material level. From a material-and network-level, the following issues will be important: investigating the computational requirements of individual elements, specifically processor requirements for networking and local sensor data management as well as associated memory capacity needs; investigating the most appropriate means of network communication and analysing the effectiveness of combining both wired and wireless communications formats for appropriate augmented materials assembly formats. It will also be particularly important, as part of a multi-disciplinary effort, to relate progress in this domain to that in other overlapping areas, including researching the potential system analogies with wireless sensor networks and smart, or cooperating, object infrastructures.

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Part II

Device Technologies Microsystems, Micro Sensors and Emerging Silicon Technologies

1.1

Summary

Sensors and actuators represent an important interface between the human user and electronic systems. Many of these devices are fabricated in silicon. While it should not be expected that silicon will be used in all of the devices and subsystems that will grow and integrate to form Ambient Intelligence (AmI), the material’s role in driving Integrated Circuit (IC) technology and its use in Micro-Electro-Mechanical Systems (MEMS) make it central to any viable AmI solution. This part provides an overview of relevant silicon sensor devices and, in particular a selection of MEMS devices, which have been developed and which are likely to play a significant role in future smart systems. The second chapter in this section looks at silicon itself, providing an insight into how silicon circuits are fabricated. More importantly, the chapter also looks at silicon as a material with the potential to evolve. Current ‘traditional’ silicon sensor devices will complete only part of an AmI system. New forms of sensing will need to emerge and existing devices will need to be transformed, becoming embedded in objects and spaces that cannot currently be accessed. Silicon has a significant role to play here, beyond the established circuits, devices and subsystems. The material’s versatility means it will be the substrate for many of the new sensing (and actuation) solutions that will be created in building the AmI infrastructure.

1.2

Relevance TO Microsystems

As this section is about Microsystems devices, the relevance is obvious. This section provides a snapshot of this large technology area to those with limited knowledge of silicon and microsystems devices. For those with more experience and expertise in MEMs technologies and their component materials, this section provides a frame of reference for the role of these technologies in creating the AmI infrastructure into the future.

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1.3

Part II Device Technologies


There are numerous publications that would support a deeper understanding of MEMS devices and silicon technologies; this is a very large area of research and innovation. There are numerous references provided in the two chapters. The following two references should also offer useful sources of further information to those who may interested in learning more. The first is the MEMS/Nano Reference shelf itself, of which this book forms a part, which is a growing repository of information to those interested in the broad technology issues for MEMS or in the specific challenges for individual devices. The second is a text providing a detailed insight into many aspects of silicon circuit fabrication, the behaviour of the material itself and its future directions. 1. S. D. Senturia (Series Editor), The MEMS/Nano Reference Shelf, Springer Publishing 2. P. Siffert, E.F. Krimmel; “Silicon: Evolution and Future of a Technology”, (Eds.) 2004, XIX, 534 p. 288 illus. ISBN: 3-540-40546-1

Chapter 3

Overview of Component Level Devices Erik Jung

Abstract Ambient intelligence (AmI) relies upon the integration of sensors with read-out and signal conditioning circuits, on feed-back mechanisms (e.g. actuators) and not least on the integration of telecommunication components to link these building blocks to a central unit or to a set of distributed computing entities. Sensors represent the ‘eyes’, ‘ears’, ‘nose’ and ‘touch’ equivalents of the human senses and based upon these, a multitude of Ambient Intelligence (AmI) scenarios have been developed [1–3]. Beyond that, sensors provide access to parameters not perceived by humans, enabling additional monitoring, prediction and reaction scenarios [4]. This chapter provides an overview of the sensors and in particular the micro-electromechanical system (MEMS) devices that have developed to provide an AmI sensor interface in the future. Keywords Micro-electro-mechanical system (MEMS) devices, Bulk micromachining (BMM), Surface micro-machining (SMM), low power sensors, acceleration, gyroscope, pressure, vibration, shock, humidity, microphones, Bio-and chemo-electrical sensors, energy scavenging, energy storage.

1

Introduction

Among the array of sensor variants suggested for use in AmI are thermal, pressure, radiation, vibration, acceleration sensors, and also optical and bio-sensors, which leverage innovative detection mechanisms (e.g. plasmon resonance) and bio-electronic coupling, incorporating living cells in combination with sensitive electronics. Circuitry to connect the sensor signal (usually an analog output) to the digital world requires low power, high sensitivity and - not least - ruggedness against the environmental conditions to which the sensor might be exposed (e.g. high energy radiation). The latter is also true for the electronics managing the communication to the outer world. The frequency of operation might be determined by the ambient

Fraunhofer IZM, Gustav-Meyer-Allee 25, 13355 Berlin, Germany


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E. Jung

conditions, or by the transmission range to the central unit or to the next distributed entity [5]. The protocols employed by the telecommunications circuitry need to perform with low power consumption and high reliability for appropriate signal integrity in potentially noisy environments [6]. The autonomy of AmI systems may build on ultra low power consumption circuitry, on low transmission rates and on low duty cycles to maintain battery lifetime for an extended duration. However, modern microfabrication has also come up with innovative concepts for energy harvesting from the ambient environment. Solar energy can facilitate applications where there is exposure to the open sky and sunlight. Thermal energy harvesters, which rely on small temperature differences between two terminals, have been reported to generate µW when attached to human skin. Larger temperature differences are also possible, for example, as observed when the attachment is made to technical equipment and this will be advantageous to their use. Vibration and acceleration harvesters convert mechanical energy (e.g. from a moving human) into µW of electrical power. Harvesting energy from ambient radiation has also been proposed and the establishment of a dedicated infrastructure for this has recently received attention [7, 8]. An issue common to today’s harvesters is the need to convert the harvested electrical charge with varying voltages and currents into a useful stream of electrons and into a storage device. These converters need to be optimized for the expected mission profile, and as of today, are still major contributors to losses in the system [9]. Self discharge of storage devices is another issue that prevents, in many cases, a full autonomy for AmI building blocks. Assembly and packaging has become established as a potentially pivotal aspect in the realization of AmI building blocks. These ‘modules’ need to be unobtrusive and they should not prevent the entity (human, animal, technical equipment) that is being monitored from working with best efficiency. They need to be rugged enough to withstand the rigors of everyday use. They need to have all of the interfaces in place to monitor their ambient conditions (e.g. gas sensors, which require fluidic ducts) without compromising their manufacturability. And – not least - the fabrication process should be low cost, second sources should be available and the technologies employed should be scalable from small to large volumes. Combining modern sensor technology, electronic mixed signal processors and embedded transceivers with advanced assembly techniques, ambient intelligence is now becoming reality.

2 2.1

Sensors for Ambient Intelligence Low Power Sensors using MEMS technology

Sensors are the gateways from the ambient environment to the electronic intelligence. Many sensors encountered in the past, however, needed to be driven by a supply of significant electrical power. This would render them useless in the

3 Overview of Component Level Devices

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context of “intelligent ambient sensing”, as power requirements are one crucial aspect of system autonomy and central to a system’s acceptance by the user. Over the past decade, silicon micromachining has resulted in the replacement of a large number of conventional sensors by their micro-electro-mechanical system (MEMS) counterparts, fabricated mostly in silicon. Two major techniques are available for sensor fabrication when using the semi-conducting silicon material; these are namely bulk micromachining and surface micromachining. Bulk micro-machined (BMM) devices rely upon the structured removal of large amounts of silicon from the wafer, thereby creating, for example, thin membranes, hinged proof masses or robust capacitive sensors [10]. Depending upon the etching process, crystalline orientation will provide a preferential removal (anisotropic etching) of silicon or the sequence will be, more or less, independent of the crystal orientation to the etched plane (isotropic etching) [10]. Fig. 3.1 shows, through a schematic, the difference between the two etching processes, while Fig. 3.2 depicts a bulk micro-machined capacitive acceleration sensor. Capping (i.e. placing a cap over all, or part, of a sensor device) provides protection and may even add to the functionality of the device (See Fig. 3.3). Capping can be performed by a multitude of processes; the workhorses are glass frit bonding and anodic bonding [11]. Electrochemical etching provides another method to exert process control [12]. In all cases, a stop layer, or exact time control of the process, is required to form the desired structure in the z-dimension, while the lateral features are defined by a masking process. The resulting structures are defined within the bulk of the silicon wafer, hence “bulk micromachining”. Surface micromachining (SMM), however, defines the structures by selective removal and deposition of thin layers on top of the surface of the silicon (or an alternative material) substrate (See Fig. 3.4).

Fig. 3.1 Schematic of isotropic and anisotropic etching

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Fig. 3.2 Bulk micro-machined comb structures for capacitive sensing (courtesy Freescale)

Fig. 3.3 Bulk micro-machined accelerometer, with top and bottom cap providing electrode functionality (Fraunhofer IZM Chemnitz)

Polysilicon, oxides and nitrides, as well as metal layers, are typical candidates to build these structures; they are defined laterally by photo-masking and, in the z-dimension, by the deposition thickness of the respective (multi-) layers (See Figs.3.5 and 3.6). Surface micromachining, dry, plasma-based etching processes have emerged and were associated with surface micro-machining. Over the past decade these have evolved to also cover the domain of bulk micromachining with highly increased material removal rates [14, 15]. (See Fig. 3.7) One of the advantages of the MEMS processes is the potential for miniaturisation, as shown in Fig. 3.8, which comes also with an improvement in power requirements (e.g. driving proof masses in the mg area instead of several grams).


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Fig. 3.4 Surface micromachining process

Fig. 3.5 Surface micromachined gyroscope with protective cap open (courtesy Bosch)[13]

Mechanical sensors like accelerometers, vibrometers, pressure sensors, gyroscopes and similar structures rely on mechanical features – either surface or bulk micromachined - coupled with either on- or off-chip readout electronics. Fig. 3.9 and Fig. 3.10 show examples of systems with off-chip electronics, mounted closely together in a common package. Fig. 3.11 and Fig. 3.12 show examples with on-chip electronics, benefiting from the short interconnect distances between the sensor and the readout circuit as well as from the overall reduction of real estate.

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Fig. 3.6 Surface micromachined capacitive uniaxial accelerometer (courtesy Freescale)

Fig. 3.7 DRIE for micromachining (courtesy Alcatel Micromachining Systems)

The advantage of on-chip MEMS integration is clear for highly robust MEMS manufacturing processes, with small areas used for the MEMS itself. If the MEMS device has a low yield and requires a large area, the cost advantage is lost, since the per-area price for the multi-mask processes required for the microcontroller will dictate the total area cost of the system. Other sensors, like thermopiles or gas sensors can be built directly on top of the CMOS circuitry, as they are either manufactured in CMOS, or a CMOS compatible process. Humidity or chemical sensors are created in this way, adding sense materials on top (e.g. interdigitated electrodes – Fig. 3.13). Combining mechanical microfabrication and system integration techniques, fully integrated cameras have now become a reality, also enabling high resolution


1984 - 1997 Hybrid piezo-electrical metal can

1997 Silicon MEMS capacitive PLCC28

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2002 Silicon MEMS capacitive SOIC16w

2006 Silicon MEMS capacitive SOIC1nn

Fig. 3.8 Acceleration sensors evolution- MEMS and packaging technology improvements have shrunk the sensors from ~9cm3 to 0.2cm3(image courtesy of Bosch [16]

Fig. 3.9 Airbag sensor with accelerometer and microcontroller (courtesy BOSCH)

visual sensors to be incorporated in ambient sensors [17, 18], as in Fig. 3.14 and Fig. 3.15. The smaller sizes typically allow faster response times, lower energy consumption and smaller overall systems with lower cost. While the latter is a paramount requirement for “ambient sensors”, to secure distribution in hundreds of thousands, the miniaturization is an enabler for unobtrusive, scalable systems components (and systems) which will make them more acceptable to the user. For autonomously

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Fig. 3.10 Multi Axis Accelerometer for harsh environment with microcontroller unit (courtesy CSEM)

Fig. 3.11 Kavlico’s barometric atmospheric pressure sensor with on-chip electronics

operating ambient sensing systems, power management is the next obstacle. Sensing principles that provide low power, compared to the alternatives, are advantageous (e.g. piezoresistive vs. capacitive sensors for pressure sensing, impedance changes vs. calorimetry for humidity) and need to be considered during the system design phase. A number of sensors with high miniaturization potential, low power requirements and low cost are described in the following section

2.2

Acceleration Sensors

Bulk micromachining of acceleration sensors (See Fig. 3.16 and Fig. 3.17) has been a workhorse technology for many years. A proof mass is suspended on an elastic structure and is shifted from its position during acceleration. A capacitive or elec-


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Fig. 3.12 Analog Device’s Gyroscope with CMOS electronics

Fig. 3.13 Packaged humidity sensor - sensitive polymer on interdigitated electrodes integrated on digital conversion circuit (courtesy of Sensirion)

trostatic signal is picked up and converted into a digital output by the associated microcontroller. However, due to the improved compatibility with CMOS processes [19] and the adequate sensitivities obtained for the sensors realized in surface micro machining, the majority of commercial sensors are now fabricated in this way (by SMM instead of BMM).

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Fig. 3.14 The Opto Package courtesy of SCHOTT, packaging a high resolution camera chip with through silicon vias in an ultra-small footprint

Fig. 3.15 Integrated optics for a wafer level fabricated camera system (courtesy Tessera)

2.2.1

Surface Micro-machined Proof mass, Passive Capacitance

The advantage of surface micro-machining for accelerometers, leveraging CMOS compatible processes, has resulted in the favoring of this technology over BMM. Adding the sensor to read-out circuitry on-chip, as processed, for example by Analog Devices [20, 21], minimizes the total size significantly while providing shortest interconnects between the sensor’s output and the readout interface (See Fig. 3.18). Commercial SMM sensors can achieve read-out ranges from 2g to 250g, surviving shocks well above 3000g. As the combined process requires very high process yields for the MEMS in order not to sacrifice “expensive” CMOS real estate,


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Fig. 3.16 Bulk micromachined acceleration sensor with capacitive signal readout (courtesy Fraunhofer IZM Chemnitz)

Fig. 3.17 Electromagnetic coil, bulk micromachined proof mass moving an a high density micromachined metal coil (image courtesy Freescale)

alternative concepts to integrate the read-out circuit at the side, or on top of the sensor, have been developed and are in mass fabrication as well. The improved yield of the system comes at a cost of reduced signal strength from the sensor due to the larger interconnect lines and an overall size increase in the system (See Fig. 3.19).

2.3

Gyroscope Sensors

2.3.1

Bulk Micromachining

Bulk micromachining of a silicon wafer, creating a multi-layered sensor with high sensitivity employs a reference electrode versus which the sensing electrode is shifted during a rotational event (Coriolis force). A capacitive signal can be derived from the frequency shift, indicating the dynamic rotation angle. See Fig. 3.20 [22].

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Fig. 3.18 Accelerometer in surface micromachining, integrated in a CMOS design. (Courtesy of Analog Devices)

Fig. 3.19 Surface micro machined accelerometer, capped and mounted on top/ at side to the microcontroller (courtesy Freescale)

Fig. 3.20 Gyroscope fabricated by bulk micromachining and layer bonding (courtesy Fraunhofer IZM Chemnitz)


2.3.2

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Surface Micromachined

Using SMM, and also applying the Coriolis force, a vibrating structure is deformed against a counter-electrode on a buried layer, providing a capacitive read-out of the rotational angle. This approach allows integration of the MEMS structure with the CMOS readout electronics, increasing the sensitivity to the small capacitive signal (See Fig. 3.21) [23].

2.4

Pressure Sensor

Pressure sensors can by fabricated by bulk micro-machining from the backside of a silicon wafer, removing the bulk silicon and leaving a thin, deformable membrane (e.g. of nitride or oxide). Bonding this device to a supportive substrate will result, either in a differential (reference pressure) or in an absolute (vacuum) pressure sensor (See Fig. 3.22 and Fig. 3.23). Bulk micro-machined pressure sensors have a better sensitivity, in general, than the surface micro-machined devices, typically associated with a better gauge factor when comparing crystalline silicon with polysilicon [24].

Fig. 3.21 Gyroscope in surface micromachining integrated with CMOS technology (courtesy Analog Devices)

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Fig. 3.22 Bulk micromachined sensor with piezoelectric bridge (Frauhofer IZM Chemnitz)

Fig. 3.23 Schematic of a bulk micromachined differential pressure sensor with piezoelectric bridge (courtesy Intersema Senoric S.A. [25])

2.5

Vibration Sensor

Sensors for specific vibrating frequencies have micromachined tongues, which resonate at the target frequencies they are designed to detect. Capacitive sampling provides the feedback of the dominant frequencies in a vibration spectrum.


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Fig. 3.24 Surface micromachined vibration sensor with bulk micromachined silicon cap, frit bonded (courtesy IZM-Chemnitz)

While this can be also achieved with accelerometers, the sensitivity, especially for multi-frequency spectra, is much better with dedicated vibration sensors (See Fig. 3.24).

2.6

Shock Sensors

For shock sensors, the design is set for a freely moving proof mass to connect the electrodes when a certain level of acceleration is reached. This digital on/off state is used to detect a shock using a no-power sensor, triggering (e.g. a distress signal). As no comparator and evaluation circuitry is needed in this case, the total system for shock detection can operate at extremely low power, being of small size and low cost (see Fig. 3.25).

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Humidity Sensors

Using interdigitated electrodes on a CMOS circuit and, covering them with a humidity sensitive polymer, a direct digital sensor can be created that provides low power and a small size. Companies, such as Sensirion, have realized such a chip with sensitivities of the order of 4.5% r.h. over the range 0-to-100% r.h, with power requirements of only 30µW.

2.8

Microphones

Acoustic sensors can be realized in low power, ultra-small sizes by MEMS technology as well. Silicon-based microphones use bulk micromachined sensors (similar to pressure sensor fabrication) mounted at a small distance to a counterelectrode. This capacitive arrangement provides a direct signal conversion of (acoustic) pressure changes to an electronic signal conversion. Sonion MEMS has created a wafer-level integrated solution, realizing the world’s smallest integrated microphone [27] (See Fig. 3.26). Infineon has demonstrated a hybrid integrated dual microphone, leveraging directional sound discrimination through the housing [28] (See Fig. 3.27).

2.9

Bio-and Chemo-electrical Interfaces for Sensors

With the advent of bio- and chemo-terrorism, sensors to determine threat levels, and provide early warnings, have become a highly researched topic.

+Y Trigger

Reset Common

Ground

-Y Trigger Fig. 3.25 MEMS based shock sensor (relay) with zero power requirements (courtesy Stanley Associates) [26]


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Fig. 3.26 Fully integrated silicon MEMS microphone in wafer level assembly technique (courtesy of Sonion MEMS)

Fig. 3.27 Dual microphone with bulk micromachined silicon acoustic sensors (Infineon)

Leveraging sensitive materials, tailored to the specific threat, sensing principles on resistive change (MOS sensors, [29, 30]), on resonant frequency shifts (e.g. SAW, QMB), change of optical properties e.g. in surface plasmon resonance (SPR) [31]) or impedance changes [32, 33] have been developed. Sensors, based on chemo-sensitive polymers, provide low power requirements while preserving excellent sensitivity. Hydrogels, for example, can be fine-tuned to react quite specifically to a certain agent. This can induce nonlinearity in their swell behavior, which then can be detected by, for example, a piezoresistive strain gauge. The impedance measurement of chemo-sensitive polymers (See Fig. 3.28) is a similar low power detection mechanism. Even the direct interfacing of live cells providing a bio-electric feedback have been researched (See Fig. 3.29) [34]. In contrast to the aforementioned sensors, microphones, pressure sensors and bio-chemo-sensors need to directly interface with the ambient environment, challenging the assembly and packaging techniques with the task of providing a robust protection, while selectively allowing the parameters that must be measured to enter the sensor.

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Fig. 3.28 Gel based chemical sensor with 16 sensing elements on a 2×5mm chip with 0,5µW power requirement (courtesy Seacoast Science)

Fig. 3.29 Interfacing of live cells to electronic sensor circuitry (image courtesy Fraunhofer IZM and Fraunhofer IBMT)

3

Energy Scavenging Devices

In order to increase the autonomy of ambient intelligence sensor nodes, energy scavenging from the environment is the most attractive approach. Scavenging is usually employed to charge a storage device (capacitor, rechargeable battery), as in ambient intelligence environments it is not assured that the scavenging source is always available (e.g. solar energy, vibration energy). Generally, the scavenging procedure follows the path given in Fig. 3.30, indicating typical losses. A multitude of scavenging mechanisms has been reported to address the various available supplies from the ambient. Here, depending upon the scenario, the best


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Fig. 3.30 Energy scavenging - from source to use

scavenging mechanism must be used. For example, in ambient environments with large thermal gradients, thermal scavenging is best while for environments with a high level of vibration mechanical energy scavenging will be the better choice.

3.1

Electromagnetic Scavenging

These scavengers are the closest to established generators; by using a moving magnet in a coil, or vice versa, they generate voltage by induction (See Figure 3.31). A large number of versions have been reported in the past, from multi-axis linear actuation to rotational actuation to pendulum-type actuation. Some generators use gear wheels to keep the generator operating under optimum operating conditions over a wide range of low acceleration states, for example in [35]. Microfabrication techniques derived from watch making, as well as semiconductor related MEMS fabrication processes, have been employed to realize electromagnetic scavengers. Typical power ratings are in the lower mW range for micro-scale generators, scavenging on accelerations in the sub g range. Fig. 3.32 shows a state-of-the art micro-generator, which realizes roughly 15mW in a ~6.4mm diameter size, when an external proof mass is moved (e.g. due to a human wearing a timepiece). In times during which the generator is not active, power storage needs to be used to bridge the inactive time. Thus, electromagnetic micro-generators are best used in situations, where permanent movement is available and, for example, when the movement itself is the parameter to be measured.

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Fig. 3.31 The principle of a moving magnet electromagnetic scavenger based on micro fabrication techniques

Fig. 3.32 Mechanical energy scavenging generator (courtesy Kinetron)

3.2

Electrostatic Scavengers

Electrostatic scavengers use movement-induced change in capacitance of a precharged capacitor to generate power (See Fig. 3.33 and Fig. 3.34). The initial charging can take place by piezoelectric discharge, a permanent radioactive emitter or by photogeneration [36]. Due to the low parasitic capacitance requirements, the conversion circuitry is quite tricky [37]. Therefore, electrostatic scavengers have not found as extensive use as electromagnetic scavengers.


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Fig. 3.33 Vertically active electrostatic scavenger

Fig. 3.34 Laterally active electrostatic scavenger (courtesy IMEC)

3.3

Piezo-Scavengers

Piezoelectric scavengers use the movement of a piezoelectric bimorph to produce voltages that are compatible to off the shelf conversion components (See Fig. 3.35) [38]. They have been the target of extensive research. Piezo-scavengers have a power output of about 10µW under resonant vibration conditions. These can be tuned by the size of the bimorph, as well as by lining the piezo-active material onto a controlled substrate to vibrate at the resonant frequency (See Fig. 3.36) [39]. Typical piezo-reactive materials used include barium-titanate (BaTiO3), leadtitanate (PbTiO3) or lead-zirconate-titanate [Pb(Zr, Ti)O3, however, they are quite hard to process and need high sintering temperatures.

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Fig. 3.35 Principle of a piezoelectric bimorph used as energy scavenger

Fig. 3.36 Energy scavenging from vibrating ambient environment, fabricated by MEMS technology (courtesy TIMA)

Macro-fibre composites laminate piezoelectric materials into a macro compound to leverage an improved voltage regime [40]. Piezo-scavengers, based on MFC’s, have been commercialized and found use in a number of commercial sensing applications as well (See Fig. 3.37) [41]. For event-based energy supply, piezo-electric scavengers can be used very efficiently. As shown in Fig. 3.38, Enocean has commercialized a piezo-scavenging remote switch module, enabling a transmitter to send event monitoring signals to a receiver in order to initiate an activity (e.g. switch on the light, trigger building automation events, etc.)


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Fig. 3.37 Wireless ambient sensor node using piezo electric scavenging of ambient vibrations (courtesy Transparent Assets)

Fig. 3.38 Commercial piezo-scavenger used for remote switching (courtesy Enocean)

3.4

Solar Energy

Converting solar energy into electricity is currently part of a very strong movement in the “green energy” sector. For decades, solar energy has been used to power remote appliances and pocket calculators. With the increased interest in powering distributed network nodes for ambient intelligence applications, solar energy has found a new market. The principle is based on the generation of electron-hole pairs within a semiconductor material, usually silicon, with the absorption of a photon with sufficient energy (See Fig. 3.39).

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Fig. 3.39 The principle of the solar cell energy source

By connecting individual modules in series or in parallel to a voltage/current regulator, the charging of a battery can be done very efficiently with power densities of 10-to-14mW/cm2 under direct exposure to sunlight. The benefit of high power density is unfortunately limited by the fact that normal sun light is present only for a small fraction of the time; additionally, deployment of sensor nodes equipped with solar cells is challenging at the moment. Enocean has commercialized a sensor node with solar energy supply for full autonomy in building automation applications (See Fig. 3.40) [42].

3.5

Thermal Scavengers

Thermal scavengers rely on the Seebeck effect, converting a temperature differences into electricity. When a connected point of two conductors is subjected to a thermal gradient, it will generate a voltage difference due to the different work energies of the associated materials. Connecting a multitude of mV generating contacts in series, a thermo electric module can be realized (See Fig. 3.41). MEMS technology was recently used here to maximize the number of individual thermocontacts per area. Improvements in the materials used resulted in modules that were made with semiconductor materials of p- and n-types (e.g. bismuth-telluride (Bi2Te3), lead-telluride (PbTe) and iridium-antimony (IrSb3)) having high thermal efficiency factor. Today’s thermoelectric scavengers achieve in the mW/cm2 power densities using, for example, Bi2Te3 as an active material with a thermal difference to initiate operation at 5K [43]. Miniature generators have been demonstrated (Fig. 3.42) by companies like Micropelt, Thermo-Life and found use, from as early as 1998, in consumer products (Fig. 3.43) [44].


Fig. 3.40 Solar scavenging for energy supply to a sensor node (courtesy of Enocean)

Fig. 3.41 Principle of a thermoelectric scavenger

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Fig. 3.42 Thermoelectric scavenger with high efficiency (courtesy Thermo Life)

Fig. 3.43 Watch using thermoelectric scavenging for supply [44] (courtesy SEIKO)

3.6

Radio-active Generators

Using low intensity radio active sources, electrostatic or piezoelectric generators have been proposed [45, 46]. Due to the perceived hazard of handling even minute amounts of ionizing matter and regulatory aspects, none of them has attracted the community’s interest besides exotic applications like space exploration.


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Energy Storage Systems

Energy storage is the single most critical issue when conceiving an ambient intelligent, autonomous environment. Even low power transmitters require mW power figures to transmit their signals to a receiver – with small energy storage units this will drain the supply rapidly. Today, autonomous (non-scavenging) systems will run anywhere between hours and months. With energy scavenging, this can be extended significantly. However, due to increased complexity, high duty-cycle requirements and long range transmission, certain applications needs are still power hungry, leaving true autonomous systems still inadequate in many areas. Regarding range of available energy storage units, today’s applications are still limited to the use of batteries and capacitors. Novel developments like high density electrolytes, novel dielectrics with both high permittivity and break down voltage, as well as increased reactive surfaces, have pushed the storage capacities up by a factor of 10 in the past decade. However, additional improvements seemed to have slow down. 4.1.1

Batteries

Modern lithium ion, lithium polymer batteries can accommodate energy densities of ~0,7MJ/kg. Recharging is not affected by the memory effects observed in NiCd or NiMH cells. However, recharging still requires adequate electronic control to prevent overheating or even combustion [47]. 4.1.2

Super-capacitors

Super- and ultra-capacitors are based on electrochemical double layers with a nanoporous dielectric providing the high dielectric constant. In contrast to, for example, lead acid batteries with ~0.1MJ/kg, both super- and ultra-capacitors boast 5× to 10× higher energy storage capabilities. Aside from just improving the dielectric constant, the permissible voltages can also be increased. This approach, pioneered by EEstor [48], has been reported to achieve energy storage densities of 1MJ/kg. This kind of ultra-capacitor would eliminate concerns about the long term autonomy of sensor nodes for ambient intelligence systems.

4.2

Novel Approaches to Energy Storage

4.2.1

Carbonization based Battery Structures

Micro-manufacturing of polymers, carbonized in a proprietary process, is the basis of the carbon micro-battery approach (See Fig. 3.44) [49]. Controlled structuring of polymers, for example by lithography or molding creates fractal surfaces, which

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Fig. 3.44 Carbonized polymer structures providing very high electrode area for novel micro batteries (courtesy Carbon Micro Batteries, LLC)

Fig. 3.45 Micro Fuel Cell (15×10×1mm) in micro-structured layer technology (courtesy Fraunhofer IZM)

maximizes the electrode area. A metric of 400Wh/l is claimed as a goal for commercially viable battery technology based on carbonization.

4.2.2

Fuel Cells

Micro fuel cells have been discussed as potential candidates to supply mobile applications with energy. These cells can be fabricated in miniature footprints [50], providing energy supply densities in the 0.1W/cm2 range, equivalent to roughly


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double the density of today’s lithium polymer cells. However, they need a continuous supply of fuel (e.g. hydrogen, methanol, ethanol) to operate. Tank sizes add to the overall volume. Fraunhofer IZM, as shown in Fig. 3.45, has demonstrated a combination of a miniature hydrogen tank and micro-fuel cell, providing a 3× increased energy density as compared to an A-cell primary battery. As the fuel cell alone is not an energy supply, but a reactive converter, any size of fuel tank can be accommodated, benefiting from the up-to 8MJ/kg energy density of hydrogen. This would provide for years of autonomous operation, especially for stationary sensor nodes in an ambient intelligence network, in contrast to months with current battery technology. Micro energy storage will likely remain the Achilles’ heel for true autonomous ambient intelligence systems for a while to come. However, lower power electronics, higher storage capacity, rechargeable energy supplies and efficient scavenging and conversion concepts will ultimately pave the way towards true autonomy.

5

Conclusions

This chapter provides an overview of Micro-Electro-Mechanical System (MEMS) sensors, particularly from the perspective of providing the low power sensing devices that will support the development of Ambient Intelligence (AmI). The sensor parameters that are described include acceleration, gyroscopy, pressure, vibration, shock, humidity, sound (i.e. using microphones), and bio-and chemoelectrical signals. Two primary techniques are employed to fabricate the MEMS devices, namely bulk micro-machining (BMM) and surface micro-machining (SMM). MEMS sensor devices can be fabricated independently within silicon material, or they can be integrated with the circuitry used to condition the output signal of the sensor. The ability to provide low power operation in a miniaturised system is a particular advantage of MEMS sensors. However, the challenge of AmI is such that additional approaches will be needed to facilitate autonomy; that is, long-term operation without human intervention. Amongst the possible solutions to this challenge is the development of energy scavenging and energy storage technologies, also employing MEMS, which will permit sensor systems to continue to collect energy during their operational lives and, in this manner, extending this lifetime significantly.

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3. M. Woitag et al., “Bewegungserfassung und Bewegungsüberwachung im häuslichen Umfeld”, Proc. 1st Ambient Assisted Living, Berlin 2008, pp. 249–252 4. A. Hein et al., “Activity Recognition for ambient assisted living: Potential and Challenges”, Proc. 1st Ambient Assisted Living, Berlin 2008, pp. 263–267 5. W.R. Heinzelmann et al., “Energy-efficient communication protocol for wireless microsensor networks”, System Sciences 2000, Jan. 2000, pp. 10, vol. 2 6. W. Hascher, “nanoNET: sichere Verbindung für Sensor-/Aktor-Netzwerke der Zukunft”, Elektronik 2002, H. 22, S. 38 bis 48. 7. G. Schulte, “Novel wireless power supply system for wireless communication devices in industrial automation systems”, IECON 02, pp. 1358–1362, 2002 8. A. Karalis, “Efficient wireless non-radiative mid-range energy transfer”, Annals of Physics 323 (2008) 34–48 9. P. Mitcheson, “Power Processing Circuits for MEMS Inertial Energy Scavengers”, Dtip 2006, Stresa, April 2006 10. S. Büttgenbach, “Mikromechanik”, Teubner, 2nd edition, 1994, ISBN 978-3519130710 11. E. Jung et al., “Packaging of Micro Devices for Automotive Applications-Techniques and Examples”, AMAA 2003, ISBN 978-3540005971 12. B. Kloeck, “Study of electrochemical etch-stop for high-precision thicknesscontrol of silicon membranes”, IEEE Transactions on Electron Devices, Volume: 36, Issue: 4, Part 2, pp.663– 669, 1989 13. H.-P. Trah, R. Müller Fiedler, ‘Mikrosystemtechnik im Automobil’, PhysikJournal, Nov.2002/1, ISSN 1617-9439, pp. 39–44 14. Kovacs, G.T.A. et al., “Bulk micromachining of silicon” Proceedings of the IEEE, Volume: 86, Issue: 8, pp. 1536–155, Aug 1998 15. J.M. Thevenoud et al., “Fabrication of 3D Packaging TSV using DRIE”, to be published in Proc. DTIP 2008, Nice, 2008 16. S. Knies et al., MEMS packaging for automotive applications”, DTIP 2005, Montreux, June 2005 17. J.Leib et al., “New wafer-level-packaging technology using silicon-via-contacts for optical and other sensor applications”, ECTC 2004, pp. 843–847 18. M. Feldmann, “Wafer-Level Camera Technologies Shrink Camera Phone Handsets”, Photonics Spectra, August 2007 19. C. Hierold et al., “A pure CMOS surface-micromachined integrated accelerometer”, Sensors and Actuators A: Physical, Volume 57, Issue 2, November 1996, pp. 111–116 20. http://www.analog.com/en/content/0,2886,764%255F%255F7537,00.html 21. Chau et al., “An integrated force-balanced capacitive accelerometer for low-g applications”, Sensors & Actuators A, Vol. 54, Issues 1–3, June 1996, Pages 472–476 22. Wiemer et al., “Bonding and reliability for 3D mechanical, optical and fluidic systems”, Smart System Integration, Paris, 2007 23. http://www.analog.com/library/analogdialogue/archives/37-03/gyro.html 24. Eaton et al., “Comparison of Bulk- and Surface- Micromachined Pressure Sensors”, Micromachined Devices and Components, Proc SPIE, Vol 3514, p. 431 25. http://www.intersema.ch 26. http://www.stanleyassociates.com/capabilities/AEandT/No-Power%20MEMS%20Shock%20 Sensors.pdf 27. P. Rombach, M. Miillenborn, U. Klein, R. Frehoff, “A low voltage silicon condenser microphone for hearing instrument applications”, Joint ASAIEAA Meeting 1999, Berlin, Germany, 14/03-19/99, NO. 2AEA-3 28. J. Van Doorn, “Microphone with improved sound inlet port”, US Patent No. 7072482 29. X. Chen et al., “BaZrO3Thin Films For Humidity Gas Sensor”, MRS Bulletin 2007 30. C. Imawan et al., “Structural and gas-sensing properties of V2O5–MoO3 thin films for H2 detection”, Sensors and Actuators B: Chemical, Volume 77, Issues 1–2, 15 June 2001, Pages 346–351


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31. Chinowsk et al., “Performance of the Spreeta 2000 integrated surface plasmon resonance affinity sensor”, Sensors and Actuators B 6954 (2003) 1–9 32. T. Misna et al., “Chemicapacitive microsensors for chemical warfare agent and toxic industrial chemical detection”, Sensors and Actuators B: Chemical, Volume 116, Issues 1–2, 28 July 2006, Pages 192–201 33. http://www.seacoastscience.com/Downloads/Seacoast_White_Paper_DEC%202006.pdf 34. W. Baumann et al., “Microelectronic sensor system for micro-physiological application on living cells”, Sensors and Actuators B, B 55 (1999), pp.77–89 35. P. Knapen, “Electric power supply system for portable miniature size power consuming devices”, US Patent No. 4644246 36. L. Amit et al., “Radioisotope Powered Electrostatic Microactuators and Electronics”, TRANSDUCERS 2007, June 2007, pp. 269–273 37. P. Mitcheson et al., “Power Processing Circuits For Mems Inertial Energy Scavengers”, Proc. DTIP 2006, Stresa, 2006 38. G. K. Ottman et al., “Adaptive piezoelectric energy harvesting circuit for wireless remote power supply”, IEEE Transactions on Power Electronics, vol. 17, pp. 669–676, 2002. 39. M. Marzencki, Y. Ammar, S. Basrour, “Integrated power harvesting system including a MEMS generator and a power management circuit”, to be published in Sensors and Actuators A, 2008 40. H. Sodano, “A Review of Power Harvesting from Vibration using Piezoelectric Materials”,The Shock and Vibration Digest, 36(3), 197–205, 2004 41. www.transparentassets.com 42. W. Granzer et al., “A modular architecture for building automation systems,” in Proc. 6th IEEE WFCS, 2006, pp. 99–102 43. I. Stark et al., “Low power thermoelectric generator”, US Patent No. 6958443 44. S. Kotanagi, “Thermoelectric generation unit and portable electronic device using the unit”, US Patent No. 6560167 45. R. Duggirala et al., “An autonomous self-powered acoustic transmitter using radioactive thin films” in Ultrasonics Symposium, 2004, Volume: 2, pp. 1318–1321 46. A. Lal et al., “Pervasive power: a radioisotope-powered piezoelectric generator”, IEEE journal on Pervasive Computing, March 2005, Volume: 4, Issue: 1, pp. 53–61 47. G. Chagnon, P. Allen, K. Hensley, K. Nechev, S. Oweis, R. Reynolds, A. Romero, T. Sack, M. Saft, Performance of SAFT Li-ion batteries for high power automotive application, in: Proceedings of the Electric Vehicle Symposium EVS-18, Berlin, October 2001 48. http://pesn.com/2007/01/17/9500448_EEStor_milestones/ 49. B. Park et al., “A Case for Fractal Electrodes in Electrochemical Applications”, J. Electrochem. Soc., Volume 154, Issue 2, pp. P1–P5 (2007) 50. R. Hahn et al., “Development of a planar micro fuel cell with thin film and micro patterning technologies”, Journal of Power Sources, Volume 131, Issues 1–2, 14 May 2004, Pages 73–78

Chapter 4

Silicon Technologies for Microsystems, Microsensors and Nanoscale Devices Thomas Healy

Abstract This chapter provides a brief overview of the most relevant current silicon processing technologies. A number of high potential future techniques are also presented. Systems based upon silicon are almost ubiquitous in today’s world; as a material, silicon is required to accommodate the growing needs of an increasingly demanding society. A consequence of this is a constant drive for cheaper solutions in providing these systems, which further supports a culture of innovation in silicon technologies. The selected future techniques described here, which have been developed to answer specific challenges in integrating electronic systems into the real-world environment, provide an insight into the ways in which silicon processing is being transformed. They also represent only a sample of the current innovative research in the field silicon processing. Keywords Silicon, Micro-Electro-mechanical Systems (MEMS), Sensors, Embedded Systems Wireless Sensor Networks, Smart Dust, Ubiquitous Computing, Ambient Intelligence

1

Introduction

Historically, the first successful fabrication techniques produced single transistors on individual silicon die (1–2mm2 in size) [1]. Early integrated circuits, fabricated at Texas Instruments [2], included several transistors and resistors making simple logic gates and amplifier circuits; today millions of transistors can be created on a single die to build extremely powerful circuits. In this chapter a basic insight into the processes involved in conventional planar integrated-circuit (IC) fabrication will be presented, including how these processes have been developed to accommodate the emerging technological requirements of an increasingly technologically demanding society.

Tyndall National Institute, Cork, Ireland


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As silicon is the primary material used in the IC industry today, it will be the main focus of this review. From an economical point of view, the fact that silicon is an abundant element in nature provides for a very cheap starting material in conventional IC processing. It also brings major processing advantages, such as being a high quality insulator, easily oxidized to form silicon dioxide, which is an excellent barrier layer for selective diffusion processing; this makes silicon the dominant material used in the IC industry today. In recent years, due to the rapid progress of very large-scale integrated (VLSI) circuits, complementary metal-oxide semiconductor (CMOS) devices have been scaled down continuously, while the CMOS circuits have been correspondingly increasing in functionality. This is echoed in Moore’s Law, which describes an important trend in the history of computer hardware: the number of transistors that can be inexpensively placed on an integrated circuit is increasing exponentially, doubling approximately every two years [3, 4]. If this continued, in theory, then computers will be created where each molecule will have its own place, then we will have completely entered the era of molecular scale production. Of course, this carries enormous challenges. Therefore, it is not surprising that scientists are researching new and varied approaches to increasing circuit density, including the use of new high-k dielectric materials [5] and lithographic techniques [6] for use in large scale IC production. In this chapter, some of the more important challenges associated with silicon and conventional planar processing techniques will be discussed, along with how theses technologies are being adapted and evolved in order to overcome these challenges. Non-conventional methods for silicon processing will also be described including in particular spherical silicon IC’s and the world’s first electronically functional fibre [7–10].

2

Conventional CMOS Device Fabrication Processes

Conventional integrated circuits (ICs) are primarily fabricated on flat silicon wafers. These are made of pure silicon cut from a silicon ingot, polished to a smooth finish, and heated in order to form silicon wafers, which are typically 100mm–300mm in diameter. Fabricating silicon wafers is not a trivial process that requires a process to create rod-form polycrystalline semiconductor material. The rods are precisely cut into ingots, which are cleaned and dried and subsequently manufactured into a large single crystal by melting them in a quartz crucible. The crystal then undergoes an elaborate process of grinding, etching and cleaning at its surface; this includes cutting, lapping and polishing it to a mirror-smooth finish and then heat-processing the final wafers. Due to semiconductor resistivity, approximately one-third of the original rod is ultimately of high enough quality to be used in making integrated circuits. The remainder can often be re-processed and used for products that do not require such high purity, such as silicon solar cells [11]. This ingot fabrication process

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is independent of the device fabrication protocol and IC foundries are generally supplied by independent wafer manufacturers. Silicon is the material of choice for semiconductor device fabrication for many reasons, but in particular for the processing advantages given by its easy oxidation to a stable silicon dioxide (SiO2), which can be used as an insulator, a surface passivation layer and as a superior gate dielectric. There are five primary CMOS technologies for discrete IC fabrication: N-Well, P-Well, Twin Well, Triple Well and SOI (Silicon on Insulator) processes [12–13]. For the purposes of clarity and coherence this chapter will focus upon the N-Well process.

2.1

The N-Well Process

The following fabrication sequence illustrates the basic steps required to create a conventional CMOS inverter. Beginning with a p-type silicon wafer, a thermal oxidation process is performed to create a thin layer of oxide on top of the wafer (in Fig. 4.1). A photo-resist material is spun onto the wafer and a photolithographic process is performed (See Fig. 4.2). This involves exposing the wafer to a dose of UV light through a previously designed n-well mask. The photo-resist that is exposed to light becomes soluble to the photo-resist developer and the unexposed areas remain insoluble to the developer. This is known as positive resist and its primary purpose is to deposit the site specific implant dopants necessary for making IC devices, see Fig. 4.3. Using Organic photo-resist developer the exposed area is stripped (as is shown in Fig. 4.3).

SiO2

p substrate

Fig. 4.1 The Thermal Oxidation Process

Photoresist SiO2

p substrate

Fig. 4.2 The Photolithographic Process

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p substrate

Fig. 4.3 Developing the photo-resist

SiO2

p substrate

Fig. 4.4 Silicon Oxide Etching

n well p substrate

Fig. 4.5 The Formation of the n-well

n well p substrate

Fig. 4.6 Stripping the Oxide

The exposed oxide area is then etched using Hydroflouric acid (HF) and the photo-resist material is subsequently removed (see Fig. 4.4). This leaves a specific area of the wafer exposed for a subsequent implant. An n-well is formed using either a diffusion or Ion implantation process (See Fig. 4.5). Ion implantation is a doping process whereby ionised dopant molecules are accelerated through an electric field and implanted into the wafer at a depth specific to the implantation energy. Diffusion doping begins with the deposition of an impurity material over the specific site and at high temperatures (9000C–12000C) the impurity atoms diffuse into the wafer lattice creating the desired N-Well. The remaining oxide is stripped using Hydroflouric acid HF (as is shown in Fig. 4.6).


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Another thin layer of oxide is deposited to create the thin gate oxide of the final device and a layer of polysilicon is deposited using a chemical vapour deposition (CVD) process (See Fig. 4.7). Using photoresist and the lithographic techniques previously described a polysilicon layer is patterned to create the device poly gate (Fig. 4.8). An oxide layer is deposited and patterned to define the n diffusion areas (See Fig. 4.9). The exposed areas are implanted using a diffusion or ion implantation creating the source/drain of the transistor (as shown in Fig. 4.10).

Polysilicon Thin gate oxide n well p substrate

Fig. 4.7 Deposition of a Thin ‘Gate’ Layer of Oxide

Polysilicon Thin gate oxide n well p substrate

Fig. 4.8 Polysilicon patterning

n well p substrate

Fig. 4.9 Definition of n diffusion areas

n+

n+

n+ n well

p substrate

Fig 4.10 Implantation of exposed areas

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p+

n+

n+

p+

p+

n+

n well p substrate

Fig. 4.11 The p diffusion step

p+

n+

n+ p substrate

p+

p+

n+

Metal Thick field oxide

n well

Fig. 4.12 Patterned field oxide, metal layer and passivation

The oxide is stripped and the process repeated for the p diffusion areas (See Fig. 4.11). Finally, a field oxide is deposited and patterned and this is followed by a patterned metal layer to create the final device. Moreover, depending on the final application a final passivation layer is deposited over the device for protection (See Fig. 4.12). The final device, an inverter, is the basic building block behind most integrated systems. One of the key areas of interest in the IC industry today is the reduction of the footprint of individual components to allow increased device throughput and thus reduction in the cost of overall systems. The following section investigates a select number of techniques being investigated to support the realization of this goal.

3

Silicon CMOS Processing Evolution

In this section, three different IC processing techniques, silicon-on-insulator, silicon fibre technology and spherical silicon processing, are reviewed. While all of these techniques have differing objectives, this section illustrates that the ongoing process of adapting and evolving silicon IC processing is constant, driven to supporting the creation of more complex but also more consistently socio-economically acceptable systems.

3.1

Electron beam lithography

Electron beam (e-beam) lithography is a process where a beam of electrons is used to generate a pattern on the surface of a wafer below the resolution limit of conventional photolithography (< 200 nm). The primary advantage of this technique is that it has


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the ability to overcome the diffraction limit of light and create feature sizes in the sub-micron range. It has a resolution of ~20nm in comparison to conventional photolithograpy, which has a typical resolution of ~1µm [14–15]. There is also no need for mask sets, a step which reduces associated costs and time delays. This form of lithography is widely used in the research arena, but has yet to become a standard technique in industry. Currently, electron beam lithography is used most directly by industry for writing features; the process is employed mainly to create exposure masks that are used with conventional photolithography processes. This is due to the lack of speed in comparison to conventional photolithography [16]. During the e-beam process the beam is scanned across the surface of the wafer; this type of pattern generation is slow compared with a parallel technique like photolithography (the current standard) in which the entire surface is patterned at once.

3.2

Silicon on Insulator (SOI)

Silicon-on-insulator (SOI) is a technology platform based upon the use of an insulator layer, typically silicon dioxide (SiO2), that is sandwiched between a thick-handle silicon wafer and a thin single crystal silicon device layer, as is shown in Fig. 4.13. The initial motivation for this technology was its low parasitic capacitance and radiation hard properties; this is due to the isolation provided by the buried oxide layer [17]. However in more recent years, its ability to create isolated devices at higher density than conventional CMOS processing, has lead it to become a candidate technology that may be central to the future of VLSI technology. Active devices and circuits are created in the top silicon thin-film of the SOI structure device. The buried oxide layer provides isolation from the substrate and this isolation reduces the capacitance of the junctions in the structure. This subsequently helps to reduce the amount of electrical charge that a transistor would have to move during a switching operation. The devices operate faster and they are capable of switching using less energy. SOI circuits can be up to 15 percent faster and consume 20 percent less power than the equivalent conventional bulk complementary metal-oxide semiconductor (CMOS)-based IC’s [18–19]. The SOI process can be achieved using a number of different techniques; however, the two processes most widely used are Separation by Implantation of Oxygen (SIMOX) [20] and Thin Film Silicon Layer Buried Oxide Silicon Substrate

Fig. 4.13 Cross-section of an SOI Wafer

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smart-cut [21]. A comparison of the structural differences between SOI and conventional IC’s can be seen in fig. 4.14. The SIMOX process involves an oxygen implant into the wafer. The profile of the implanted oxygen dopants is Gaussian-shaped with its peak some distance below the surface [19]. Through a subsequent high temperature anneal, the oxygen dopants react with silicon to form a buried oxide layer around the peak of the oxygen profile. As a result, a single-crystal silicon thin-film is formed above the buried oxide layer. The smart-cut technology takes a different approach, using two separate wafers. A thick thermal oxide layer is grown on the device wafer (which is to be used as the buried oxide in the final SOI structure) and a hydrogen ion (H+) implant at a dose of 2 × 1016 − 1 × 1017 cm−2 is performed. After cleaning the device wafer, a second ‘handle wafer’ is introduced and both wafers are bonded together. The wafers are subjected to annealing in the range of 400–6000C. The implanted hydrogen atoms, at a predetermined depth below the oxide layer, gather to form blistering. If the amount of the implanted hydrogen atoms is sufficient, this blistering will cause flaking of the whole silicon layer. As a result a thin film of silicon with a thickness identical to the depth of the hydrogen implant is left at the top of the buried oxide. The smart-cut process is finalized by application of chemical mechanical polishing (CMP) to smooth the wafer surface.

Bulk Transistor

Poly-silicon Gate

Bulk Silicon Silicon Islands

Buried Oxide SOI Transistor

Fig. 4.14 A Cross-section of an SOI Wafer and a conventional IC


3.3

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Silicon Fibre Technology

The trend in our knowledge-based society demands not only more powerful circuits and systems; it also requires the integration of intelligence into our everyday environment. This immersion of microelectronic systems in our world is a fundamental consequence not solely of technology, but also of human need (and psychology). As silicon is the core element of most intelligent systems, new methods must continually be developed to increase function and to embed these systems in a nonintrusive manner. In recent years major advances have been made in the area of wearable and ambient electronics applications [22–25]. To date, the state of art in integrating electronics into wearable systems typically consists of mounting previously packaged integrated electronic components onto a textile substrate, interconnecting them by means of conductive fibres and enclosing them in a protective material/casing [27]. One of the more noteworthy recent research initiatives in this area takes the form of an electronically functional silicon fibre technology; the form factor supports subsystems capable of being seamlessly integrated, into a textile format [26]. The concept of the electronically functional fibre (EFF) has the potential to change the way advanced circuits and systems can be designed and fabricated in the future. Its aim is to enable large flexible integrated systems for wearable applications by building the functional fibres with single crystal silicon transistors at their core. The approach uses the conventional planar technology previously discussed to manufacture extremely powerful circuits and systems in long narrow fibres, which then have the potential to create the necessary fundamentals for the integration of information technology into everyday objects and in particular into high-techtextile products. The primary difficulty with integrating a silicon device into a flexible garment is the rigid nature of conventional silicon IC’s. However, research to examine the mechanical properties of silicon microstructures has revealed the useful fact that “silicon structures become extremely flexible when sufficiently thin” [28–29]. This provides a technology enabler; however, there remain a number of further constraints that flexible electronics must address. Typical issues are summarised in Table 4.1

3.3.1

Flexible Silicon Fibre Processing

The following section outlines a process developed using CMOS processing techniques to create a flexible electronically functional silicon device. To begin with an SOI structure with a 0.34µm thick top single crystal silicon device layer over a 0.4µm thick buried oxide layer on a 525µm silicon handle wafer was used. Step 1: Silicon islands were defined as the active area by first covering the wafer with a photo-resist material, exposing the wafer with U.V. light through the reticle; the exposed areas of the photoresist were subsequently removed

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Table 4.1 Challenges for Wearable Electronics Constraints for Flexible Electronics • Impact of three-dimensional flexure of fibres and fibre meshed assemblies, including electrical, mechanical and physical effects due to bending, stretching, torsion, aging effects (including long time and short time dependencies) as well a mechanical and electrical hysteresis effects. • Integration of electronics in segments to avoid deformation effects. • Identifying the regions that are subject to lower deformation under dynamic operation using humanoid simulations. • Impact of chemical effects due to cleaning. • Impact of process handling in relation to the physical characteristics of the EFF (i.e. fibre length and fibre thickness/diameter, fibre protection, finishing, fibre structure, strength, interlacing, fibre lifetime, handling). • Impact of high humidity environments such as those encountered in washing, drying and ironing processes. • Impact of environmental conditions in general in relation to the physiology of fibres, textiles (e.g. medical devices, industrial textiles, personal protection equipment, construction and automotive textiles, home textiles) and clothing (perspiration resistance, antibacterial, antistatic finish, smog-protection, fibre appearance, abrasion resistance).

Device Silicon

Device Silicon Buried SiO2

P-type Handle Substrate

Fig. 4.15 Defining the silicon islands

with a developer solvent. The exposed silicon was plasma etched through the surface crystal layer (0.34µm) leaving defined silicon islands sitting on top of the buried oxide layer. The remaining resist was subsequently stripped off and the wafer cleaned (See Fig. 4.15). Step 2: Subsequent to the active area definition the next step is to grow the 20nm gate oxide followed by the twin well formation. The N and P well implants are split into two with the N well having a deep phosphorous implant (3e12@190KeV) and a top boron implant (2e12@20KeV), (See Fig. 4.16) and (See Fig. 4.17). This is to ensure that the bottom half of the island is N-type and the boron implant is used to


N Well

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Gate Oxide

P Well

Buried SiO2


Fig. 4.16 Growing the gate oxide

N Well

Gate Oxide

P Well

Buried SiO2


Fig. 4.17 Twin well formation

set the threshold voltage (Vt) of the transistor. The P well implant is split between a deep boron implant (2e11@70KeV) and a top boron implant (1.1e12@20KeV). These doses were chosen to give the circuit a Vt of 0.9 volts. Step 3: A 350nm layer of polysilicon is deposited and patterned to create the gate. This is followed by phosphorous (5e14@60KeV) and boron (2e11@70KeV) implants to create the source and drain followed by a rapid thermal anneal (RTA) to activate the source and drain.

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Step 4: The next step in any conventional CMOS processing is to create the metal contact layer. For the purposes of this work the standard approach to creating a contact stage was revised. Ideally, a BPSG oxide layer is deposited and the contact layer patterned and followed by metallization. With the need for a flexible circuit that could be integrated into a textile format it was decided to incorporate a flexible polyimide material as the inter-dielectric layer in the design, (Fig. 4.18) and (Fig. 4.19). This is a more bendable alternative to standard Spin on Glass (SOG) inter-dielectric. The contact stage comprised of a 3µm patterned layer of polyimide. Polyimide S

D

D

S

Buried SiO2


Fig. 4.18 Adding the flexible polyimide material

Polyimide S

D

D

S

Buried SiO2


Fig. 4.19 Patterning of the polyimide


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Step 5: A 600nm layer of Al&backslash;1%Si metal is deposited and patterned to create interconnect between silicon islands, (Fig. 4.20). The metal is alloyed at 425°C to ensure good ohmic contact with the source/drain regions. Step 6: Finally, a polyimide encapsulation layer is deposited and patterned over the circuit to increase the flexibility and overall mechanical robustness of the circuit, (See Fig. 4.21).

Polyimide D

S

D

S

Buried SiO2


Fig. 4.20 Metal deposition

Encapsulating Polyimide Inierdielectric PI S

D

D

S

Buried SiO2


Fig. 4.21 Final polyimide encapsulation

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To create the final flexible device an undercut process is required. This involves a combination of isotropic etching (this etches in all-crystallographic directions at the same rate) and anisotropic etch processing techniques [30]. Initially, the device side of the wafer is patterned with a resist material in order to anisotropically etching the buried oxide. There are two reasons for the initial oxide etch: ●

●

To act as an etch mask for the subsequent isotropic etch of the handle wafer silicon and To leave a number of anchors for the devices after they have been completely under-etched. This leaves the fibre secured by a thin buried oxide bridge at both ends, which is necessary to secure the devices while under vacuum in the etch chamber. These bridges are cut using a laser at a later stage to release the devices completely from the handle wafer and leave a freestanding electronically functional fibre. Fig. 4.22(left) gives an illustration of the front etch approach.

This is followed by an isotropic etch to undercut the silicon islands, releasing a flexible silicon device ~3µm thick. A clear representation of the release method is illustrated in Fig. 4.22(right). A freestanding ring oscillator fibre completely independent of the handle wafer can be seen in Fig. 4.23. Professor J. Lind of Georgia Institute of Technology, USA states: “It is only appropriate that the field of textiles take the next evolutionary step towards integrating textiles and computers by designing and producing a wearable computer that is also wearable like any other textile” [31].

The concept of the electronically functional fibre outlined here follows the aspiration of making information technology integrate seamlessly into a textile format; to date there has been no other published work similar to this technology in the area of wearable or ambient electronics.

Device (covered with resist)

Openings

Oxide bridge (covered with resist)

Bridge width Oxide etched away here. Bulk Si exposed to SF6 plasma

Resist

Silicon

Opening

Device Oxide

Bulk Si

Isotropic underetch

Fig. 4.22 A Plan view of device after oxide etch (left) and cross section showing isotropic underetch (right)


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Fig. 4.23 Freestanding ring oscillator fibre

3.4

Spherical Silicon

So far conventional planar processing technologies have been discussed. In such a wafer-based fabrication process, the number of ICs that are produced on each wafer depends upon the diameter of the wafer and the size of the IC being fabricated. In recent years, wafer diameters have increased in order to scale productivity and decrease cost of a silicon device. However, this will require more expensive equipment and the complexity will also increase significantly. The yield of larger silicon wafers can be affected also. In certain cases, the use of alternative form factors may be beneficial; one such approach to silicon processing has been developed by Ball Semiconductor and it takes the form of an IC device on a silicon sphere [32]. The fabrication process for these silicon spheres is not trivial and consists of a number of very small polycrystalline silicon granules being processed through a combination of gasses, chemical reactions and solid-state physics of semiconductor throughout a line of hermetically sealed tubes. The silicon spheres are in constant motion as they are processed, treated, and transported at high speed through these sealed pipes involving various processes for crystal-growing, grinding and polishing. During this they also undergo the repeated cleaning, drying, diffusion, film deposition, wet and dry etching, coating, and exposing steps of the integrated-circuit manufacturing process. The spheres are exposed to air only during photolithography; thus, there is no requirement for the traditional - and expensive - clean room facility.

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Initially, 1-mm single-crystal balls were developed (see Fig. 4.24) and further research is being undertaken to produce even smaller spheres. Even though a one millimeter single crystal sphere has a surface area of 3.14 mm2, large VLSI circuits cannot be formed on a single sphere. However, larger circuits can be formed by grouping arrays of spheres to create individual subsystems. A sphere can be designed to function as an individual element is a subsystem (for example, a logic circuit, an I/O circuit, etc), and it can subsequently be interconnected with other spheres to form the complete subsystem. The manufacturing of ICs using silicon spheres offers a number of advantages over conventional planar processing techniques. For example, according to Ballsemi: Such spherical IC device manufacturing processes can greatly decrease the overall IC device manufacturing cost by eliminating the need for large scale dedicated clean room facilities, by allowing over 90% of the required silicon material to end up in functioning devices, and by eliminating the need to purchase new manufacturing equipment each time technological advances necessitate larger circuit devices.

The approach has been successfully implemented, however, numerous question remain regarding how this form-factor will be utilized. The packaging and interconnection of the silicon spheres represents one such challenge. Table 4.2 illustrates the potential advantages of spherical IC’s over conventional planar processing techniques.

Fig 4.24 1mm Single crystal silicon sphere, Courtesy of http://www.ballsemi.com/tech/spherical. html


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Table 4.2 Spherical IC’s versus Planar IC’s courtesy of http://www.ballsemi.com/tech/spherical. html Chips

Spheres

Manufacturing complexity

Three semi-automated processes(create, process and package wafers)

One fully automated process

Production flexibility

Batch processing

Single-unit processing

Surface area for inscribing circuits

Limited (area of 1mm chip = 1 sq. mm.)

Two to three times more (area of 1mm sphere = 3.14 sq. mm.)

System integration

More functions on larger chip

Cluster smaller balls with different functionality

Processing temperature

Must be below 1400°C

Can exceed 2000°C

Shipment to customers

Plastic or ceramic packaging

No packaging required

Cycle time, original silicon to final assembly

120–180 days

5 days

Cost per function

Varied

Approximately 1/10th for comparable function

Ease of innovation

Only highest volume designs are produced; high processing cost limits innovation

Lower processing cost means more designs can be converted to silicon

Energy consumption

Higher

Lower

Original silicon material shipped as final product (%)

10–20

90–95

Environmental impact

10–20

significantly lower impact

Wafer fabrication

Clean room

Clean tubes and pipes

4

Conclusion

This chapter has provided a brief overview of the current silicon processing technologies and outlined a number of possible future techniques. Silicon-oninsulator (SOI) technology offers the potential for higher densities than conventional processing techniques. It also offers a certain type of versatility as demonstrated by the manner in which the process can be adapted to create flexible silicon fibres. The realization of a silicon fibre technology creates opportunities to integrate silicon functionality more fully and effectively into textiles and fabrics. A further demonstration of the versatility of silicon is provided by the silicon sphere process. This technique enables IC-level functionality to be built onto silicon spheres using a process that is more economical and produces less waste material. The potential of the spherical IC is illustrated by the possibility that 3-D spherical arrays can be assembled and function as complex embedded subsystems.

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References 1. http://www.ti.com/corp/docs/company/history/timeline/semicon/1950/docs/54commercial. htm 2. http://www.ti.com/ 3. Intel’s information page on Moore’s Law – With link to Moore’s original 1965 paper 4. Intel press kit released for Moore’s Law’s 40th anniversary, with a 1965 sketch by Moore 5. http://www.tyndall.ie/posters/highkposter.pdf 6. https://www.llnl.gov/str/Sween.html 7. Delaney, K, Healy, T. et al, “Creating Systems for Ambient Intelligence”, ‘EMRS Silicon Evolution and Future of a Technology’ Book, Chapter 24, p.489–515. 8. Healy, T. et al, “Innovative Packaging Techniques for Wearable Applications using Flexible Silicon Fibres”, IEEE 54thElectronic Components and Technology Conference, p. 1216–1219, 2004. 9. Healy, T. et al, ‘Electronically Functional Fibre Technology Development for Ambient Intelligence’, Part 4 ‘Augmenting Physical Artefacts’, The Disappearing Computer Initiative Book, p.255–274. 10. Healy, T. et al, “Silicon Fibre Technology Development for Wearable and Ambient Electronics Applications,” IEEE Frontiers in Electronics Book, 2005. 11. http://www.tf.uni-kiel.de/matwis/amat/semi_en/kap_3/backbone/r3_2_2.html 12. James B. Kou and Ker-Wei Su, “CMOS VLSI Engineering Silicon-on-Insulator (SOI)”, ISBN 0-7923-8272-2. 13. West, N. et al, ‘CMOS VLSI Design’, ISBN 0-201-08222-5 14. McCord, M. A.; M. J. Rooks (2000). “2”, SPIE Handbook of Microlithography, Micromachining and Microfabrication. 15. J. A. Liddle et al. (2003). “Resist Requirements and Limitations for Nanoscale Electron-Beam Patterning”. Mat. Res. Soc. Symp. Proc. 739 (19): 19–30. 16. Jaeger, Richard C. (2002). “Lithography”, Introduction to Microelectronic Fabrication. Upper Saddle River: Prentice Hall. ISBN 0-201-44494-7. 17. H. H. Hosack, et al. SIMOX Silicon-on-Insulator: Materials and Devices,” Sol. St. Tech., pp.61–66, Dec. 1990. 18. Inoue and Y. Yamaguchi, “Trends in Research and Development of SOI Technology,” Applied Physics, Vol.64. No.11, pp.1104–1110, 1995. 19. M. Bruel, “Silicon on Insulator Material Technology,” Elec. Let., Vol.31, No. 14, pp.1201– 1202, July 1995. 20. H. H. Hosack, et al. SIMOX Silicon-on-Insulator: Materials and Devices,” Sol. St. Tech., pp.61–66, Dec. 1990. 21. C. Mazure, ‘Thin Film Transfer by Smart Cut Technology beyond SOI’, http://www.electrochem. org/dl/ma/203/pdfs/0993.pdf 22. Danillo De Rossi, “Electro-active Fabrics and wearable biomonitoring devices”, Autex Research Journal, Vol. 3, No. 4, December 2003. 23. Gemperle, F. et al, “Design for Wearability”, Proc. Second International Symposium on Wearable Computers, Pittsburgh, PA, October 1998. http://www.gtwm.gatech.edu/index/ accomplishment.html 24. Rensing, Noa M. “Threat Response: a Compelling Application for Wearable Computing”, Proceedings of the 6th International Symposium on Wearable Computers (ISWC 2002) 25. U. Möhring et al. ‘Conductive, sensorial and luminescent features in textile structures’, 3rd International Forum on Applied Wearable Computing, Bremen, Germany, March 2006 26. Healy, T. et ‘Silicon Fibre Technology Development for Wearable Electronics applications’, Masters in Engineering Science, University College Cork. 2006. 27. Pirotte, F. et al, “MERMOTH: Medical Remote Monitoring of clothes”, Ambience 05 28. Lisby, T. “Mechanical Characterisation of Flexible Silicon Microstructures,” Proc 14th European Conference on Solid-State Transducers, August. 2000, pp.279–281.


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29. Ericson, F. and Schweitz, J. A. “Micromechanical Fracture Strength of Silicon,” Journal of Applied Physics, Vol 68 (1990), pp.5840–5844. 30. S. Federico et al, “Silicon Sacrificial Layer Dry Etching (SSLDE) for free-stanfing RF-MEMS architectures”, EPFL Center of Micro-Nano-Technology (CMI), IEEE 2003, 00-7803-7744-3/03. 31. J. Lind, et al, “A Sensate Liner for Personnel Monitoring Applications”, Proc. Second International Symposium on Wearable Computers, Pittsburgh, PA, Oct 1998. 32. http://www.ballsemi.com/tech/today.html

Part III

Hardware Sub-Systems Technologies Hybrid Technology Platforms, Integrated Systems

1.1

Summary

Interconnection and packaging is a phrase that summarizes all of the fabrication and assembly processes that permits the use of silicon (and other semiconductor) in ICs and sensor devices for real world applications. In simplistic terms, interconnection involves techniques to link processing and/or sensing devices together so that they may function as a complete system (or subsystem); this includes the passive components (i.e. capacitors, resistors and inductors) necessary to ‘control’ current and voltage levels, etc. Packaging primarily describes the use of materials to protect semiconductor devices from hazards and damage by providing a barrier to the external environment. This barrier is typically employed for mechanical protection, as well as preventing attack through environmental conditions (e.g. corrosion). It can involve complete encapsulation, as is usually the case with silicon ICs or it can be selective, as is the case for certain chemical or biological sensors, where areas of the sensor are deliberately exposed to permit access to a target medium. New interconnection and packaging technology platforms are constantly emerging, driven by the need to follow Moore’s Law and support the continuously increasing density of silicon circuits. As a result, the traditional structure of electronic packages and the material functions, such as mechanical protection, are being broken down and broadened, respectively. It turns out that innovation in the materials (and assembly processes) that surround the many existing forms of silicon devices are central to realising AmIfriendly concepts, such as Smart Dust and the Disappearing Computer. As a result, many high density systems are emerging that provide a potential route - or a roadmap - to miniaturizing, for example, autonomous sensor nodes. These enablers are very important, particularly when coupled with the emergence of new MEMS devices and the new silicon platforms discussed in Part II. However, in isolation, they lack a route to determining a number of key issues: What exactly should be miniaturised and Why? How can this be done cost effectively and in what way should these (sub) systems be linked to larger heterogeneous systems, such as the internet?

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Numerous wireless sensor node toolkits have emerged to bridge this gap and a selection of these is discussed in Chapter 5. These toolkits offer a means to rapidly create prototypes of sensor subsystems and systems, providing flexibility in use and even network scalability. The Chapter also provides an overview of some of the more significant sensor node miniaturisation programmes. Chapter 6 first provides an overview of microelectronics packaging and then explores the issues of systems integration, miniaturisation and packaging in more detail. In the context of AmI and sensor networks, one of the more interesting areas of research is 3-D packaging; this chapter summarizes this approach, focusing upon two approaches in particular, folded flex packaging and chip in laminate/interconnect, both of which offer certain advantages (as well as further challenges) in realising highly miniaturised autonomous networkable sensors.

1.2


These are in essence MEMS interconnection and packaging techniques. There is a particular emphasis on a systemized approach, where the capability for data conditioning and (local) management is integrated with the sensor device(s) in a single System-in-Package (SiP) solution or even on a single silicon substrate, as a Systemon-Chip (SoC) solution. These techniques are not alone relevant to achieving vision statements, such as Smart Dust, they are a core part of existing roadmaps to increase the performance of existing electronics systems through achieving consistently higher densities in a reliable manner.

1.3


This is a significant area of research and there are numerous publications available. One of the most widely referenced is the ‘Microelectronics Packaging Handbook’ by Rao Tummala et al. This offers a strong insight into interconnection, packaging and integration issues for electronics systems, particularly for those new to this domain of research, and represents an excellent general reference. For those interested in more detailed research, the IEEE Electronic Components & Technology Conference Series is the premier International Conference on this R&D topic. For those interested in research toolkits and the sensor node platforms available there are a number of current sources of information available on the internet, including the Sensor Network Museum and a survey by the EU Project Embedded WiSeNts. There is also, amongst others, the ACM SenSys Conference Series. 1. R. Tummala et al, “Microelectronics Packaging Handbook: Semiconductor Packaging”, Chapman & Hall, January 1997 2. Proceedings of the IEEE Electronic Components & Technology (ECTC) Conference Series. Sponsored by the IEEE Components, Packaging, Manufacturing Technology Society: http:// www.cpmt.org/conf/past.html

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3. The Sensor Network Museum, including network hardware systems: http://www.btnode.ethz. ch/Projects/SensorNetworkMuseum 4. The EU Framework 6 Project (FP6-004400), Embedded WiSeNts report, “Critical evaluation of research platforms for wireless sensor networks” http://www.embedded-wisents.org/studies/ survey_wp2.html 5. Proceedings of the ACM Conference on Embedded Networked Sensor Systems (SenSys): http://sensys.acm.org

Chapter 5

Distributed, Embedded Sensor and Actuator Platforms John Barton1, Erik Jung2

Abstract Distributed embedded sensor and actuator platforms will be at the core of any research initiatives on smart objects. In this context, recent developments in wireless sensing and micro-sensor technologies provide foundation platforms for considering the development of effective modular systems. They offer the prospect, currently at a prototyping level, of flexibility in use and network scalability. Wireless sensor devices are the hardware building blocks required to construct the core elements of wireless sensor networks. A number of large scale research programmes have developed over the last few years to explore these emerging technologies. We review some of the largest of these, including a review of the current wireless sensor integration technologies. This chapter will also look more closely at some of the more well-known wireless motes that are being used as toolkits for research, development and field trials. Keyword Wireless Sensor Nodes, Smart Dust, Smart Matter, E-Grain, E-Cubes, Textile Integration, Advanced Packaging Technology, Applications

1

Introduction

Distributed sensor networks rely on building blocks with autonomous functionality. These building blocks consist of the required sensor, a signal conditioning circuit, a processing unit and the transmit/receive front-end. In addition, power management is required for true autonomy. Depending upon the actual challenges for the network (e.g. life time, fast deployment, low cost) either battery powered nodes, or those that include energy scavenging/conversion and storage functions are required. The latter provide extended life time to the network, but come at additional cost and size. Fig. 5.1 depicts a schematic of an individual node embedded in a distributed network. Networks may provide either a point-to-point protocol (e.g. the node communicates with a central unit) or an ad-hoc network and re-routing functionality, 1

Tyndall National Institute, Lee Maltings, Prospect Row, Cork, Ireland

2

Fraunhofer IZM, Gustav-Meyer-Allee 25, 13355 Berlin, Germany


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Network Communication Phenomena

Sensor Unit (10µW*)

Signal Processing Unit (20µW*)

Base Band Processing Unit (30µW*)

Radio Front End (30µW*)

Power Management

Ambient

Energy Harvesting Unit

Energy

Energy Buffer Unit (600 mWh / cm3) *) Duty Cycle = 0.1 %

Fig. 5.1 Schematic of building blocks for an Ambient Intelligence (AmI) sensor node in a distributed network

transporting the information from one sensor node through multiple networking nodes to their final destination. The second topology is now in use more and more, becoming the most widespread technique. To ‘create’ Ambient Intelligence (AmI), there are additional requirements to a node’s pure functionality. It should be unobtrusive – a fact that may be most important to, for example, medical assistance systems. Larger nodes (e.g. like those shown in Fig. 5.2 and Fig. 5.3) still provide for the majority of current Ambient Intelligence sensors that are currently in use. However, cost and deployment requirements are driving the technologies towards more advanced integration solutions (See Fig. 5.4 and Fig. 5.5), which will be more broadly acceptable and will enable the use in more diverse areas. Sensor networks, particularly those used in outdoor environments, require a high level of ruggedness, as they need to withstand rain, frost, drops, direct sunlight, etc. Integration techniques need to be employed address this right from the beginning of the concept implementation. Thus, challenges for the integration strategies can be summarized as follows: ● ● ● ● ●

Modular sensor exchange High levels of autonomy Miniature for ease of deployment Low cost for mass deployment High level of ruggedness

In order to reach these goals, packaging and assembly strategies have been developed to cope with the challenges. The use of bare die is one of the most straightforward concepts to drive miniaturization and ruggedisation of the assemblies. Progressing from prototype through-hole techniques to high volume capable surface mount device (SMD) technology also provides significant advantages in size, cost and reliability [2].

5 Distributed, Embedded Sensor and Actuator Platforms

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Fig. 5.2 A Sensor node for a micro-environmental monitoring network (~6×2×3cm) (courtesy XBOW)

Fig. 5.3 Commercial node with ~8×8×3cm dimensions (courtesy of Particle Computer)

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Fig. 5.4 Miniature ambient sensor node with 13×11×7mm (courtesy Ecomote) [1]

Fig. 5.5 Evolution roadmap for small, rugged, autonomous sensor nodes used in ambient intelligence systems from 1cm3 to 25mm3 (Fraunhofer IZM)

2

Wireless Sensor Node Platforms

Wireless sensor nodes (typically called motes) are available commercially from a number of SMEs, mainly based in the United States. These include Crossbow Inc [3], Sentilla (formerly Moteiv Inc) [4], Dust Inc [5], Phidgets, Inc [6], Meshnetics [7], Sensicast [8], AccSense [9], Millennial Net [10] and Ember [11]. These 1st generation mote products are targeted primarily at Universities and Research Laboratories for use in experiments and the development of test-beds. However, more and more of these companies are releasing products aimed at the building automation and industrial automation markets. In terms of market size, On World [12], predicts (conservatively) that there will be 127 million ‘motes’ deployed worldwide by 2010. These are primarily 2-D surface mount (SMT) based PCB’s with varying levels of high density packaging.


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Further research into hardware configurations and 3-D packaging of ‘Mote’ PCB’s is carried out at research institutions like the Tyndall National Institute [13, 14, 15, 16], Fraunhofer-IZM [17], IMEC [18], Harvard [19], Imperial College London [20], the Center for Embedded Networked Sensing at UCLA [21], UC Berkeley [22], Lancaster University [23], ETH Zurich [24], MIT [25], Sandia National Laboratories [26], Yale [27], EPFL [28] and by companies such as Intel [29]. A number of these motes are developed for specific technology research purposes, such as algorithm testing, power management, antenna miniaturisation or wireless range improvement. However, most are designed for specific applications, whether it is environmental or energy monitoring, medical applications or animal tracking. A number of these motes will be discussed in more detail. Table 5.1, compares the hardware systems available and suitable for wireless sensor platforms. Some of the platforms referenced in the table have been previously surveyed in [30]. Note that, while many more platforms exist, in this table we have attempted to collect the more versatile platforms, those which are not application dependant and are able to interface to different types of sensors and applications.

2.1

The Mica Family

Probably, the most popular platform utilized by wireless network researchers is the Mica hardware family (See Fig. 5.6) developed by UC Berkeley and commercialized by Crossbow Technologies [3] and MoteIV Corporation (now Sentilla) [4]. The basic architecture has a motherboard with a standard low profile connector that accepts a sensor board. The main board contains power regulation, processor, wireless transceiver and an antenna. The daughter sensing board is connected on top of the motherboard. An ‘AA’ battery socket is attached to the bottom side of the main board. The ‘Mica-Dot’ is also popular as a smaller version, about the size of a 2.5cm coin, allowing the use of a conventional lithium-ion button battery. While ‘WeC’, ‘Rene’ and ‘Dot’ used integrated sensors, the Mica was carefully designed to optimise the sensor interfacing and serve as a general purpose platform for wireless sensor networking (WSN) research. The platforms use a simple modulation RFM radio transceiver. While it is a useful tool for research it has limitations in

Fig. 5.6 Mica2, Mica2Dot and TMote Sky nodes

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Table 5.1 A comparison of selected wireless sensor platforms RAM/Flash/ EEPROM

Radio

OS

512/8k/32k 512/8K/32K 1M/4M

RFMTR1000 RFMRR1000 RDSSS9M

TinyOS TinyOS MicroC

1M/4M

LMX3162

uOS

Platform

CPU

weC [22] Rene1 [22] AWAÌRS

Rene 2 [22] Dot [22] Mica [42] BT node [24]

AT90LS8535 AT90LS8535 StrongARM SA1100 StrongARM SA1100 Atmega163 Atmega163 Atmega128L Atmega128L

SpotON [60] Smart-its (Lancaster) [23] Smart-its (Teco)[23] Mica 2 [22] Mica2Dot [22] iBadge [61] Medusa [62] iMote [29] U3 [63] Spec [64]

DragonBallEZ PIC18F252 Atmega103L Atmega128L Atmega128L Atmega103L AT91FR4081 Zeevo ZV4002 PIC18F452 AVR Risc core

RFRAIN [65]

Particle [68]

CC1010 (8051 core) Atmega128L MSP430F149 Amega128L MSP430F149 MSP430F149 nRF240E1 CC1010 (8051 core) RFPIC12F675

Parasitic node [69]

C8051F311

Pluto 70 Tyndall Mote [14–16]

MSP430F149 Atmega128L

4K/60K/512K 4K/128K/

EnOcean TCM120 [71] Eyes [72] IMote2 [73] uPart [74] Tmote sky [75] EmberRF [64]

PIC18F452 MSP430F1611 PXA 271 rfPIC16F675 MSP430F1611 Atmega128L

1.5K/32K/256 10K/48K 256K/32M/ 64/1K 10K/48K/1M 4K/128K/

mAMPS [59]

MANTIS Nymph [66] Telos [22] MicaZ BSN node [20] MITes [25] AquisGrain [30] RISE [67]

1K/16K/32K 1K/16K/32K 4K/128K/512K 4K/128K/4K

RFMTR1000 RFMTR1000 RFNTR1000 ZV4002 BT CC1000 2M/2M RFMTR1000 3K/48/64K Radiometrix 4K/128K Ericsson BT 4K/128K/512K CC1000 4K/128K/512K CC1000 4K/128K Ericsson BT 4K/32K/136K/1M TR1000 634K/512K Zeevo BT 1K/32K/256 CDC-TR-02B 3K/(*) FSK Transmitter 2K/32K CC1010

TinyOS TinyOS TinyOS TinyOS/ BTnut (*) Smart-its Smart-its TinyOS TinyOS Palos Palos TinyOS Pavenet TinyOS (*)

4K/128K/512K 2K/60K512K 4K/128K 2K/60K/512K 2K/60K/ 4k/128k/512k 2K/32K

CC1010 CC2420 CC2420 CC2420 nRF24E1 CC2420 CC1010

Mantis TinyOS TinyOS TinyOS (*) (*) TinyOS

4K/128K/512K

RFPIC12F675

(*)

512/16K/1280

BR-C11A Class 1 CC2420 EM2420 nRF2401, nRF903, nRF903 TDA5200 TDA5250 CC2420 rfPIC16F675 CC2420 EM2420

(*) TinyOS TinyOS

TinyOS TinyOS TinyOS Smart-its TinyOS EmberNet (continued)


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Table 5.1 (continued) Platform

CPU

RAM/Flash/ EEPROM

XYZ [27] Ant [30] ProSpeck [76] Fleck [77] SunSpot [78] FireFly [79] Sensinode [80] ScatterWeb [81] SHIMMER [31] SquidBee [82]

ML67Q500x MSP430F1232 CY8C2764 Atmega128L ARM7 ATmega32 MSP430F1611 MSP430F1612 MSP430F1611 ATmega168

4k/256k/512k 256/8k/ 256/16k 4k/128k/ 256k/2M/ 2k//32k 10/48k/4M 5k/55k/4G 10k/48k/2G 1k/16k/512

T-nodes [83] WeBee [84]

ATmega128L CC2430/31 8051 core MSP430F1611 MSP430 MSP430 ATmega1281 DSPCoolflux H8S/2218 EPXA1F484C3 MSP430F1611 MSP430F149 C8051F125

Tiny Node [28] Tmote Mini [4] Tmote Invent [4] IRIS [85] SAND [86] ZN1 [87] Fantastic Data node [88] mPlatform [89] SPIDER-NET [90] MASS [26]

Radio

OS

4k/128k/ 8K/128K/

CC2420 nRF24AP1 (*) nRF903 CC2420 CC2420 CC2420 CC1012 CC2420 XBee Maxstream CC1000 CC2430/31

SOS ANT (*) TinyOS SquakVM Nano-RK (*) Contiki TinyOS Xbee firmware TinyOS (*)

10K/48K/512K 10K48K/1M 10k/48k/1M 8k/128k/512k (*) 12K/-/128K 4M/32M/ 10K/48K 4k/60k/ 8k/128k/

XE1205 CC2420 CC2420 802.15.4 (*) 802.15.4 (*) CC2420 CC2400 CC2420 CC1000 (*)

TinyOS TinyOS TinyOS Mote Works (*) (*) (*) (*) (*) mC/OS-II

(*) Not specified on the literature

terms of power consumption. Further versions, the ‘Mica2’ and ‘Mica2Dot’, were designed to provide a more deployable platform; the microcontroller and radio were replaced and lower quiescent currents were achieved. The ‘MicaZ’ replaced the radio to become IEEE 802.15.4 compatible. Finally, the ‘Telos’ and later the ‘Tmote’, further reduced the quiescent current, increased wake-up times and incorporated USB connectivity, all in order to make the platform easier to use for researchers. From a software perspective all of the MICA platforms run TinyOS; the origin of this mote-orientated operating system was that is was originally written around the MICA family.

2.2

The Intel Mote family

The early implementation of motes, such as the mica family, focused upon supporting simple sensors for simple applications that handled low amounts of data (and did not require high bandwidth). Intel motes are designed to satisfy more demanding applications in terms of the amount of handled data and data processing, which is the case for schemes that implement data fusion and aggregation. The main

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driving force for the design of the Intel motes was to improve existing motes in specific areas, including: CPU performance, memory capacity, radio bandwidth and reliability, while being both cost and size effective. The first Intel mote platform was designed in 2003; it is a Bluetooth (802.15.1) based wireless sensor network platform orientated to industrial applications [29]. The platform evolved to become the Intel Mote 2, where both the processor and radio are changed; the Bluetooth radio was replaced by a ZigBee 802.15.4 compliant platform (See Fig. 5.7). In the same fashion as the mica platform, the main board contains power regulation, processing and radio; application dependant daughter boards are connected on top. One reason for choosing Bluetooth was the capability to fully support the Bluetooth scatternet mode, which is required in order to build mesh networks of piconets. The Intel Mote2 incorporates an onboard Zigbee 802.15.4 radio, but allows for a possible addition of a Bluetooth module. Both platforms can run on TinyOS and the latest versions can run Linux for more demanding applications; these are commercially available through Crossbow technologies. In 2005, the Intel Digital Health Group created the SHIMMER, shown in Fig. 5.8 [31]. While this sensor node is orientated towards health and wearable

Fig. 5.7 The Intel I-Mote and I-Mote2

Fig. 5.8 The Intel SHIMMER Mote


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applications, it is versatile and easy to use; this makes the SHIMMER a perfect platform for research applications. One of the key features of the design is the dual radio interface, allowing for Bluetooth and IEEE 802.15.4, as well as the MicroSD card interface, which permits up to 2G of on-board memory storage. It contains the popular low power MSP430F1611 microcontroller. The board is designed on a thin substrate and allows connectivity to daughter sensing boards and the programming interface module. SHIMMER can also run over TinyOS.

2.3

The BT node

The BT node [24] is probably the first light computational mote that includes a dual radio option (See Fig. 5.9). It is an autonomous wireless communication and computing platform based on a Bluetooth radio, a low power radio and microcontroller. It has been developed as a demonstration platform for research in mobile and ad-hoc networks and in distributed sensor networks. The BT node has been jointly developed at the ETH Zurich (Swiss Federal Institute of Technology in Zurich) by the Research Group for Distributed Systems and the Computer Engineering and Networks Laboratory [32]. There have been three major hardware revisions of the BT node hardware platform. The first revision was a Bluetooth based only and, while it had advantages in terms of connectivity and data throughput associated with Bluetooth, the power consumption was excessive for real deployments or applications. The third revision of the mote includes both a low power radio CC1000 and a Bluetooth module, with lower power consumption than other revisions. The main advantage of the platform is the potential to coexist in a heterogeneous network; the node can even act as bridge between Bluetooth devices and low power networks. From a mechanical point of view, the platform is similar

Fig. 5.9 The BT Node

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to the mica family. It contains a vertical connector to attach daughter boards and the battery receptacle is placed at the bottom of the board. As a software system, the BT node can run both the ‘BT nut’ and the TinyOS operating systems. The Swiss distributor Art of Technology [33] has commercialized the BT nodes.

2.4

The Tyndall Mote

Since its emergence in 2003, the Tyndall Mote, developed at the Tyndall National Institute by the Wireless Sensor Networks Team [34] has become an invaluable tool among research institutes across Ireland. As opposed to previously described platforms, the Tyndall Mote is compact, highly reconfigurable and truly modular. The design is based around several 25×25mm boards that are interconnected by means of two standard connectors placed on contiguous sides of each of the square boards. The connectors add mechanical robustness to the system and provide for electrical interconnection between layers on a shared bus. There are many compatible customlayer designs, ranging form a ZigBee compliant radio to a generic sensor interface layer. FPGA technology and additional processing capability can easily be incorporated into the system stack when required by simply adding the required layer, similarly appropriate power supplies and battery layers or coin cell battery layers can be stacked one on top of each other, also in a modular fashion (See Fig. 5.10). The communication layer contains a radio, a suitable processor and power regulation [16]. To date, there are ZigBee compliant, 2.4GHz, 868MHz and 433MHz communication layers, allowing maximum design flexibility for the application and enabling the Tyndall system to be used in a wide variety of deployment scenarios. All of the communication layers are designed with an on-board ATmega128L microcontroller and extensive C library drivers, developed to integrate the radio and transceivers, as well as being compatible with TinyOS, and other standard

Fig. 5.10 The Tyndall 25mm Mote


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operating systems commonly in use in the research community. An increasing number of application specific sensor layers have been developed to meet various project requirements (up to 20 to date) including health monitoring layers and full six degree of freedom inertial measurement units [14, 15]. A programme of further miniaturisation of the Tyndall Mote has resulted in a modular stackable 10mm mote (See Fig. 5.11). This mote includes: ●

●

A transceiver module with a size of 10mm by 10mm, operating in the 433/868MHz frequency bands. An interface layer providing a regulated power supply from a rechargeable battery, USB battery charging, and USB communications to support the transceiver module [35].

The node has been designed to support very low power operation for applications with low duty cycles, with a sleep current of 3.3mA, transmission current of 10.4mA, and reception current of 13.3mA. The small size, combined with the level of modularity and energy efficiency, results in a system that is suited to a wide variety of potential applications. Currently, a sensor interface module in the 10mm form factor is available. This includes a temperature and humidity sensor, a light sensor, and a 2-axis accelerometer. From a software perspective, several layers have been ported to TinyOS; most are now compatible with TinyOS-based programming.

3

Smart Dust, Smart Matter, the E-Grain and E-Cubes

A number of large scale research programmes have developed over the last few years to explore the emerging distributed sensing technology sector. A selection of these will be examined below.

Fig. 5.11 The Tyndall 10mm Mote

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Fig. 5.12 The full Smart Dust Concept

Fig. 5.13 The WeC platform

3.1

Smart Dust

Kristofer Pister, a professor of electrical engineering at the University of California, Berkeley and one of the pioneers in the wireless sensor networks field, first coined the term “smart dust” in 1997. Extrapolating the recent advances in microelectronics and in wireless communications, he reasoned that a low-power computer could be built within one cubic millimetre of silicon. This “cubic millimetre mote” would contain a battery, a two-way radio, digital logic circuitry, and the capability to monitor its surroundings. This became know as


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the “Smart Dust” project [36, 37, 38]. Building upon the original concept, the ultimate project goal was to develop a system of wireless sensor modules where each unit was approximately the size of a mote of dust. The work includes miniaturization, including use of die-bonding, flip-chip and wire-bond assembly, employing integrated micro-sensors, and computation, as well as wireless (RF/ optical) communication. A recent review [43] discusses various techniques to take smart dust in sensor networks beyond millimetre dimensions to the micrometer level. The mote concept (as we know it today) was created in this context and evolved by researchers, such as David Culler at the University of California, Berkeley. Culler’s group went on to create TinyOS [39, 40, 41] and is now the lead developers of this operating system (see Fig. 5.12). WeC [42] was probably the first wireless sensor platform, or mote, ever conceived (see Fig. 5.13). It was introduced by the University of Berkeley as one of the outcomes of the Smart Dust project. WeC can be considered as the “mother” of the wireless sensor nodes outlined in the previous sections. Since its appearance in 1998, tens or even hundreds of platforms have been designed based on the WeC architecture.

3.2

Smart Matter

The ‘Smart Matter’ research programme at Xerox’s Palo Alto Research Centre (PARC) started around the same time as ‘Smart Dust’, seeking to enhance the environment by embedding microscopic sensors, computers and actuators into materials [44]. Smart matter was therefore defined originally as a physical system or material with arrays of microelectromechanical (MEMS) devices embedded in it in order to detect, and adjust to, changes in their environment. For example, smart matter could be used to move sheets of paper in a printing machine or maneuver an aircraft by performing tiny adjustments to wing surfaces. Generally, each MEMS device embedded in smart matter contains microscopic sensors, actuators, and computational elements. A characteristic of smart matter is that the physical system consists of large numbers (possibly thousands) of microelectromechanical devices. These devices work together to deliver a desired higher level function. PARC’s initial research activities in this area included a Smart Matter-driven paper path, smart beams and columns capable of adjusting their load-bearing strength and stiffness, distributed control strategies for Smart Matter, and novel fabrication techniques that merge MEMS technology and macro-scale objects. Since then, the research area has considerably expanded at PARC and now some of the many research themes in the area of Smart Matter integrated systems include embedded collaborative computing, embedded reasoning, modular robotics, large area electronics, industrial inkjet printing systems and controlled droplet dispensing [45, 46].

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The Fraunhofer e-Grain concept

As shown, the modular break down of a distributed sensor node can be implemented now in a layered approach, where each functional block is realized in an individual miniature module. The final sensor node is realized when these modules are connected together,. The individual modules can be realized in SMD technology and even (specifically for the high levels of miniaturization) using bare dice and fine pitch interconnect schemes. Fig. 5.14 shows such a concept, where the individual layers consist of the actual sensor module with a signal conditioning circuit, the communication module and the energy storage/conversion module. As part of a collaborative project to promote self-sufficient distributed microsystems (funded by the German Research Ministry) the eGrain project - Autarkic Distributed Microsystems - was started, coordinated by Fraunhofer-IZM [47–49]. The project, commenced in 2002, sought to develop the necessary systems integration technologies to achieve a distributed microsystem. Also participating in the project were researchers at Technical University Berlin, developing network software and miniature antennas, and researchers from Ferdinand-Braun-Institut in Berlin, working on low-power high-frequency circuits. The long term goal of the project is the development of a 3D integrated cube with dimensions of 4mm × 4mm × 2mm, working off a 3V power source, with an energy capacity of 3.2 mWh. The target data rate is one Mbit/s at a frequency of either 24 or 60 GHz with a range of 1 m at a transmitting power of 0.1 mW.

Fig. 5.14 Fig. 52: Modular building blocks of a sensor node for ambient intelligence networks: sensor- signal conditioning -Tx/Rx - power supply


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By utilising advanced packaging technologies (including surface mount (SMD), chip-on-board (COB) technology, flexible fine-line interposer, flip chip, vertical chip integration, thin-chip integration on flex; integrated passive devices on flex or CSP), prototypes of wireless sensor nodes were implemented to verify the design approach. Several miniaturization steps with different 3D system integration technologies were realized during the exploration of this design space. Starting from modules of 2.6cm (about one inch) edge length in conventional SMD technology (See Fig. 5.15), miniaturization has since shrunk the wireless sensor system to 2 cm (per side). At this size, the modules were realized using bare die that are attached by flip chip mounting. Subsequently, prototypes of 1 cubic centimetre were developed, based upon a folded flexible substrate. Finally, flip chips on both substrate sides allowed folded modules of only 6mm (in edge length).

3.3.1

Advanced techniques (flex folding)

For higher miniaturization requirements, alternative approaches to the “packageon-package” (PoP) concept have been used; for a PoP system the individual die are separately packaged and then the system is assembled. As stated above, folded flex carriers using bare die are a good approach, benefiting from the mature flexible substrate technology. This folded flex approach can shrink a PoP module to ~ 1/10 volume (See Fig. 5.16).

Fig. 5.15 26mm × 26mm × 24mm eGrain prototype

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Fig. 5.16 An ultra-miniature sensor node for ambient sensing and communication (courtesy Fraunhofer IZM)

3.3.2

Emerging techniques

The previously mentioned concepts rely on established, advanced assembly and interconnect techniques and will not benefit from the scalability in size and cost we can see in the semiconductor industry. Techniques like Wafer Level Assembly (See Fig. 5.17), or wafer integrated systems, will allow future systems to be manufactured in scalable technologies. The individual functional layers are not handled individually anymore, but as full wafers, stacked and interconnected with through silicon vias (See Fig. 5.18). Another emerging alternative for integration is the use of stacked wafers, leveraging the commercial advent of three dimensional through-silicon vias (3D-TSV). Here, advanced fabrication processes, derived from surface micromachining, are used to create and metal-fill vias, which interconnect the different wafers together. In order to do this, the wafers mounted in the sequence need to be backside thinned to 50um (remaining silicon thickness). Currently, these technologies are reaching a maturity level that makes them attractive for semiconductor manufacturers, specifically for memory modules. However, as soon as these techniques have entered the mainstream, they are available also for complex system realization [50].

3.4

The e-Cubes Project

Two of the collaborators in the eGrain project – Fraunhofer IZM and Technical University Berlin are also involved in the eCubes project [51], a large scale European Project, which commenced in February 2006. The objective of e-CUBES (See Fig. 5.19) is to advance micro-system technologies to allow for cost-effective realization of highly miniaturised, truly autonomous

5. Distributed, Embedded Sensor and Actuator Platforms

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Fig. 5.17 Wafer level assembly of embedded circuitry (electronics, sensor, passive components) using thin chips (~20um) (courtesy Fraunhofer IZM)

Fig. 5.18 Through silicon vias for wafer stack interconnect, creating subminiature systems (images courtesy of 3D EMC)

Fig. 5.19 The concept of e-CUBES in the context of global AmI Systems

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systems for Ambient Intelligence (AmI). With 20 partners from 11 countries, eCubes is a significant research undertaking. In order to achieve a cost effective solution for the highly miniaturised e-CUBES system, the project is applying 3D interconnect technologies (“cubic” interconnects - hence the name e CUBES), as well as using modularity (reuse) and wafer level fabrication technologies (in order to reach the required economies of scale). The e-CUBE is a 3D stack of functional sub-modules, each of which is, in itself, composed of a 3D stack of different (heterogeneous) functional layers (e.g. e-CUBE application layers). Given the projected improvements in integrated circuit technology (with respect to die size, power consumption and frequency capabilities) the target size for the e-CUBES project is to be smaller than 1cm3. Technologically, the project also focuses on functional building blocks for integration, such as the individual communications, sensor and power components. The overall application scenarios envisaged by the project are in 1) health and fitness, 2) aeronautics and space and 3) Automotive.

4 4.1

Systems Examples Using Advanced Packaging Technology Textile Integration

For ambient sensing on the human body, rigid electronics and electronic interconnecting cables are not suitable. A more acceptable solution would be the direct integration of the electronic sensors and circuitry in the clothing. As any rigid cable would interfere with the user’s movements and habits, integration with textile-based electrodes and wiring is preferred. Conductive yarn (See Fig. 5.20) has become available in recent years and has been demonstrated to provide low resistance, high reliability, and possibilities for high density interconnect [52]. Multi-threading offers a high degree of redundancy; this may ensure contact, even after multiple washing cycles and everyday wear and tear. Module interconnect can be obtained by pushbutton style mounting of electronic modules or by sewing the module to the fabric.

Fig. 5.20 Conductive yarn for textile inspired interconnects (e.g. [17])


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Fraunhofer IZM and TITV Greiz have pioneered these approaches, in which miniature, non-obtrusive modules can be safely connected to a woven substrate (e.g. low-density routing using conductive yarn) by either of the interconnect techniques (See Fig. 5.21). To protect both the electronic module and interconnect during, for example, washing and pressing, a thin encapsulation using an electronic mold compound (EMC) was applied to ruggedize the assemblies. The use of lamination (using duromeric polymer layers – See Fig. 5.22) over the sensitive area has also been evaluated. The potential for reliable operation of these created interconnects has been demonstrated successfully [53].

4.2

A system for monitoring in vineyards

GrapeNetworks in California has launched products based upon a variety of sensors (including humidity and temperature) with full ad-hoc networking capability and integrated them to a web-based infrastructure for global monitoring

Fig. 5.21 Sewn interconnects using conductive yarn to connect an electronic miniature module to a textile substrate (courtesy Fraunhofer IZM)

Fig. 5.22 Protection of sewn-on electronic module by lamination of a duromeric polymer (courtesy Fraunhofer IZM)

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Fig. 5.23 Sensor node for a wireless ambient aware network (courtesy Grape Networks)

applications. Key customers include grape manufacturers for wine, using the systems to ensure that the optimum supply of water is provided to the growing grapes (See Fig. 5.23) [54].-

4.3

Long-range systems for environmental monitoring

SensorWare, a spin out from NASA research, has developed a multi-sensory pod that provides long range communication [55, 56]. The required autonomy of the system is ensured by a solar cell on top of the sensor/communication pod or by an adequate battery unit. The commercial implementation is larger than the research prototype, as target ranges in Antarctica require many miles of coverage with the sensors (Fig. 5.24).

4.4

A high-density demonstrator

Fraunhofer IZM has demonstrated (using a 3D stacked package concept) the modular integration of a complete miniaturized sensing/transmission system [57] that, as a demonstrator, enables a golf ball (See Fig. 5.25) to communicate strike data to a remote system [58]. The core techniques used here were based on low power accelerometers in silicon surface micromachining, a proprietary signal conditioning circuit and a Bluetooth chip stack. The latter was selected for easy integration into an existing IT infrastructure with data rates that are high enough to transmit the information to the PDA. It is not currently optimized for energy management.


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Fig. 5.24 Sensor module for ambient sensing and communication, miniature and deployed version with solar energy supply (courtesy Sensor Ware Systems, Inc.)

Fig. 5.25 Smart Golf Ball insert, leveraging advanced packaging techniques for miniature ambient sensing (courtesy Fraunhofer IZM)

5

Conclusion

Recent developments in wireless and micro-sensor technologies have provided foundation platforms for the development of effective modular systems. They offer the prospect of flexibility in use and network scalability. Wireless sensor devices are the key hardware platforms required to construct the building blocks of wireless

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sensor networks; their existence is the direct consequence of three main key breakthroughs in microelectronics: ●

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Recent progresses in very large scale integration (VLSI), moving towards nanotechnology, and packaging technology, developing chip scale package (CSP), led to development of miniaturised, very low cost and low power microcontrollers. Advances in RF technology in parallel with CMOS processing, resulted in the development of highly integrated, high performance RF front ends leading to transceivers with on-chip integrated functional blocks. Microelectromechanical (MEMS) technology enabled the development of low power, low cost, highly miniaturised sensors that can potentially be integrated in silicon substrate among other circuitry.

These advances in technology make possible the vision of highly integrated, inexpensive microsystems that are able to sample, process information and then communicate over short distances. While the electronic performance, the size and the cost of these micro-sensor devices might meet the demands of certain wireless sensor networks applications, battery technology has not been able to cope with the pace of the advance and constitutes a bottle neck on the development of many other application areas.

References 1. P. H. Chou, Y.C. Chung, C.T. King, M.J. Tsai, B.J. Lee, and T.Y. Chou, “Wireless Sensor Networks for Debris Flow Observation,” in Proceedings of the 2nd International Conference on Urban Disaster Reduction (ICUDR), Taipei, Taiwan, November 27–29, 2007 2. J.P. Clech et al., “Surface mount assembly failure statistics and failure free time”, ECTC 1994, pp. 487–497 3. Crossbow Inc - http://www.xbow.com/ 4. MoteIV Corporation (now Sentilla) - http://www.sentilla.com/ 5. Dust, Inc - http://www.dust-inc.com/ 6. Phidgets, Inc - http://www.phidgets.com/ 7. Meshnetics - http://www.meshnetics.com/ 8. Sensicast - http://www.sensicast.com/wireless_sensors.php 9. AccSense - http://www.accsense.com/ 10. Millennial Net - http://www.millennial.net/products/meshscape.asp 11. Ember - http://www.ember.com/products_index.html 12. On-World WSN Report, 2005 13. B. Majeed et al, “Microstructural, Mechanical, Fractural and Electrical Characterisation of Thinned and Singulated Silicon Test Die”, J. Micromech. Microeng. Volume 16, Number 8, August 2006 pp. 1519–1529 14. J. Barton et al, “25mm sensor–actuator layer: A miniature, highly adaptable interface layer”, Sensors and Actuators A 132 (2006), pp. 362–369, November 2006 15. S. J. Bellis et al, “Development of field programmable modular wireless sensor network nodes for ambient systems”, Computer Communications - Special Issue on Wireless Sensor Networks and Applications, Volume 28, Issue 13, pp. 1531–1544. (Aug 2005) 16. B. O’Flynn et al, “A 3-D Miniaturised Programmable Transceiver”, Microelectronics International, Volume 22, Number 2, 2005, pp. 8–12, (Feb 2005)


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17. http://www.textile-wire.ch/downloads/neu_textile_wire_doc_de.pdf 18. S. Stoukatch et al, “3D-SIP Integration for Autonomous Sensor Nodes”, Proc. ECTC 2006, Sheraton San Diego, San Diego, California, May 30- June 2, 2006, pp. 404–408 19. K. Lorincz, et al, “Sensor networks for emergency response: challenges and opportunities”, IEEE Pervasive Computing, Volume 3, Issue 4, Oct-Dec 2004, pp. 16–23 20. B. Lo et al, “Architecture for Body Sensor Networks”, Proc. Perspective in Pervasive Computing Conference, October, 2005, pp. 23–28 21. D. Mclntire et al, “The low power energy aware processing (LEAP) embedded networked sensor system”, Proc.s Fifth International Conference on Information Processing in Sensor Networks (IPSN 2006), 19–21 April 2006, pp. 449–57 22. J. Polastre, R. Szewczyk, and D. Culler, “Telos: enabling ultra-low power wireless research,” in Information Processing in Sensor Networks, IPSN 15-April-2005, Page(s) pp. 364–369 23. H. Gellersen et al, “Physical prototyping with Smart-Its” IEEE Pervasive Computing, Volume 3, Issue 3, July-Sept. 2004 pp. 74–82 24. J. Beutel et al, “Prototyping Wireless Sensor Network Applications with Btnodes,” Proc. 1st European Workshop on Sensor Networks (EWSN 2004), pp. 323–338. 25. E. M. Tapia, et al, “MITes: wireless portable sensors for studying behavior,” in Proceedings of Extended Abstracts Ubicomp 2004: Ubiquitous Computing, 2004. 26. N. Edmonds et al, “MASS: modular architecture for sensor systems” Proc. Fourth International Symposium on Information Processing in Sensor Networks, 2005. IPSN 2005. pp. 393–397 27. D. Lymberopoulos et al, “XYZ: a motion-enabled, power aware sensor node platform for distributed sensor network applications” Proc. Fourth International Symposium on Information Processing in Sensor Networks, 2005. IPSN 2005, pp. 449–454 28. H. Dubois-Ferriere et al, “TinyNode: a comprehensive platform for wireless sensor network applications”, Proc. Fifth International Conference on Information Processing in Sensor Networks, 2006. IPSN 2006, pp. 358–365. 29. L. Nachman et al, “The Intel mote platform: a Bluetooth-based sensor network for industrial monitoring”, Proc. Fourth International Symposium on Information Processing in Sensor Networks, 2005. IPSN 2005, pp. 437–442 30. P. van der Stok, “State of the art,”IST-034963, WASP. Deliverable D1.2: Mar.2007 31. B. Kurtis and T. Dishongh, “SHIMMER: Hardware Guide,”Intel Digital Health Group, Version 1.3, Oct.2006. 32. ETH-TK, Computer Engineering and Networks Laboratory. http://www.tik.ee.ethz.ch/ 33. Art of Technology, Art of Technology AG website. http://www.art-of-technology.ch/english/ index.html 34. Tyndall National Institute: http://tyndall.ie/ 35. S. Harte et al, “Design and Implementation of a Miniaturised, Low Power Wireless Sensor Node”, Proc. 18th Euro. Conf. Circuit Theory and Design, Seville, Spain, August 26-30th, 2007, pp. 894–897 36. J.M. Kahn et al, “Next century challenges: Mobile networking for smart dust”, In Proc. 5th ACM/IEEE Ann. Int’l Conf. Mobile Computing and Networking (MobiCom ‘99), pages 271–278. ACM Press, New York, August 1999. 37. B. Warneke et al, “Smart dust: Communicating with a cubic-millimeter computer,” Computer, vol. 34, no. 1, p. 44–51, Jan.2001. 38. The University of Berkely, Smart Dust project website. http://www-bsac.eecs.berkeley.edu/ archive/users/warneke-brett/SmartDust/index.html. 39. J.L. Hill et al, “System architecture directions for networked sensors”, In Proc. 9th Int’l Conf. Architectural Support Programming Languages and Operating Systems (ASPLOSIX), pages 93–104. ACM Press, New York, November 2000 40. P. Levis et al, “Ambient Intelligence”, chapter TinyOS: An Operating System for Sensor Networks, pages 115–148. Springer, Berlin, 2005. 41. http://www.tinyos.net/ 42. J. Hill and D. Culler, “Mica: A Wireless Platform for Deeply Embedded Networks”, IEEE Micro., vol. 22(6), Nov/Dec 2002, pp. 12–24.

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43. M. J. Sailor et al, “Smart dust: nanostructured devices in a grain of sand”, Chemical Communications, vol. 11, p. 1375, 2005 44. T. Hogg and B. A. Huberman, “Controlling smart matter”, Smart Mater. Struct. 7 No 1 (February 1998) R1–R14 45. www.parc.com/research/subtheme.php?subtheme=Smart+Matter+Integrated+Systems 46. www.parc.com/research/projects/ecc/collaborative_sensing.html 47. M. Jürgen Wolf, “The e-Grain Concept - Microsystem Technologies for Wireless Sensor Networks”, Advanced Microsystem Packaging Symposium, April 7th, 2005, Tokyo, Japan 48. M. Niedermayer, et al, “Miniaturization platform for wireless sensor nodes based on 3D-packaging technologies”, Proc. Fifth International Conference on Information Processing in Sensor Networks, 2006. IPSN 2006. pp. 391–398 49. http://www.e-grain.org/ 50. V. Kripesh, “Silicon Substrate Technology for SiP Modules”, EMC 3D Technical Seminar, Munich, Jan 2007 51. The eCubes Project: http://ecubes.epfl.ch/public/ 52. T. Linz et al., “Embroidering electrical interconnects with conductive yarn for the integration of flexible electronic modules into fabric”, Wearable Computers, 2005, pp. 86–89 53. T. Linz et al., “Contactless EMG sensors embroidered onto textile”, Proc. Of 4th International Workshop on Wearable and Implantable Body Sensor Networks, Berlin, 2007, pp. 29–34 54. J. Burrell et al., “Vineyard computing: sensor networks in agricultural production”, Pervasive Computing Volume: 3, Issue: 1, 2004, pp. 38–45 55. K. Delin et al., “The Sensor Web: A New Instrument Concept”, SPIE’s Symposium on Integrated Optics, 20–26 January 2001, San Jose, CA 56. K. Delin et al., “Sensor Web for Spatio-Temporal Monitoring of a Hydrological Environment”, Proceedings of the 35th Lunar and Planetary Science Conference, League City, TX, March 2004 57. M. Niedermayer et al., “Miniaturization platform for wireless sensor nodes based on 3D-packaging technologies”, Information Processing In Sensor Networks, SPOTS 06, Nashville, 2006, pp. 391–398 58. K.D. Lang et al., Industrially compatible PCB stacking technology for miniaturized sensor systems”, EPTC 2005, Singapore, 2005, pp. 6–10 59. R. Min et al, “An architecture for a power-aware distributed microsensor node”, in Workshop on Signal Processing Systems, SiPS 13-October-2000, Page(s) pp. 581–590 60. J. Hightower et al, “SpotON: An indoor 3D location sensing technology based on RF signal strength”, University of Washington, Department of Computer Science and Engineering, Seattle, WA, 2000 61. A. Chen et al, “A support infrastructure for the smart kindergarten”, IEEE Pervasive Computing, vol. 1, no. 2, pp. 49–57, June 2002. 62. A. Sawides and M. B. Srivastava, “ A distributed computation platform for wireless embedded sensing”, in International Conference on Computer Design: VLSI in Computers and Processors, ICCD 16-September-2002, Page(s) pp. 220–225 63. S. Saruwatari et al, “PAVENET: A Hardware and Software Framework for Wireless Sensor Networks”, Transactions of the Society of Instrument and Control Engineers, vol. E-S-1, no. 1, pp. 76–84, Nov. 2004. 64. J. L. Hill, “System architecture for wireless sensor networks.” PhD thesis is Computer Science, University of California, Berkeley, 2003. 65. RFRAIN: RF random access integrated nodewww.media.mit.edu/resenv/rfrain/index.html 66. H. Abrach, S. Bhatti, J. Carlson, H. Dai, J. Rose, A. Sheth, B. Shucker, J. Deng, and R. Han, “MANTIS: system support for multimodAl NeTworks of in-situ sensors,” in International Workshop on Wireless Sensor Networks and Applications, IWWNA 2003, Page(s) pp. 50–59 67. A. Banerjee et al, “RISE - Co-S: high performance sensor storage and Co-processing architecture”, in IEEE Communications Society Conference on Sensors and Ad Hoc Communications and Networks, IEEE SECON 29-September-2005, Page(s) pp. 1–12.


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68. Teco, “Selection of Smart-Its Particle Prototypes, Sensor and Add-On Boards”. http://particle. teco.edu/devices/devices.html. 69. L. Laibowitz and J. A. Paradiso, “Parasitic mobility for pervasive sensor network”, in International Conference on Pervasive Computing, PERVASIVE May-2005, Page(s) pp. 255–278. 70. V. Shnayder et al, “Sensor networks for medical care,”Technical Report TR-08-05, Division of Engineering and Applied Sciences, Harvard University, 2005. 71. EnOcean Transceiver Module TCM120 datasheet. http://www.enocean.com/php/upload/pdf/ DB_ENG7.pdf. Last accessed: 21-7-0007 72. S. Blom et al, “Transmission Power Measurements for Wireless Sensor Nodes and their Relationship to the Battery Level”, in International Symposium on Wireless Communications Systems 7-September-2005. 73. R. M. Kling, “Intel Motes: advanced sensor network platforms and applications”, in MTT-S International Microwave Symposium Digest, MWSYM June-2005, pp. 4. 74. M. Bigl et al, “The uPart experience: building a wireless sensor network”, in International Conference on Information Processing in Sensor Networks, IPSN 21-April-2006, Page(s) pp. 366–373. 75. Moteiv wireless sensor networks, Tmote Sky datasheet. http://www.moteiv.com/products/ docs/tmote-sky-datasheet.pdf. 76. D. K. Arvind and K. J. Wong, “Speckled computing: disruptive technology for networked information appliances”, in International Symposium on Consumer Electronics 3-September2004, Page(s) pp. 219–223. 77. P. Sikka et al, “Wireless sensor devices for animal tracking and control”, in International Conference on Local Computer Networks, LCN 18-November-2004, Page(s) pp. 446–454. 78. Sun Microsystems Laboratory, “Sun SPOT system: Turning vision into reality”,2005. 79. R. Mangharam et al, “Voice over sensor networks,” in International Real-Time Systems Symposium, RTSS December-2006, Page(s) pp. 291–302. 80. Sensinode Inc,Sensinode: Micro hardware manual. http://www.sensinode.com/pdfs/ sensinode-manual-hw.pdf. 81. M. Baar et al, “Poster Abstract: The ScatterWeb MSB-430 platform for wireless sensor networks”, in The Contiki Hands-On Workshop March-2007. 82. SquidBee Open Hardware and Source, SquidBee datasheet. http://www.libelium.com/squidbee/upload/c/c1/SquidBeeDataSheet.pdf. 83. O. W. Visser, “Localisation in large-scale outdoor wireless sensor networks”, Master’s Thesis in Computer Science, Delft Univeristy of Technology, 2005. 84. Center of Excellence for Embedded Systems Applied ResearchLucerne University of applied Sciences, Datasheet WeBee Three. http://www.ceesar.ch/cms/upload/pdf/projects/Datasheet% 20WeBee%20Three.pdf 85. Crossbow Technologies Inc, IRIS datasheet. http://www.xbow.com/Products/Product_pdf_ files/Wireless_pdf/IRIS_Datasheet.pdf. 86. M. Ouwerkerk et al, “SAND: a modular application development platform for miniature wireless sensors”, in International Workshop on Wearable and Implantable Body Sensor Networks, BSN 2006, Page(s) pp. 166–170. 87. S. Yamashita et al, “A 15 × 15 mm, 1 uA, reliable sensor-net module: enabling applicationspecific nodes”, in International Conference on Information Processing in Sensor Networks, SPOTS 21-April-2006, Page(s) pp. 383–390. 88. T. Hammel and M. Rich, “A higher capability sensor node platform suitable for demanding applications”, in International Conference on Information Processing in Sensor Networks, IPSN 27-April-2007, Page(s) pp. 138–147. 89. D. Lymberopoulos et al, “mPlatform: a reconfigurable architecture and efficient data sharing mechanism for modular sensor nodes”, in International Conference on Information Processing in Sensor Networks, IPSN 27-April-2007, Page(s) p. 137. 90. K. Sweiger et al, “SPIDER-NET: a sensor platform for an intelligent ad-hoc wireless relaying network”, in International Conference on Mobile Computing and Networking, MobiCom 2004, Page(s) pp. 125–126

Chapter 6

Embedded Microelectronic Subsystems John Barton

Abstract This chapter explores embedded microelectronic sub-systems by first defining the meaning of microelectronics packaging. Increasing the packaging density of electronic products, through techniques such as integral substrates and advanced interconnect, is a key issue. This challenge needs to be addressed inherently through electronic packaging in order to meet consumers demand for light-weight, compact, reliable and multifunctional electronic or communication devices. The technological advances, particularly 3-D packaging, which is driven by consumer demand can also enable concepts such as smart objects, smart spaces and augmented materials. This chapter provides a concise review of selected areas in 3-D packaging and then focuses upon two areas that may provide the type of flexibility and density required for future high-volume smart object development. These techniques are folded flex packaging and chip in laminate/interconnect. Keywords Interconnection, Packaging, Miniaturisation, System-in-Package, Folded-flex, Wafer-level Packaging, Flip-chip, Chip-in-Laminate, Silicon Thinning

1 1.1

Introduction The Function of the Package

The function of the ‘package’ in microelectronics packaging is to provide mechanical support and environmental protection for an IC, or ICs, and for their interconnections to each other; it must also provide a means to transfer signals and data to the next ‘packaging’ level [1]. To function electrical circuits must be supplied with electrical energy, which must be either be transferred or consumed, meaning it is converted into thermal energy. The major functions that a ‘package’ is required to fulfill in an electronic circuit design are: Tyndall National Institute, Lee Maltings, Prospect Row, Cork, Ireland


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Signal distribution, which involves primarily consideration of topological and electromagnetic issues. Power distribution, which includes consideration of electromagnetic, structural and material performance. Heat dissipation (and cooling), which considers both structural and materials constraints. Protection (mechanical, chemical and electromagnetic) of the components and interconnection in the package itself.

An example of the packaging hierarchy [1] including an archetypal first level package or single chip package is shown in Fig. 6.1. Innovation in assembly and packaging is accelerating in response to fact that packaging is now the limiting factor in cost and performance for many types of devices. Difficult challenges exist, in the short-term, in all phases of the assembly and packaging process from design through manufacturing to test and reliability. Many critical technology targets have yet to be met and achieving these targets will require significant investment in research and development. According to ITRS roadmap 2007 [2], some of the most difficult short-term challenges in assembly and packaging technology are:

Wafer Electronic Package Hierarchy

Chip First level package (Multichip Module)

First level package (Single chip Module) COB

Second level package (PCB or Card)

Third level package (Mother board)

Fig. 6.1 Packaging Hierarchy [R. Tummala et al]

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1. 3D packaging, which includes bumpless interconnect architectures, thermal management, wafer-wafer bonding, through-wafer via structures and the via fill process. 2. Small die with high pad count and high current density packages, which includes electromigration, thermal/mechanical reliability modeling, whisker growth and thermal dissipation issues. 3. Flexible system packaging, which includes low cost interconnection, as well as small and thin die assembly.

2

3D Packaging

Assembly and packaging technology requirements are being driven as much by the rapidly changing market requirements as by the advancing generations of silicon technology. New package types are evolving in response to the demand for smaller, thinner and lighter electronic products, particularly for the rapidly expanding consumer market. Wafer-Level Packaging (WLP) and System-in-Package (SiP) are two new packaging categories that require the implementation of new and complex manufacturing technologies, with significant infrastructural investment. Wafer-Level Packaging [3, 4, 5], where the packaging functions are achieved through wafer level processing, holds the promise of lower cost and improved performance for single die packages (See Fig. 6.2). System-in-Package (See Fig. 6.3), where system integration is achieved in die packaging, enables the smaller sizes, lower cost, higher performance and shorter time to market demanded for consumer electronics [6, 7, 8]. These two package types represent paradigm shifts that, with further advancement, will in turn seek to deliver a suite of future technology to meet both the demands of future market applications (technology pull) and of advancing semiconductor technology generations (technology push). In a recent strategy document for European nanotechnology research [10], 3D integration is clearly cited as one of the leading methods for complex multifunctional systems. In the document, a number of technologies are named as priorities for research including: wafer-thinning, dicing, handling, thin interconnect, chip-to wafer integration, low temperature wafer bonding technologies, technologies for functional

Fig. 6.2 Schematics of Wafer-level packaging, showing different wafers stacked on top of each other, with interconnection formed through the via holes in the wafers [4]

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Fig. 6.3 Chip level stacking, showing three chips stacked and interconnection made through the wire bonding [9]

polymer layers (including chip-in-thin-film layers, interconnection by wafer transfer), functional layer integration (actuators, sensors, antennas, lenses), as well as 3D Integration (vertical chip integration, through-silicon vias, power vias. etc). There are several companies and research institutes all over the world currently working on the research and development of 3D integrated systems. Besides approaches based on fabrication of multiple device layers, using re-crystallization or silicon epitaxial growth, there is a large spectrum of technological concepts, which can be classified in three categories: (1) stacking of packages, (2) chip stacking, (3) vertical system integration by wafer stacking or chip-to-wafer stacking. A number of current concepts, which surpass conventional multichip module (MCM) technology, are based upon stacking of fully processed and packaged devices and providing their interconnections via side-wall contacts. Since the early 90s, associated techniques have been applied, among others, by companies such as Irvine Sensors [11] in co-operation with IBM. In the European project, TRIMOD, a vertical multichip-module concept, or MCM-V, was developed by the NMRC (now Tyndall), together with Alcatel Espace and Thomson CSF (now Thales) [12]. This technology is currently industrialized by the company 3D-Plus, primarily for military, space and aeronautics applications [13]. The wafer-level 3D packaging technique uses stacking of die to a substrate wafer, embedding and interconnecting the thinned die with modified multilayer thin film wiring. The Japanese Association of Super-Advanced Electronics Technologies (ASET) researched wafer-level large-scale integration (LSI) chip stacking technologies with the goal of interconnecting more than 5 device layers by electroplated via holes (20mm diameter) [14]. In Germany, Fraunhofer, in co-operation with Infineon, developed wafer-level 3D integration based upon the adjusted bonding and vertical metallization of completely processed device substrates, without interfering with the basic IC process. The Vertical System Integration VSI® concept provides very high density vertical wiring between thinned device substrates, based upon CVD-metallized inter-chip vias (See Fig. 6.4) that are placed in arbitrary positions (1–2mm diameter) [15].


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Fig. 6.4 Inter-chip vias filled with MOCVD of TiN and Tungsten from Fraunhofer

Fig. 6.5 High Aspect Ratio (1:5) Copper Interconnections 20mm wide and 100mm tall with a pitch of 40mm from Georgia Tech

Copper-to-copper thermo-compression bonding is a commonly used technology for wafer-level stacking. The technology has been investigated by MIT [16], Georgia Tech (as shown in Fig. 6.5 [17]), and Tezzaron [18]. Corresponding patterns of copper pads are exposed on the two surfaces to be bonded and the bonding is usually performed at a temperature of 350–400°C, with an applied pressure of 0.3–0.4 MPa. The desired pad size is 4×4 mm2, and the minimum pitch is 6.08mm. The capacitance of the feed-throughs is 7 fF and the series resistance is below 0.25W. As an alternative to copper metallization, the ZyCube Company uses indiumgold (In-Au) micro-bumps. In the stacking process, wafers with buried interconnect are thinned down to 20–150 mm by chemical-mechanical-polishing, or CMP. In-Au micro bumps are formed on the surface by a lift-off technique. The bumped wafer is aligned to the substrate wafer within a custom-built aligner and temporarily bonded by the In-Au bumps. For the final bond strength, a liquid

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Fig. 6.6 Cross-sectional sketch of ZyCube’s technology

epoxy adhesive is injected into the gap between the two wafers in a vacuum chamber. The contact resistance of a bump, with an area of 10 mm2, was less than 0.1W [19]. The Zycube technology (See Fig. 6.6) was developed in collaboration with the Tohoku University, Japan, and license agreements for the technology are available. Nickel (Ni) is yet another alternative metal. CEA-LETI, together with the French smart card manufacturer AXALTO, has developed a technology named ‘microinserts’, or ‘micro-bumps’ for interconnecting smart cards (see Fig. 6.7). A set of 3mm thick, electroplated Ni pillars are used to connect aluminium (Al) pads on both wafers. Both polyimide and epoxy have been used for the bonding. The bonding temperature is either 100 or 350°C, depending upon the chosen material. A bonding pressure of 0.5 MPa was applied. To date, pad dimensions as small as 20mm square have been created and 2mm diameter ‘micro-inserts’ have been reported [20, 21].

3

Folding Flex

3D packaging has emerged as a high potential solution for advance electronics applications. It offers the potential for increased system integration density, reduced development cost and reduced interconnect length. Many innovative and exciting 3D technologies have been developed in the past decade, some of which have been described in the previous section. Chip or package stacked techniques use standard fabrication facilities, which make it very attractive to production companies. However, each chip has to be processed one-at-a-time and, currently, only peripheral connections are possible, limiting the overall vertical interconnection capability. Embedded chip packaging allows 3D formation with higher integration density; however, there are issues relating to thermal performance and high development costs.


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Fig. 6.7 The ‘Micro-insert’ processing sequence and flip chip structure

Wafer-level packaging allows highest level of vertical integration, but challenges exist in obtaining a reliable process at a relatively low cost and lower production time. Most of the stacked, embedded and wafer-level technologies can be classified as chip-based technologies. These require either uniform chip sizes, or specific process flows, depending upon the applications. However, a folded flex process, employed as a substrate-based technology, offers the potential to be applied in heterogeneous 3-D formats and can be easily adopted for many chip designs and sizes. One of the main advantages of this technology is that it allows for easy prototyping, having a lower associated development time. The prospect of adopting this technology, from the perspective of ambient electronics systems, offers a very viable and interesting option. Using flexible substrates in combination with thin silicon could, for example, result in a very thin profile package, which can be embedded in nonconformal objects. In addition, the technology can be used to develop subsystems, or a technological platform, to investigate assembly and characterization issues for different materials. In order to investigate the assembly issues and complete a material behaviour characterization, the first step is full analysis of current state-of-the-art folded flex technologies and prototype modules. A closer look (excluding the solder-balls) at the different components and materials that make up a folded flex assembly is illustrated in Fig. 6.8 [22, 23]. It shows a typical die thickness of 114 microns, a substrate thickness of 126 microns (two metal layers), a wire-bond loop height of 80 microns, and a combined thickness due to bond-pads, molding materials, and adhesives of 145 microns. It is clear that further reduction in profile could be achieved by employing different interconnection technologies, such as flip-chip, and by reducing the thickness of the die and the substrate. For example, prior to flip-chip assembly, silicon bare die can be thinned down to 50 microns (or lower); note the flexible substrate needs to be as thin as possible to get the minimum folded package profile.

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Bond line (25 um) Wire to mold top clearance (70 um)

0.8 mm

Wire loop (80um) Thin die (114 um) Elastomer (50 um) 2-metal substrate (126 um) Solder ball height (230 um or lower)

Fig. 6.8 Detail of different components in a folded chip assembly [22,23]

At Tyndall National Institute, extensive work has been carried out to further reduce the profile of a folded flex module by investigating different materials behaviour, processes and assembly sequences [24–27]. These tasks are divided in to four strands: (1) the flexible substrate, (2) a silicon thinning process, (3) a flip chip interconnect technology and (4) 3D packaging.

3.1

Flexible substrates

This section describes the appropriate investigation, development and characterization steps relevant to realizing a thin flexible substrate. The development process commenced with formation of flexible substrate layers on 4 inch test wafers, using polyimide. The thickness of the layers can be varied from 16mm down to 3mm. This was followed by an experimental sequence where, initially, a number of different release methods were tested for effectiveness in removing high integrity flexible layers and the performance of the flexible substrates derived from this sequence was evaluated through a characterization program that included electrical, chemical, moisture, and mechanical testing. A global description of the experimental and characterization sequence for this program is shown in the schematic in Fig. 6.9. [24] Two different flexible materials were analyzed; the first substrate was ‘control’ material, a commercially available 25 micron thick polyimide with 5 microns of copper metal, while the second substrate was fabricated in-house on a 4-inch wafer, varying the polyimide thickness ranging from 3 to 17 microns and depositing 4 microns of sputtered copper. A number of separation techniques, designed to release the flex from a carrier wafer, were investigated. It was concluded that the optimum solution was to use a laser ablation technique, targeting the interface between the polyimide and a quartz carrier wafer. Electrical and chemical analyses demonstrated that the in-house materials matched the characteristics of commercial polyimide. Stresses generated in the in-house thin flex increased with increasing polyimide thickness but the increase was determined to be negligible. Mechanical characterization showed that, for the in-house flex, the tensile strength and Young’s Modulus


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Fabrication of the flexible substrate

Release techniques

Chemical

Mechanical

Laser

Characterisation

Chemical

Electrical

Humidity

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Fig. 6.9 Schematic showing experimental and characterization work for flexible substrates

Fig. 6.10 A 3.9mm thick flexible substrate after release showing significant wrinkling

changed very little with varying polyimide thickness, while elongation at break decreased proportionally with decreasing thickness. It was observed that when the polyimide thickness decreased below 10 microns, the stiffness of the polyimide dropped off very dramatically and the flex wrinkled (see Fig. 6.10). The cause of this wrinkling was attributed to the stress generated by the copper sputtering process. The stiffness of the polyimide below 10 microns was not high enough to overcome the driving force due to copper in order to avoid a wrinkle-free substrate; thicker polyimide has enough stiffness to resist the wrinkling. In order to address the problem of wrinkling for thin flex, a polymer ring is placed around the circuit; this resulted in a flexible, wrinkle-free 4-micron polyimide substrate with 4 microns of copper. The work showed that as the thickness of the substrate material decreases, handling and processing issues become more pronounced. A compromise has to be reached between the advantages of reducing the thickness of flex and the disadvantages of extra processing issues due to wrinkling and the increased handling difficulties.

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The silicon thinning process

In many emerging applications, electronic products must literally be flexible. An electronic product may be folded and twisted so that it can fit into a very limited, or confined, space or it may need to be flexible in the course of its normal usage. To meet the increasingly stringent requirements set by industry, research on different aspects of flexible substrates will most likely continue to grow significantly. These will include newer methods for developing thinner substrates, as well as better dielectric materials. From a processing perspective, the thinning of silicon is becoming normal practice. Given the ever-increasing demand for miniaturisation, it is important that the processes involved in thinning (their advantages, disadvantages and limitations) are fully understood and characterised. A comprehensive review of different silicon wafer thinning techniques was undertaken, including mechanical grinding, chemical mechanical polishing (CMP), dry etching and wet etching. Silicon test wafers of different thickness (specifically, 525, 250, 100 and 50 microns, respectively) were thinned using mechanical grinding. The wafers were diced, using both specialized dicing saws and lasers, in order to study the effect of singulation. It was concluded from microscopy and the mechanical characterization that, as a result of damage done by each laser pulse used in the dicing process, that laser clear had an adverse affect on the silicon chip itself. Surface and edge microscopy showed that the back surface was very smooth, but there was evidence of chipping observed on the top edge of the thinned chips. The chipping did not have any sharp notches and it was not deep enough to cause notably adverse effects on the mechanical properties. Through a 3-point bend test, the mechanical properties were calculated. From this data, the statistical behaviour of the silicon was identified. Using average values (in this discussion), it was concluded that the load required to break the chip decreased linearly as the chip thickness is reduced. However, the low level of force required to break a thin IC means handling becomes very critical; this occurs for IC in the range of 100 microns or less. At the same time, the fracture stress increased with the reducing thickness, indicating that a thin chip can potentially handle much higher stresses during packaging and the subsequent application. The increase in flexibility indicated by the decrease in radius of curvature with falling chip thickness means that, to a certain extent, thin chips could adopt a non-planar format. Average flaw size was calculated from the fracture strength values and it was noted that flaw size was decreased with the decreasing chip thickness. This was confirmed by AFM results, where the surface roughness was seen to decrease with decreasing chip thickness [25]. Both Weibull and lognormal models were fitted to the experimental strength data. The Weibull modulus for of all the data was found to be between 3 and 5, which is characteristic of brittle materials. The effectiveness-of-fit was measured with an information complexity criterion, which showed that lognormal model provides better results when compared to the Weibull model. However, the sample size can have a crucial effect on this preference for lognormal model.


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The strain rate had no effect upon the fracture strength of the samples leading to the conclusion that there was no slow crack growth in the test samples. The strength dispersion was found to be low for thin silicon samples, which illustrates that thin silicon is more flexible and has higher fracture strength [26]. Fractured samples were macroscopically examined for different types of failure mode (See Fig. 6.11); including clean fracture due to low force and shattering due to high force. From SEM images of failed samples (See Fig. 6.12) it was concluded that the pattern of crack generation indicated that a primarily stress field, rather than crystallographic parameters, controlled the growth of cracks in the cleavage plane. Electrical parameters, like the diode forward voltage and the reverse biased current, were investigated for different chip thickness and the results showed the thinning process had no adverse effect on these parameters. From the I-V measurements,

Fig. 6.11 Optical microscopic study indicating different types of failure in (a) 525mm and (b) 50mm test dies

Fig. 6.12 A SEM micrograph of 250mm die that shattered during the three-point bend test

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Fig. 6.13 Experimental and analytically determined bow values for 50 microns wafer

a novel method to characterize the process-induced stress during thinning, based on band-gap narrowing effect, was investigated. The active surface of the wafer was found to be in tensile stress and the stress values are significantly lower than their fracture strength. The difference in stress values between wafers of different thickness were correlated with the thinning process and the growth of silicon dioxide on the back surface of the wafer. Non-linear plate-theory-based analytical calculations were done to determine bow at wafer level (See Fig. 6.13). The wafer bow as calculated was in accordance with those available for similar process in literature. So, it can be concluded that accurate I-V measurements and non-linear plate theory can be used to approximately calculate the bow in wafer [27]. The results showed that the thinning process induced very little stress on the chip.

3.3

Flip chip interconnect technology

For the flip chip technique, the interconnection between an IC and the substrate is made by flipping the active side of the chip onto that substrate. As a result, the electrical connections are made simultaneously for all contacts in one single step. Flip chip technology was initially developed for high-end applications by IBM [28, 29].There are two main requirements for flip chip assembly. First, the die, or wafer, needs to have bumps and second, a supporting medium, either an ‘underfill’, or an adhesive, is required.


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The most commonly used bumps include solders, electroless nickel-gold and gold stud bumps [30, 31]. A eutectic composition, 63Sn-37Pb, or a near eutectic composition, 60Sn-40Pb, have been the most widely used solders in microelectronics packaging. However, as a result of issues such as new environmental legislation regarding the use of lead in electronic assembly, the resultant higher reflow temperatures, issues of under-bump metallization and lower pitch requirements, there is an ongoing need for improvement. This focuses specifically on improving existing methods and on developing alternative flip-chip attachment techniques. Lead-free solders [32] are making some headway in this direction, while many other innovative approaches have been reported in the literature as well [33, 34, 35]. Currently, flip chip assemblies can be formed on flexible substrates with anisotropic conductive films and pastes; gold stud bumps can be used in the bumping process (See Fig. 6.14). The gold stud bumps are formed by bonding gold wire to the substrate with force, heat and ultrasonic energy and then snipping the wire just above the formed ball to leave a stud. This eliminates the need for special processes, such as plating, for making bumps. Process development for flip-chip on FR4 (a laminate substrate) with gold stud bumps has been reported previously by Zeberli [36]. However, information regarding the effect of the gold bump shape and planarity on the reliability of the assembly is not documented. In a recent study by Cheng [37] two types of bumps, including an electroplated gold bump and a composite of polyimide and aluminium, were investigated through finite element modeling. Cheng concluded that the bump height uniformity is a key factor in the overall performance of the contact interface. A systematic approach to characterizing the bonding process parameter was investigated. This included, for example, analysis of the curing characteristics of the adhesive and the bonding pressure. To establish the reliability of the interconnect, environmental tests (including temperature cycling and humidity tests) were carried out. Based upon failure analyses from these environmental tests, the shape of the gold bumps was observed to be a source of failure, requiring modifications to eliminate the negative impact on the performance and reliability of the interconnect.

Fig. 6.14 SEM images of ACF interconnections with varying pressure a) 1500 gm, b) 3000gm bonding force

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Fig. 6.15 (a) Original gold stud bump, (b) coined gold bump

Two types of conductive adhesives, an anisotropic conductive paste and an anisotropic conductive film, were studied. The work looked into the effects of temperature on the curing degree of the adhesives. The result showed that 95% of curing has occurred at 200°C. Pressure was the main affecter during the flip chip assembly; scanning acoustic microscopy, as well as optical and scanning electron microscopy, was used as the characterizing techniques in the pressure optimization process. In the reliability analyses, the thermal shock tests showed that thermal cycling has little impact on the reliability and the observed failures were attributed to bad adhesion of the gold bump to the silicon and delamination of gold bump from the ACF. The environmental study showed that humidity is a major concern in the reliability of gold stud bumps, flipped-chip using either anisotropic conductive paste or film. The delamination during the humidity testing starts at an edge of the gold bump, which is not in proper contact with the flex. This is because originally the gold bumps did not have a uniform topography. They are deformed during the bonding and result in different shapes depending on the pressure and conductive material properties. The current shape is like a taper edge, which allows moisture to seep through easily and this gold bump shape reduces the contact area, thus, increasing the chance of failure. It was concluded that one of the most important factors that contributed to failure is the shape of the gold bump. A modified process (See Fig. 6.15) was developed to obtain a planar, ‘coined’ gold bump, and the resulting assemblies showed no failure during the humidity testing [38].

3.4

Building a Folded Flex Module

The initial work on 3D module assembly was done using commercial flex. This helped in optimizing the flip chip parameters and resulted in a range of technological demonstrators with varying die thicknesses. The assembly process commenced


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Fig. 6.16 The different steps in folded flex assembly sequence, (top) flip-chip assembly on thin flex, (bottom-left) folding the flex and (bottom right) the final flex module

with the development of single layer flexible substrates. The substrate consisted of a polyimide dielectric layer and a copper conducting layer with a nickel-gold (Ni/Au) electroless immersion finish. Utilising an anisotropic conducting adhesive, flip chip assembly was used to make the interconnection between the gold bumps on the die and conducting tracks on the flex. In this way, four test chip die [39] were attached to the flat flexible substrate. As the temperature reached 200°C during each bonding operation, dies were electrically checked after each bonding to observe any effect on the bonded die. As discussed in the previous section, it was found that thermal cycling did not cause major reliability failures and therefore no yield issues were observed in the current experiment. To obtain the 3-D format the flex is manually folded and fixed in place with an adhesive. Fig. 6.16 shows the different stages in the development of the folded flex assembly. Once the assembly process was optimized, a set of modules was fabricated with different combinations of die and flex thickness. The initial target of a four die folded stack module with a thickness below 500 microns was achieved (See Fig. 6.17). An evaluation, including analysis of the thermomechanical and thermal performance of the modules was completed.

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Fig. 6.17 50 microns four die stack module

4

Chip-In-Laminate Interconnect

A further approach to achieving increased density and functionality is to physically embed the bare die into the printed circuit board itself. Various methods of achieving this have been investigated in recent years. Texas Instruments Inc [40] have built multi-chip modules by placing die in cavities in a laminate material and then applying an upper lid (See Fig. 6.18). Another approach is the Intel BBUL technology [41]. A die or dice is embedded in a substrate, which then has one, or more, build up layers formed on top of it by molding or dispensing of an encapsulation material. A further patented technology is also being investigated by an indigenous Irish PCB company, ShipCo [42]. In essence, die of various sizes and thickness are placed on a laminate layer, additional layers of pre-preg are then placed on top of this and the complete assembly is laminated using a standard printed circuit board fabrication process; this causes the pre-preg to flow and completely encapsulate the die before curing. Once embedded, blind vias are then laser-drilled down to pads on the surface of the die and these vias are then electroplated (see Fig. 6.19). The key advantage of this approach is that it uses standard PCB technology and can accommodate die of various thicknesses. Researchers at the Fraunhofer IZM Institute in Berlin [43, 44] are investigating approaches to embed thinned silicon chips in “build-up layers” of polymer on top of a printed circuit board, as illustrated in Fig. 6.20. This technology integrates embedded thin chips in a conventional PCB, which can then be further used in 3D packaging. An important aspect of this work is that the silicon chips are thinned to around 50 mm. Components, or die, of different height are not catered for. Ultra-thin chips are embedded in the dielectric layers of modern laminate printed circuit boards (PCBs). Micro-via technology allows connection of the embedded chip to the outer faces of the systems circuitry. Embedded device packaging research at Tyndall is focused upon the development of two multi-chip packaging technologies capable of integrating standard power die


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Solder Mask Kapton layers DIE

Laminate layers HEAT SINK I/O CONNECTOR

Fig. 6.18 Multi-chip module using the die-in-cavity process by Texas Instruments

Fig. 6.19 Embedded chip in laminate packaging concept (Shipco)

Fig. 6.20 Chip in Polymer by Fraunhofer IZM

(i.e. greater than 200 mm thick). These packaging technologies are: “Chip-in-PCB” and “Chip-in-polymer, build-up layer” (See Fig. 6.21). Both technologies replace wirebond connections with plated copper interconnect. The research includes the design and fabrication of a complete power converter, using each of the packaging approaches. These converters are to be benchmarked against the best available commercial converters. These approaches have the following advantages over conventional power packaging techniques: ●

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Enhanced reliability and improved performance through the removal of the wire-bond and solder interconnections Automated batch level processing, which can increase repeatability and reduced costs Potential for increased integration and functionality

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Fig. 6.21 Two embedded packaging technologies showing (top) the ‘Chip-in-PCB’ and (bottom) the ‘Chip-in-Build-up Layer’ approaches

embedded FET

Cu interconnect

Via to embedded diode

Fig. 6.22 (a) A section of embedded FET showing the top side interconnect and (b) an embedded diode with 500 microns via

6 Embedded Microelectronic Subsystems ● ●

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Increased power density and miniaturisation Potential to use thinned silicon and chip stacking techniques

Currently, a novel thick photoresist process has been developed, which uses a modified commercial material. Patterning of 400 mm thick layers can be achieved with a fast cure time (5 minutes). Any distortion that may result from shrinkage is also significantly reduced. Fig. 6.22 shows an embedded power diode, with the top side interconnect plated. The structure is then released from temporary substrate and tested at 1 amp.

5

The Move to Micro-Nano Interconnect

In their December 14, 2005 webcast SEMI published their well-researched forecast on “Global Nano-electronics Markets and Opportunities”, which makes clear both the major changes that nanotechnology will bring to electronics packaging and how soon those changes will be seen. SEMI reports that the 2004 worldwide market for nano-electronic materials and equipment at $1,448 million, forecasting a 20% compounded growth rate to $4,219 million by 2010. On December 5, 2005, Fujitsu announced they have demonstrated that carbon nano-tubes can be grown as heatsinks on semiconductor wafers. The higher thermal conductivity of nano-tubes permits power RF die to be flip-chip-mounted; this was previously impossible because solder bumps could not dissipate the heat effectively. Flip-chip eliminates wirebond inductance, enabling higher frequency operation. Thus the combination of nano-tubes and flip-chip makes feasible higher power, higher frequency RF amplifiers. Fujitsu expects to have these nano-tube heat-sink power amplifiers available for mobile phone base stations before 2010. Fujitsu is only one of many major electronics packaging innovators. Earlier in 2005, Hewlett-Packard announced laboratory versions of nano-scale crossbar switches, a possible alternative to conventional logic. SUSS MicroTec is offering nano-imprint lithography systems. Samsung has begun a joint initiative with the Korea Advanced Institute of Science to fabricate memory chips thinner than 50 nm. In 2004, Toshiba announced that addition of nano-particles to conductive silver epoxy provided a die-mount adhesive with better properties than solder or conventional silver-flake materials. These product development initiatives each directly affect packaging. Future products like nano-tube field effect displays and organic semiconductors will no doubt bring their own packaging challenges. The compelling benefits of nanotechnology, such as higher thermal and electrical conductivity, greater mechanical strength, lower melting points, self-linking metal conductors and altered adhesive properties, make its early and ongoing use in microelectronics packaging inevitable. The challenge to increase the density of electronic products, for example, by using integral substrates and advanced interconnect, are prime drivers in all of the technologies described earlier in this chapter. Multiple performance parameters

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need to be addressed, including light-weight and compact form factors, as well as increasing reliability and multi-functionality. New nano-scale materials and technologies will be central to consistently achieving these new targets. For high-density interconnection approaches, such as nanoscale surface activated interconnect and nano-wire/carbon-tube bumps, may be applied to dramatically increase the density of interconnection. For integral substrates, built-in passive components (i.e. resistors, capacitors, inductors and filters) with nano-materials can remarkably increase the density of such a substrate. Therefore, nano-materials, applied through electronic packaging technologies, can provide solutions to satisfying the need for innovation. These solutions will support the information, communication and consumer electronics industries by enabling manufacturers to develop lighter, more compact, more integrated, and ultimately more competitive products.

6

Conclusions

Ambient Intelligence (AmI) systems are those that will use electronics with learning capability to proactively and seamlessly support and enhance our everyday lives. In this regard, AmI is an extremely user-focused research topic. From a technical point of view, creating an AmI environment means integrating and networking numerous distributed devices that exist in the physical world (i.e. workspaces, hospitals, homes, vehicles, and the environment). One framework for this is the concept of Augmented Materials, outlined in Chapter 2. These are materials with fully embedded distributed information systems, designed to measure all relevant physical properties and provide a full ‘knowledge’ representation of the material. As a concept, it captures what is possible from microelectronics, microsystems, packaging technology and materials science to encourage a roadmap where progress is made through convergence. This progress will open entirely new possibilities for future applications and the resulting markets. Areas like medical monitoring and telemedicine, sports, and entertainment are currently beginning to benefit from research that is developing and using building blocks for these systems. However, the process is highly complex and involves numerous challenges that may only be solved through highly multidisciplinary methods. This chapter has reviewed 3D Packaging techniques, which may provide a step in the right direction for augmented materials, particularly in conjunction with embedded wireless systems; a technology that many have forecast as crucial in the development of a knowledge society. There is no doubt that augments materials systems can provide key technology enablers for future AmI systems, however, the timeline for this is currently unclear. This is most likely due to the lack of a clear ‘need’ for this in a real world domain; an application where the vision on augmented materials and AmI meets the real-world, perhaps in at point of ‘extreme’ use, where current technologies cannot function.


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There is increasing acceptance of wireless sensor networks in society and, while there remains much to do, they are beginning provide evidence that they will approach the appropriate levels of complexity and reliability. It is in this area where the ‘need’ and thus, the drivers for the highly miniaturised electronics building blocks that will compose augmented materials, will most likely emerge. There are huge numbers of applications world wide requiring wireless sensors, in formats that can be built right now (not necessarily requiring significant levels of high-density integration), and there are millions of dollars to be made implementing these solutions in smart buildings, healthcare and environmental monitoring. Some of the leading innovators and academics in high density systems have left academic research to form companies [45, 46] in these domains. This provides a scenario where, perhaps, the first version of augmented materials will in fact emerge as current and future generation wireless sensor networks begin to merge with the everyday objects in the above target application domains. This could commence as a type of electronics packaging problem; merging the material in the object with the packaging material in manner that increases scope for functionality. However, the work being performed in nano-scale technologies should not be ignored; as discussed in this chapter, significant efforts are being made to improve existing materials performance in electronics packaging, as well as materials in many other manufacturing domains. The initial instances of the augmentation of materials will most likely be driven by high density packaging. However, perhaps the ultimate, or optimum, realization of augment materials will come once these high density solutions themselves become infused with nano-scale technologies. This will be realised through the emergence of nanoscale electromechanical systems (NEMS), from research like that of Prof. Alex Zettl’s group [47] in the Department of Physics at U.C. Berkeley; the group has reported on the fabrication of nano-motors powered by nano-crystals [48] and even constructed a fully functional, fully integrated radio receivers from a single carbon nano-tube [49].

References 1. R. Tummala et al, “Microelectronics Packaging Handbook: Semiconductor Packaging”, Chapman & Hall, January 1997 2. http://www.itrs.net/Links/2007ITRS/ExecSum2007.pdf 3. S.L. Burkett et al, “Advanced Processing Techniques for Through-Wafer Interconnects,” Journal of Vacuum Science Technology B, Vol. 22, no. 1,pp 248–256, (Jan. 2004) 4. M. Sunohara et al, “Development of Wafer Thinning and Double Sided Bumping Technologies for Three Dimensional Stacked LSI”, In Proc. 52nd Electronic Components and Technology Conference, (May 28 31 May 2002), San Diego, California USA, pp. 238–245 5. R. Nagarajan, et al, “Development of a Novel Deep Silicon Tapered Via Etch Process for ThroughSilicon Interconnection in 3D Integrated Systems”, In Proc. 56th Electronic Components and Technology Conference, (May 30 -June 2, 2006), San Diego, California, USA, pp 383–387 6. M. Bonkohara et al., “Trends and Opportunities of System-in-a-Package and Three-dimensional Integration”, Electronics and Communications in Japan (Part II: Electronics), Vol. 88, Issue 10, pp 37–49 (20 Sep 2005)

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7. M. Kada, “The Dawn of 3D Packaging as System-in-Package (SIP)”’ IEICE Transactions on Electronics, Special Issue on Integrated Systems with New Concepts, Vol. E84-C, No.12, Japan, pp1763–1770, (2003) 8. M. Karnezos et al, “System in a Package (SiP) Benefits and Technical Issues,” Proceedings of APEX, San Diego, (January 16–18, 2002), pp S15-1, 1 to 6 9. T. Kenji et al, “Current Status of Research and Development of Three Dimensional Chip Stack Technology”, Japanese Journal Of Applied Physics; Vol. 40, 2001, pp 3032–3037 10. ENIAC Strategic Research Agenda http://cordis.europa.eu/ist/eniac 11. http://www.irvine-sensors.com/chip_stack.html 12. C. Cahill et al, “Thermal Characterisation of Vertical Multichip Modules MCM-V”, IEEE Transactions on Components, Hybrids and Manufacturing Technology, Vol 18 No. 4, December 1995, pp 765–772 13. http://www.3d-plus.com/ 14. http://www.aset.or.jp/index-e.html 15. P. Ramm, et al, Japanese Journal of Applied Physics Vol. 43, No. 7A (2004), p. 829–830 16. K.N. Chen et al. “Morphology and bond strength of copper wafer bonding”, Electrochemical and Solid-State Letters 7, pp. G14–G16, 2004 17. R. R. Tummala et al, “Copper Interconnections for High Performance and Fine Pitch FlipChip Digital Applications and Ultraminiaturized RF Module Applications”, Proc 56th ECTC 2006 pp 102–111 18. http://www.tezzaron.com 19. http://www.zy-cube.com/e/index.html 20. N. Sillon et al, “Innovative Flip Chip Solution for System-On-Wafer Concept”, In Proc. First International Workshop on 3S (SOP, SIP, SOC) Electronic Technologies, (September 22–23, 2005), Atlanta, Georgia, USA 21. A. Mathewson et al, “Detailed Characterisation of Ni Microinsert Technology For Flip Chip Die on Wafer Attachment”, Proc 57th ECTC 2007 pp 616–621 22. Tessera’s Unique Approach to Stacked IC’s Packaging; Tessera Inc, http:// www.tessera. com/images/news_events/Stacked_packaging_backgrounder_05-25-01.pdf 23. Y J. Kim, “Folded Stack Package Development,” In Proc. 52nd Electronic Components and Technology Conference, (May 28 31 May 2002), San Diego, California USA, pp 1341–1346 24. B. Majeed et al, “Fabrication And Characterisation Of Flexible Substrates For Use In The Development Of Miniaturised Wireless Sensor Network Modules”, Journal of Electronic Packaging, Volume 128, Issue 3, pp. 236–245, September 2006 25. B. Majeed et al, “Microstructural, Mechanical, Fractural and Electrical Characterisation of Thinned and Singulated Silicon Test Die”, J. Micromech. Microeng. Volume 16, Number 8, August 2006 pp. 1519–1529 26. I. Paul et al, “Statistical Fracture Modelling of Silicon with Varying Thickness”, Acta Materialia, Volume 54, Issue 15, Pages 3991–4000 (September 2006) 27. I. Paul et al, “Characterizing Stress in Ultra-Thin Silicon Wafers”, Applied Physics Letters 89, 073506 (2006) 28. E. M. Davis et al, “Solid logic technology: versatile high volume microelectronics”, IBM J. Res. Dev., vol. 8, pp.102, 1964. 29. L.F. Miller, “Controlled Collapse Reflow Chip Joining”, IBM Journal Research & Development, Vol. 13, pp 239–250, (1969) 30. S. Baba, “Low cost flip chip technology for organic substrates”, Fujitsu Sci. Tech. J. vol. 34, no.1, pp 78–86 September 1998. 31. R. Aschenbrenner et al, “Adhesive flip chip bonding of flexible substrates,” in Proc. 1st IEEE Int. Symp. Polym. Electron. Packag., 26–30 Oct 1997 pp: 86–94. 32. M. Abtewa et al, “Lead-free solders in microelectronics”, Mat. Sci. Eng., vol. 27, pp 95–141, 2000.


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Part IV

Networking Technologies Wireless Networking and Wireless Sensor Networks

1.1

Summary

From a technology perspective wireless systems are essential in handling the requirements of mobility in everyday life. Networking, whether wired or wireless, is now one of the key building block approaches in IT systems, its value growing with scale, as evidenced through examples such as the internet. Some of the strongest drivers towards Ambient Intelligence are being provided by technologies that combine wireless performance with networking. Thus, it is no coincidence the one of the most vibrant areas of research at the moment is Wireless Sensor Networking (WSN). In this area of research, networking is not simply a technological component in a system, it also extends to the approaches taken by the researchers in achieving real innovation; most of the effective projects on sensor network design and implementation are highly collaborative in nature. In fact, as will be addressed later in this book, in some ways how the research programmes are constructed (as collaborative processes) can be as important as the innovation target itself. This section deals with network technologies and provides, in one chapter, an overview of the principles of computer networking, including a review of communication protocols for embedded wireless networks. It also summarises wireless communication system standards and discusses low power proprietary radio technology for embedded wireless networks.

1.2


The interplay between wireless networking and microsystems is effectively a technological frontline in the development of systems solutions for Ambient Intelligence. It is framed by applications, existing and new, and thus by user requirements and the application software. Microsystems will be used to provide the sensor interfaces between the network (from simple node-level to internet-level) and the user. They will also be used to improve the wired and wireless infrastructure and the performance of the network itself, including communications, power and reliability.

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There are a large number of publications in the area of wireless communications and networking. The following references provide a more detailed insight into these topics: 1. I.F. Akyildiz, S. Weilian, Y. Sankarasubramaniam, E. Cayirci, “A survey on sensor networks”, IEEE Communications Magazine, Aug 2002, Volume: 40, Issue: 8, pp 102–114 2. K. Akkaya, M. Younis, “A survey on routing protocols for wireless sensor networks”, Elsevier Ah-hoc Networks Journals, 3 (2005) 325–349 3. H. Karl, A. Willig, “Protocols and Architectures for Wireless Sensor Networks”, John Wiley & Sons, 2007, ISBN 0470519231 4. C. de Morais Cordeiro, D. P. Agrawal, “Ad Hoc and Sensor Networks: Theory and Applications”, World Scientific Publishing, 2006, ISBN 9812566813 5. K. Sohraby, D. Minoli, T. Znati, “Wireless Sensor Networks: Technology, Protocols, and Applications”, Wiley Blackwell, 2007, ISBN 0471743003

Chapter 7

Embedded Wireless Networking: Principles, Protocols, and Standards Dirk Pesch1, Susan Rea1, and Andreas Timm-Giel2

Abstract All aspects of society are networked today ranging from people to objects. Our daily lifes rely heavily on the ability to communicate with each other but also the many systems that enable us to conduct our life require networked systems, that is networked embedded systems. 90% of all microprocessors are used in embedded systems applications from our cars to home appliances, entertainment devices, to security and safety systems. Increasingly, embedded systems communicate wirelessly using a range of technologies, from wireless sensor networks, to wireless local area networks, to wireless and mobile ad-hoc networks to mobile cellular networks. The vision of the future is to network as many of the embedded systems as possible to create a wide range of smart applications. Embedding computing technology into materials and objects and networking those computers will create the vision of augmented materials and smart objects. This chapter briefly presents the principles of computer networking and presents a state of the art of communication protocols for embedded wireless networks. It then presents an overview of the main wireless communication system standards and selected low powerr proprietary radio technology available to create embedded wireless networks. The chapter concludes with a brief discussion of open issues in wireless communications and networking for augmented materials and smart objects.

Keywords Embedded networks, wireless networks, MAC protocols, routing protocols, IEEE802.11, IEEE802.15.1, Bluetooth, IEEE8021.5.4, ZigBee, mobile networks, layered communication

1 2

Centre for Adaptive Wireless Systems, Cork Institute of Technology, Cork, Ireland TZI/iKOM/ComNets, University of Bremen, Germany


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Introduction

This chapter presents a review of basic networking concepts, a summary of the main standards and some selected proprietary wireless communication networking technologies relevant for embedded networking. Communication between embedded computing nodes is based upon communication protocols that enable reliable, physical communication across a network of embedded nodes. The application and style of embedding of nodes often determines how networks are formed and how they are best operated. Embedded computing nodes are usually installed in places where they have to operate autonomously due to the fact that they are inaccessible, or where maintenance costs are expensive, or even prohibitive, due to the number of devices, access, etc. Also, embedded computing devices are typically small with limited energy supply, for instance using batteries or having limited energy harvesting capability; their function is typically tailored for a specific application. This situation demands that the devices are self-configuring and operate in an adaptive fashion in order to change their behaviour based upon the environment, their energy supply, or the general context the system operates in. A node does not only need to adapt its own function, but needs also to cooperate with other devices in the embedded network to achieve a network-wide function, which is central to the operation of an augmented object, material or larger smart enviornment. A range of embedded computing platforms are available commercially, or have been developed through research projects in academia or industry. Those computing nodes are typically called motes. For reference, an overview of the design, architecture, and functionality of motes was presented in Chapter 5.

2

Networking Principles and Protocols

The design and operation of computer networks is typically based on a layered protocol stack approach. The protocol stack implements a particular protocol, or protocols, in each layer, which communicate with peer systems by using the functionality of underlying layers. An underlying layer exports interfaces to the layer above; these are used to access the lower layer’s functionality for data transfer. The functionality of the underlying layer is hidden from the layer above – similar to the object-oriented programming concept – and by doing so, an underlying layer can change its protocol without affecting higher layers. A number of layered models exist, of which the ISO/OSI 7 layer model [1] and the 5 layer TCP/IP model [1] are the most prominent. Fig. 7.1 depicts the concept of the layered model and the fundamentals of message transfer between two computer systems. The layered protocol stack not only facilitates communication between two systems but also across a network. A computer network is formed by a number of computer nodes sharing a common communication facility at the lowest layer, the physical layer. This facility provides a communication channel, such as a cable,

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radio channel, or some other physical medium that is able to carry information encoded into electrical, optical or acoustic signals. The way the communication facility is shared influences the topology of the network. A number of typical topologies include star, bus, tree, ring, mesh, and hybrid topology. The network topology may be flat or hierarchical. Some networks, in particular those that are formed in ad-hoc fashion, may also form irregular topologies based on the geographical location of the computer nodes. The layers (in this layered communication network view) that are most relevant to embedded wireless networks are the physical layer, the medium access control layer, the nework layer and, in particular, routing protocols in the network, transport and application layers. The physical layer deals with all of the physical specifications of the devices; that is how nodes interface with the physical medium and how data is transmitted as electrical or other signals. The medium access control layer determines how access and sharing of a communication channel is governed. The network layer takes care of routing and message transport, the transport layer provides end-to-end connectivity across the whole network and the application layer provides a service interface between the users and the network. In the following sections, the basic operation of each layer and an overview of aspects of key protocols for the physical, medium access control, network and transport layer are presented with references to the literature in the field.

2.1

The Physical Layer

The physical layer provides the connectivity to the physical transmission medium, through either specialist connectors or appropriate antennae. While providing physical connectivity to the medium, it also embedds the desired information bits into signals;

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that is, electrical, optical, acustic, or other methods, using modulation schemes. In order to condition, transmit and receive the signals the layer also provides amplification, reception and detection circuitry [2]. As embedded systems are used to exchange digital information, most modulation schemes in use in embedded networks are digital modulation schemes. The main schemes, and some of their variations, are Frequency shift keying (FSK), Phase Shift Keying (PSK), or a combination of Phase and Amplitude Shift Keying (ASK), which is called Quadrature Amplitude Modulation (QAM) [2, 3]. Due to size and power constraints, the physical layer of embedded networks is often quite simple and rarely uses advanced signalling and control techniques, such as amplifier linearisation, MIMO signalling, beamforming and adaptive antennae, or other techniques [3]. Occasionally, forward error protection schemes [2, 4] are used to protect the information transmission, in particular if real-time information needs to be transmitted, such as video signals. However, typically error control is facilitated by the medium access control layer through error detection and packet retransmission schemes, called Automatic Repeat ReQuest (ARQ). Fig. 7.2 shows the elements of the physical data transmission chain for a digital communication link.

2.2

Medium Access Control

Medium access is the management or control process within a networked computer node that determines how multiple computers may access or share a common communication channel [1]. This communication channel may be a copper or other metal wire, it may be a fibre optic cable, or it may be wireless – a radio channel. While the focus of this chapter is mainly concerned with networking in wireless channels, most of the concepts presented in this section are also valid for wireline channels. Medium access control (MAC) protocols for wireless networks can be largely grouped into two categories, that is scheduling based and contention based medium access control protocols. Source (R1)

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Scheduling based medium access control (MACs)

Scheduling based MACs require a central controller or coordinator to coordinate the transmission of each node in the network (or part of the network) by requesting that each node transmit at a particular time. The scheduling of transmission by the central controller can be done in a round robin fashion or in some other way. Nodes do not have to transmit or receive outside the scheduled time interval, which reduces battery power consumption in wireless networks, as nodes can sleep between transmission/recption periods. Scheduling based medium access control in embedded networks is typically based on a polling mechnism, such as used in the Point Coordination Function (PCF) of the IEEE802.11 (WLAN) MAC [5] or based upon the Time Division Multiple Access (TDMA) [2, 4] method, also used in many cellular data networks, to provide access to a common communication channel. Here, users have access to the channel on a time slice basis. Each node has access to the channel for a period of time, which is determined by the central or coordinating entity called a time slot. N time slots are typically grouped into a time frame, which is repeated over time, providing a reserved time slot i, i = 1 . . . N for each node to use the channel without interference from other nodes. Transmission of data in a time slot starts usually with a preamble that contains synchronisation, address, and possibly error control information. Synchronisation is one of the critical issues in TDMA, as time slots can interfere during transmission by different nodes when synchronisation is lost. Therefore, a controlling entity, a coordinator, needs to reserve time slots for nodes and transmit synchronisation information frequently. Another technique, Frequency Division Multiple Access (FDMA) is the oldest and simplest technique to share a common radio spectrum, in which individual carriers are created and accessed by each node individually, through a controlling entity. Another medium access technique that is used in embedded networks is Code Division Multiple Access (CDMA), which is a technique based on spread spectrum communications [2, 4]. In spread spectrum communications the transmission bandwidth used is much larger than the bandwidth required to transmit the information signal. A spread spectrum system exhibits the following chracteristics: ●

●

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the spread spectrum signal utilises a much larger bandwidth than necessary to transmit the information signal Spectrum spreading is achieved by applying a spreading signal or so-called spreading code, which is independent of the information signal. Despreading at the receiver is accomplished by correlating the received spread spectrum signal with a synchronised replica of the spreading code used at the transmitter.

In CDMA, many nodes transmit in the same channel at the same time. The separation of a nodes’ transmission from others is achieved by applying a different spreading code to each users information signal [2]. In CDMA, a particular spreading code represents a channel in which the information is transmitted. CDMA also

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requires a controlling entity, a network coordinator, as in the case of TDMA and FDMA, which assigns spreading codes to nodes in the network. Scheduling based schemes have the advantage that they are very energy efficient as transmission cylces can be optimised for each node’s application and they do not cause collisions when multiple nodes attempt to transmit data at the same time. However, scheduling based schemes require strict time synchronisation between nodes, often coordinated by a central node. This creates inflexibility for losely coupled networks and where node mobility occurs. Also, they do not scale well as they do not adapt to changing node density and do not cater for the peer-to-peer communication often desired in embedded networks.

2.2.2

Contention based medium access control (MACs)

Contention based medium access control [6] uses an on-demand contention mechanism. Whenever a node wishes to transmit information, its access to the medium must adhere to the rules of the particular contention based access scheme. During times when no data needs to be transmitted, the node does not use communication resources. Such dynamic access to communication channels is driven by the randomness of data generation at source and therefore these schemes are also often referred to as random access protocols. Many contention based medium access control protocols have been developed for both wireline and wireless networks. The best known families of contention based medium access control protocols are the ALOHA protocol family and the Carrier Sense Multiple Access (CSMA) protocol family [6, 7]. The CSMA protocol family is best known as the basis of medium access control in local area computer networks, in particular Ethernet [7]. Both protocols, as well as their derivatives, can be found in many real-world wireless and mobile systems. Around 1970 the University of Hawaii developed a radio based communication system called the ALOHA system, which included a very simple random access protocol - the ALOHA protocol - to control the access to the single radio channel. The protocol is based on the following modes of operation: Transmission Mode – users transmit data packets at any time they desire. Listening mode – after a data packet transmission, a station listens to an acknowledgment from the receiver. As there is no coordination among individual stations, different data packet transmissions will occasionally overlap in time causing reception errors. This overlap of data packets is called Collision. In such cases, errors are detected and stations receive a negative acknowlegdement. Retransmission mode – when a negative acknowledgement is received, data packets are retransmitted. In order to avoid consecutive collisions, stations retransmit after a random time delay. Timeout mode – if neither a positive or a negative acknowledgement is received within a specified timeout period, a station will retransmit the data packet. While the operation of the ALOHA protocol is very simple, throughput is poor due to the limited coordination. Stations also need to listen all of the time in order to make sure they capture a data transmission, which in embedded wireless networks


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leads to significant power inefficiencies. A simplified estimation of the ALOHA protocol’s throughput [4] leads to S = Ge−2G, where S is the throughput and G the offered load, with a maximum throughput of S = 0.18. In order to improve channel utilisation, an element of synchronisation in the form of a time slot mechanism can be introduced. Slotted ALOHA operates on a slotted communication channel similar to a TDMA based MAC. The time slot duration is best chosen to be close to the packet transmission time. Medium access is synchronous to the start of a slot, which leads to a significant improvement in throughput and power efficiency, with maximum throughput twice as much as in the pure ALOHA case: S = Ge−G and Smax = 0.36. The main reason for the low ALOHA protocol throughput is that stations do not observe the other station’s data transmissions. One way to improve the throughput of random access protocols is by sensing whether another station is transmitting in the common channel. Protocols that sense channel availability before transmission are commonly known as Carrier Sense Multiple Access (CSMA) protocols. In CSMA, a station senses whether a channel is available before attempting to transmit. When a channel is sensed as being idle, there are several variations of the protocol that determine what to do next. The following three protocol variants are the most common: ●

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Non-persistent CSMA: if the channel is sensed idle, start transmitting, otherwise wait a random time and start sensing again for an idle channel 1-Persistent CSMA: if the channel is sensed idle, start transmitting immediately, otherwise wait until it is idle and then start transmitting immediately. p-Persistent CSMA: this strategy requires that the channel is divided into time slots in the same way as in slotted ALOHA. If the channel is sensed idle, start sending with probability p, or wait until the next time slot with probability (1 − p). Repeat this until the data packet has been successfully transmitted or another terminal has started sending. In the latter case wait a random time and start sensing again.

Carrier sensing is able to improve on the throughput of the ALOHA type protocols and can reach a throughput close to 100%. However, one of the problems with carrier sense protocols that occurs in wireless environments, is the hidden terminal problem [8]. This problem occurs when a station cannot sense the transmission of another station due to the distance between the two, but a station in between these two, which is the recipient of both transmissions, is able to receive both. Protocol variants of CSMA, such as CSMA with Collision Detection (CD) are used in the well known local area network standard Ethernet (IEEE802.3 standard) and CSMA with collision avoidance (CA) is used in the IEEE802.11 Wireless LAN and the IEEE802.15.4 LP-WPAN standard. CSMA/CA is a protocol variant that has features to overcome the hidden terminal problem. Traditional MAC protocols look towards balancing throughput, delay and fairness but MAC protocols for embedded wireless networks, while also addressing these concerns must also satisfy energy efficiency. The commonality among energy efficient MAC protocols is duty cycling, where the radio is switched to a low power sleep mode when possible to save on power consumption.

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Duty cycled based MAC protocols are categorised as synchronised, asynchronous and hybrid techniques. The motivation of duty cycling is to reduce idle listening, as this needlessly consumes energy. Synchronised protocols, such as S-MAC [9] and T-MAC [10] are based on loose synchronisation, where sleep schedules are specified within a frame so that idle listening is reduced. T-MAC improves on SMAC by reducing the awake period if the channel is idle. Unlike S-MAC, where nodes stay awake for the complete awake time frame, in T-MAC nodes listen to the channel for a short time after synchronisation; if the channel remains idle during this short listening period then the node reverts to sleep mode. Asynchronous protocols, such as B-MAC[11], WiseMAC[12] and X-MAC[13], rely on low power listening and preamble sampling for implementing asynchronous sleep scheduling. Preamble sampling negates the need for explicit synchronisation. The sending node transmits a preamble that at a minimum matches the duration of the sleep period of the intended receiver node. Consequently, when the receivers switches from sleep mode to awake mode it listens to the channel and detects the preamble and will remain awake to receive the data. B-MAC has been developed at the University of California at Berkeley and is a CSMA-based protocol that relies on low power listening and an extended preamble for energy efficiency. The sending node transmits a preamble that extends slightly beyond the sleep period of the receiver so that the sender is confidient that the receiver will be in awake mode at some point during the preamble to detect it. With WiseMAC, intended for infrastructure sensor networks, in addition to preamble sampling the sending node learns the schedule of the receiver’s awake period and schedules its transmission so that extended preamble duration is reduced. Receiver nodes, when acknowledging data frames, place the time of its next awake period in the acknowledgement frame. This enables a wishful transmitter to begin the preamble just before the receiver awakes and so reduces energy consumption. While low power listening is energy efficient, the long preamble duration has overhearing problems associated with it, where all non-target receviers must wait for the complete preamble duration to determine if they are the target of the ensuing data transmission. As recevier nodes must wait for the preamble to terminate before receiving data, over multihop paths the per-hop latency accumulates and can become large. To further reduce energy consumption and lessen per-hop latencies, the XMAC protocol was developed and relies on a short preamble where address information of the intended receiver is contained within the preamble. This allows non-intended receivers to return to sleep mode to resolve overhearing problems. In addition, a strobed preamble is used so that the receiver node can interrupt the preamble once it has identified itself as the intended target. This further reduces energy consumption and reduces latency.

2.3

Network Layer and Routing Protocols

The network layer in all communication networks is responsible for establishing communication channels across a network of nodes. In order to do this, switching


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and routing are at the core of the layer. In embedded networks, data is typically transmitted in packet form; that is, small chunks of data are grouped together and labeled with the address of the source and destination node, as well as some control information that provides the nodes along the route from source to destination with additional information to route the data; for example, routing information, data priority, congestion information, etc. Routing is a key feature of the network layer in embedded wireless networks as it facilitates network formation and data delivery. A wide range of routing protocols have been developed for embedded wireless networks. Early designs were based upon routing protocols used in fixed networks, such as the Internet [14], but more recently proposed protocols are more suited to the needs of embedded networks. In particular, routing protocols have been developed that are able to adapt to the network and environmental context, in particular battery power, the changing network topology – which may occur due to node mobility and failure - and network congestion. Routing protocols for several types of embedded networks have been developed. The main categories of embedded networks that are relevant to augmented materials and smart objects/environments are mobile ad-hoc networks (MANETs) and wireless sensor/actuator networks (WSN). Both types of networks are ad-hoc in nature; that is, they are networks that do not necessarily have any fixed, wired infrastructure and central configuration capability apart from a single or few gateways into a fixed network, typically the Internet. Many routing protocols for wireless sensor/actuator networks are also based on MANET protocols.

2.3.1

MANET Routing Protocols

A range of routing protocols for MANETs have been proposed during the last decade, which can be grouped into two main classes: proactive and reactive protocols. Proactive routing protocols discover routes and set up routing tables whether data needs to be transmitted or not. Reactive protocols only start searching for a route, if none is known, when the devices have data packets to transmit. Proactive routing protocols have the advantage of lower initial delay, as the route is already known. They usually perform better, if there is low mobility in the network. However, if there is high mobility, the update rate for routing tables has to be increased - leading to increased overhead and battery power consumption or stale or broken routes. Reactive protocols have lower overhead and better performance in applications with high mobility - for example, in embedded vehicular communication networks - and few communicating peers [15], [16], [17]. However, at the start of a data transmission there is a potentially large initial delay caused by the route discovery. In addition to proactive and reactive protocols, hybrid protocols have been proposed in the literature, which attempt to combine the benefits of both approaches, typically using a network cluster topology with a proactive approach at the cluster level and a reactive approach at the global network level. Other routing approaches proposed for MANETs consider the geographical node location in order to better adapt to node mobility [18], [19].

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Pro-active routing protocols, also referred to as table-driven protocols, establish the routing tables independent of the need to communicate. The protocols maintain a routing table also in dynamic environments by looking for new routes and detecting link failures. This can either be done by periodic updates or be event-driven. The best known proactive routing protocols are the DSDV (Destination-Sequence Distance-Vector) protocol and the OLSR (Optimized Link State Routing) protocol. DSDV was the earliest routing protocol for mobile computing applications, proposed by Charles Perkins in 1994 [20]. It is based on traditional distance vector protocols used in fixed networks, such as the Internet, where routing tables are kept at each node, containing a number of possible routes, via the node’s neighbours, and their associated costs to reach a destination. The routing algorithm selects for each packet the neighbour with minimal costs, typically expressed in terms of the number of hops towards the packet’s destination, and then forwards the packet to it. It is well known, that Distance Vector routing schemes can form loops caused by stale or broken routes due to the distributed nature of the routing algorithms, which is aggravated by mobility in MANETs. DSDV was designed to avoid loops by adding a sequence number originated by the destination to each routing table entry and using this to identify the age of a routing entry when periodically exchanging route information with neighboring nodes. OLSR is the second, important proactive routing protocol used in mobile ad-hoc networks. OLSR optimises Link State Routing, known from fixed networks, limiting the flooding by introducing a Multipoint Relay. OLSR is documented in RFC (Request For Comments) 3262 [21]. Further improvements have been recently proposed as an Internet Draft OLSR – v2 [22]. In contrast to distance vector protocols, where nodes exchange their routing tables, in link state routing the topology is exchanged between the nodes of the network. Knowing the network topology, each node can calculate the best route itself. Unlike proactive protocols, reactive routing protocols discover a route between source and destination only if data need to be transmitted. The main reactive routing protocols are Dynamic Source Routing (DSR), Ad-hoc On-demand Distance Vector (AODV) and Dynamic MANET On-demand (DYMO) Routing Protocol. All three protocols establish routes between source and destination through a route discovery mechanism, broadcasting route request messages containing the destination address to all neighbor nodes. Each node receiving a route request forwards this to its neighbor nodes until it reaches the destination, which then replies to the source. In DSR [23] and [17] a node receiving a route request checks if it has a route in its routing tables, otherwise it broadcasts a route request, attaching its own address to neighbor nodes. While the route request traverses along network paths, each intermediate node adds its own address to the message header thus recording the nodes traversed along the path. If an intermediate node has a route entry to the destination, or if the node is the destination itself, it does not forward the packet, but returns a route reply along the path given in the message header. If a route breaks, a route error message is sent back to the source. All packets transmitted from source to destination have the complete routing information in the packet header. The overhead is significant if small packets are transmitted along long


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routes. By listening to the communication channel, nodes can also learn routes to different destinations. AODV, introduced by Perkins et al. in 1997 [24] and specified in RFC 3561 [25], reduces this problem of large packet headers by maintaining routing table entries along the route. The route discovery is similar to DSR, flooding the network with route requests, when a route to the destination is not known. These route requests contain a sequence number and are forwarded by intermediate nodes, if they do not have a routing table entry for the destination themselves. However, instead of attaching the route information and their own node ID to the route request like in DSR, intermediate nodes keep an entry of the sender of the last route request in their routing table, along with the source ID and the sequence number. If the route request reaches the destination, or a node having a routing table entry to the destination, a route reply is returned. Each intermediate node knows from its routing table entry to where to return the route reply messages. As intermediate nodes maintain routing tables, packets can be forwarded hop by hop, without the need of any routing information in the packet header. In both DSR and AODV, routes not utilised for some time expire and are removed from the routing tables, reducing the probability of stale or broken routing table entries. The DYMO [26] protocol is a recent development, combining the benefits of both DSR and AODV. In the route requests, information of the intermediate nodes can be attached. Routing tables are created with the route reply messages allowing the sending of data without route information in the packet headers thus reducing the overhead. DYMO additionally supports multiple physical layer interfaces; that is, route requests can be forwarded from one ad hoc network via a node with several interfaces to another ad hoc network.

2.3.2

Sensor Network Routing Protocols

The second class of embedded wireless networks are wireless sensor/actuator networks, which serve a very large application space within smart objects and augmented materials systems, as they provide the embedded infrastructure for interfacing with the physical world. Based on the specifc application of an embedded network, the following classification can be used to group routing protocols for wireless sensor/actuator networks [27] – Hierarchical Routing, Data-centric Routing, location-aware Routing, Quality-of-Service-aware Routing, Maintenanceaware Routing, Cross-layer Routing Protocols. Hierarchical routing protocols are used in embedded networks to deal with the scale of many such networks; the network is divided into clusters with cluster heads that control the cluster subset of the network and provide a backbone for routing. The protocols are similar to the hybrid MANET routing protocols mentioned above, where clusters are formed to segment the network into smaller parts. Nodes route data via their cluster heads, which often carry out data aggregation and reduction for energy saving, while routing data towards the sink. In many implementations, cluster heads are often devices of greater complexity with more

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battery power than sensor devices and may even be line powered. These routing protocols are often not optimal, but they are simple, with some control message overhead during cluster formation. On the other hand, hierarchical protocols tend to consume energy uniformly throughout the network and usually guarantee low latency, since their proactive behaviour in building clusters provides the protocol with topological information. Examples of hierarchical routing protocols are Low Energy Adaptive Clustering Hierarchy (LEACH) [28], Power Efficient Gathering in Sensor Information Systems (PEGASIS) [29], and Threshold sensitive Energy Efficient sensor Networks (TEEN) [30]. Data centric networking puts the focus of routing on the sensor data that embedded devices gather, rather than in the node identity (as opposed to other types of networking, where the identity – address – of the node is the distinguishing aspect for routing). The resource constrained nature of embedded wireless network nodes in terms of processing power, communication bandwidth, data storage capacity and energy gives rise to new challenges in information processing and data management in such networks. In many embedded applications, the application may frequently query information in the network, which requires consideration of a trade-off between updates and queries. In-network data processing techniques, from simple reporting to more complicated collective communications, such as data aggregation, broadcast, multicast and gossip, have been developed. In datacentric protocols sources send data to the sink, but routing nodes look at the content of the data and perform some form of aggregation/consolidation function on the data originating at multiple sources. Many data-centric protocols also have the ability to query a set of sensor nodes, and to use attribute-based naming and data aggregation during relaying. Well known examples of data-centric routing protocols include Sensor Protocols for Information via Negotiation (SPIN) [31], Directed Diffusion [32], Rumour Routing [33]. Other data-centric protocols are Gradient-Based Routing (GBR) [34], Constrained Anisotropic Diffusion Routing (CADR) [35], COUGAR [36], TinyDB [37], and Active Query forwarding In sensoR nEtworks (ACQUIRE) [38]. Location aware routing protocols are used were the geographical location of nodes – source, destination, and intermediate nodes – is important from a routing perspective. Considering node location can also achieve more efficient routing in terms of energy consumption, data aggregation and routing delay. One distinctive routing approach that has gathered some interest recently is the, so-called, geographicalaided forwarding. Several techniques have been proposed in the literature where the availability of location information is achieved by means of GPS, or GPS-less, techniques [39–41] and is used for performing packet forwarding, without requiring either the exchange of routing tables among network nodes or the explicit establishment of a route from a sender to a destination. Location-based routing protocols have been widely adopted in the design of wireless sensor networks. Most of the existing location-based routing protocols are stateful; that is, they make routing decisions based upon cached geographical information about neighbouring nodes. However, possible node movements, node failures, and energy conservation techniques in sensor networks do result in dynamic networks with frequent topology


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transients, and thus pose a major challenge to stateful packet routing algorithms. Examples of geographical routing techniques include Geographic and Energy Aware Routing (GEAR) [42], GeRaF [43], Minimum Energy Communication Network (MECN) [44], Small MECN (SMECN) [45], and Geographic Adaptive Fidelity (GAF) [46]. Qualit-of-Service (QoS)-Aware routing protocols base routing decisions on the specific quality of service needs of the applications that the embedded network supports while at the same time trying to minimize energy consumption. Some applications have specific delay requirements - for instance, surveillance applications that require the routing protocols to be cognisent of delay - and other aspects include reliability, where data loss is unacceptable. Many other quality of service attributes are used in embedded networks leading to a wide veriety of these types of protocols, such as Sequential Assignment Routing (SAR) [47], SPEED [48] and the Energy Aware QoS Routing Protocol. Other protocols include Maximum Lifetime Energy Routing [49], Maximum Lifetime Data Gathering [50], and Minimum Cost Forwarding [51]. Protocols developed to provide increased reliability and accuracy of sensor data, such as those presented in [52], [53] and [54], are also important QoS-aware routing protocols in embedded wireless networks. Maintenance aware routing protocols have been proposed recently as a means to acknowledge that, in many circumstances, the nature of embedded wireless networks may not permit access to the nodes for maintenance purposes - that is battery replacement or repairs - without difficulty, or at all. An example of such a routing protocol can be found in [55]. Cross-layer routing protocols are based on recent approaches to overcome some of the inefficiencies that the original, strictly-layered approach to computer networking creates. Cross-layer optimisation techniques attempt to use information available in other layers to make routing decisions; for example, if congestion is present in the MAC layer then avoid being included in the current route request, if the physical connection to a node is lost then initiate the route update now rather than waiting until data needs to be sent and creating delays. Examples of crosslayer routing protocols can be found in [56, 57].

2.4

Transport Protocols

A second aspect of networking in computer networks is end-to-end data delivery. This is usually the task of the transport layer. The role of the transport layer, and its protocols, is to provide reliable end-to-end data delivery and traffic and congestion control, both in a fair manner. The standard protocol used in most computer networks is the Transmission Control Protocol (TCP) [6, 7], which is used on the Internet. TCP provides reliable end-to-end delivery of data, employing a retransmission mechanism, when data gets lost or delayed, and it also controls congestion in the network. However, TCP is not the most efficient protocol for embedded

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networks. A number of changes have been proposed to TCP to better adapt it for use over wireless channels [58] and for application in low power embedded networks. Examples are nanoTCP [59], nanoUDP, 6LoWPAN (see below), Zigbee (see below), and event-to-sink reliable transport (ESRT) [60], which has been proposed for specific applications in sensor networks. In the following section, an overview of the key wireless communication standards for embedded networks are presented, followed by some examplary proprietary technologies.

3 3.1

Wireless Network Standards Communication Standards for Embedded Devices

Embedded devices are heterogeneous and are adapted to greatly differing application needs. Therefore varied communication technologies can be used, including cellular communication systems, such as GSM and 3G (e.g. WCDMA/UMTS), WLAN technology as standardized by the IEEE in the 802.11 standard, Wireless Personal Area Network (PAN) communication standards, such as Bluetooth/802.15.1 and ZigBee/802.15.4, Near Field Communication (NFC) and Radio Frequency Identification (RFID) technology. Cellular systems are typically more power hungry than other wireless communication approaches due to the distances they need to cover and the complexity of the protocols. They also require registration and a contract with a network provider and therefore are only suitable for specific application fields. WLAN technology, based on IEEE 802.11, is widely deployed in companies and private homes. It offers relatively high data rates, up to 54 Mbit/s using 802.11g and well above 100 Mbit/s [61] with 802.11n expected to be published in 2009. The high data rates offered by IEEE802.11 make it more power hungry than many other technologies used for embedded networking and is used mainly where these high data rates are needed; for example, video surveillance applications. For Personal Area Networks, that is, the network of devices a person may carry with them, (e.g. mobile phones, headsets, PDAs) the Bluetooth standard was introduced. Pushed by industry and in particular by Ericsson, the standard was developed and the lower layers became an official IEEE standard (802.15.1) in June 2002 [62]. A modified version of Bluetooth, called WiBree, operating over shorter distances and with ultra low power consumption, was specified by Nokia and first published in the fall of 2006. In June 2007, WiBree joined Bluetooth SIG1 and now serves as a special low power, low range physical layer for Bluetooth type services. The WiBree physical layer is not (yet) part of IEEE 802.15.1.

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http://www.bluetooth.org


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IEEE has standardised another low power communication technology covering physical and MAC layers, the IEEE802.15.4 Low Power Personal Area Network standard. Industry sponsored standards groups have complemented this to provide other protocol layers to create a complete network standard. The main standards groupings to do this are the ZigBee Alliance2, the HART Foundation3, and the ISA4. In those standards, IEEE 802.15.4 specifies the physical and MAC layer, while the ZigBee Alliance - similar to the Bluetooth Special Interest Group (SIG) -, the HART Foundation and ISA have specified the higher layers, services and application scenarios for their respective systems standards. The ZigBee higher layers and services are substantially less complex than the Bluetooth protocol stack and for this reason the standard is particularly suitable for low complexity, energy limited devices, such as sensor nodes and embedded devices. However, market penetration is still low as there are doubts about the energy efficiency of the Zigbee protocol stack [63]. In the following sections, a range of communication systems are introduced in more detail.

3.2

Cellular Mobile Systems Standards

Cellular mobile communication systems are well planned and designed computer networks, deployed by network operators, who have a license to operate a certain system in a particular frequency band and region, as granted by regulatory authorities. The most successful mobile communication system is without doubt GSM (Global System for Mobile Communications). GSM started as the second generation mobile phone system in Europe gradually replacing analogue systems (first generation systems), with the first network operational in Finland in 1991. GSM was primarily designed for voice services with some data capabilities. Besides voice, circuit switched data services and short messages (Short Message System, SMS) have been introduced. SMS has been an unexpected, overwhelming success with around 1.9 trillion messages sent in 2007, leading to a revenue of 52 billion US$ [64]. With the increasing demand for mobile data communication, GSM has evolved and now supports High Speed Circuit Switched Data (HSCSD), with rates up to 57.6 kbit/s, by bundling several data channels and packet switched services (General Packet Radio Service, GPRS), with data rates theoretically up to 171.2 kbit/s and realistically up to 115 kbit/s. GPRS is often referred to as 2.5 G mobile communication system. GSM’s data and messaging capabilities are attractive for embedded applications and are used to wirelessly connect to remote embedded systems; this is possible due to the ubiquitous availability of cellular system services across many geographical areas.

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http://www.zigbee.org http://www.hartcomm.org 4 http://www.isa.org 3

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Third generation cellular mobile systems were internationally standardised and harmonised by the International Telecommunication Union (ITU), with the vision of establishing a single world-wide standard. In the end, two different implementations of IMT-2000 (Intelligent Mobile Telecommunications 2000) were realised: W-CDMA/UMTS, standardised by the third generation partnership project (3GPP), and cdma2000 by 3GPP2. The cdma2000 implementation allows backwards compatibility to cdmaOne, popular in the US, whereas WCDMA/UMTS represents an evolutionary path from GSM to 3G. Third generation systems offer higher data rate services, initially at 384 kbit/s, as well as a higher spectral efficiency. Currently, 3G extensions (3.5G) are deployed; for example, HSDPA/HSUPA (High Speed Downlink Packet Access, High Speed Uplink Packet Access), providing peak data rates of theoretically up to 14.4 Mbit/s in the uplink and 5.7 Mbit/s in the downlink. IEEE802.16 (WiMAX) and 4G systems, such as Long Term Evolution (LTE) and System Architecture Evolution (SAE) of 3G, are under discussion at the moment, leading to substantially higher data rates - above 100 Mbit/s - and all IP network architectures [65]. Third generation mobile communications systems and its evolution are well described in literature. [66–68]. For embedded wireless networks, mobile communication systems, such as GSM and UMTS, are important if the embedded device itself is mobile or needs to communicate to mobile objects and persons equipped with mobile phones. They are also important to provide wireless and mobile wide area connectivity to embedded wireless monitoring and control systems installed in remote locations.

3.3

IEEE802.11 WLAN

IEEE 802.11 is a set of standards for wireless local area network (WLAN) computer communication, developed by the IEEE LAN/MAN Standards Committee (IEEE 802) in the 5 GHz (11a) and 2.4 GHz ISM (Industrial, Scientific, and Medical) public spectrum bands. The 802.11 suite is designed to provide wireless connectivity for laptop and desktop computers and consequently provides much higher data rates than may be necessary for most wireless embedded network applications, apart from image or video based applications. Wireless LANs have originally been designed as an alternative to fixed LANs for portable computers. Starting with 1–2 Mbit/s in 1997, WLAN systems today reach approximately 100 Mbit/s, using a draft version of the upcoming IEEE802.11n standard. The IEEE802.11 standard is comparatively complex and has not been designed for high energy efficiency, although recent implementations reach similar energy per bit ratios to other low power technologies, such as IEEE802.15.4 (see below). However, the complexity of the 802.11 protocol stack requires approximately 30 times more memory than the ZigBee/802.15.4 protocol stack (~1 MByte vs. 4–32 kByte). The main objective of the WLAN design was to enable wireless networking of computers with high data rates over short distances within buildings, or up to a few hundred meters in outdoor environments. However, approximately 30% of the IEEE802.11


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based chipset are now being used for non-PC based systems, such as mobile phones, digital cameras, camcorders and mp3 players. For a detailed technical description of WLAN, refer to the literature [69–71]. A short summary is given in the following section, starting with the physical layer and continuing with higher layers. In comparison to the cellular mobile systems, WLAN and also the Wireless Personal Area Network System, uses the ISM frequency bands, which do not require operating licenses in most countries of the world. For WLAN, the 2.4 GHz band and 5 GHz band are being used. The initial standard started with Direct Sequence Spread Spectrum (DSSS) technology using the 11 chip Barker Code and DBPSK and DQPSK modulation schemes in the 2.4 GHz band. With this legacy 802.11 standard a relatively robust transmission, with 1–2 Mbit/s transmission rate, is achieved, utilizing a chip rate of 11 Mchip/s and occupying a bandwidth of approximately 22 MHz. Eleven frequency channels have been defined for the US and thirteen for Europe, with a channel spacing of 5 MHz. Taking the 22 MHz required bandwidth per channel, only three non-overlapping channels are available in the 2.4 GHz ISM band. In Europe an EIRP (equivalent isotropically radiated power) of 100mW is permitted and in the US it may be up to 1W. In 1999, 802.11b was introduced and brought a commercial break-through to WLAN; with a technically enhanced the data rate up to 11 Mbit/s and the same bandwidth requirement, through applying Complementary Code Keying (CCK) modulation schemes. In 802.11a, also introduced in 1999, OFDM (orthogonal frequency division multiplexing) and different phase shift keying modulation schemes, from BPSK to 64-QAM, are applied and provide data rates from 6 to 54 Mbit/s in the less congested 5 GHz ISM band. Here, 12 non-overlapping channels are available for WLAN traffic, each 20 MHz wide. For Europe, a lower EIRP of 50mW is permitted. With transmit power control (TPC) and dynamic frequency selection (DFS), 250 mW is acceptable, as described in the IEEE standard 802.11h. The specific conditions for Japan in the 5 GHz frequency range are addressed in IEEE 802.11j. IEEE 802.11g, introduced in 2003, brought OFDM and data rates of up to 54 Mbit/s to the 2.4 GHz band. Further increase is expected from the 802.11n standard, still under development within the standardisation process; 802.11n will utilize multiple antenna (Multiple Input Multiple Output – MIMO) technology to achieve data rates beyond 100 Mbit/s. Pre-standard products are on the market and are even certified by the WiFi Alliance (11), an industry consortium certifying WLAN 802.11 products to ensure interoperability between different vendors. Two different operational modes are specified in IEEE802.11: Infrastructure and Ad-hoc mode. In the infrastructure mode the communication between two stations is via an Access Point (AP). The access to the wireless medium is contention based, referred to as Distributed Coordination Function (DCF), or contentionfree, coordinated by the Access Point, referred to as Point Coordination Function (PCF). In the distributed coordination function (DCF), which is mandatory for WLAN systems, the CSMA/CA random access scheme is used as described in section 2.2. To avoid the hidden node problem RTS/CTS (Request to send/Clear to send) can be applied optionally. In PCF mode, an optional mode for 802.11 systems, the Access Point can poll different stations and therefore QoS can be better

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supported. However, the transition from contention to contention-free periods cannot be scheduled and no QoS classes are defined. Both of these issues have been resolved with the IEEE 802.11e standard, released in 2005. In Ad-hoc mode only the distributed coordination function (DCF) mode is used accessing the channel using the CSMA/CA scheme. Communication is possible between stations directly, without the need to authenticate to an access point. Network layer ad-hoc protocols (MANET), as introduced in section 2.3, typically utilize the MAC layer ad-hoc mode, but are not part of the IEEE standard. Other parts of the IEEE802.11 series address interoperability issues (IEEE802.11h/j), mesh networking (IEEE802.11s) and embedded wireless networking for car to car communication (IEEE802.11p).

3.4

IEEE802.15.1, Bluetooth and WiBree

Bluetooth [72] was developed by the Bluetooth Special Interest Group as a low power, short range communication technology for Wireless Personal Area Networks. Applications target the connectivity of devices, such as laptop computers, mobile phones, printers, and also audio devices, such as wireless headsets. For Bluetooth-based communications, Bluetooth profiles the wireless interface specifications that provide configurations to meet application requirements. Bluetooth can be used for sensor network applications, but as with the 802.11 suite it provides data rates - up to 723kbps (asym) or 432kbps (sym) in the first Bluetooth version and even up to 3 Mbit/s in Bluetooth 2.0 EDR - that are higher than required for many WSN applications. However, Bluetooth based on Frequency Hopping Spread Spectrum (FHSS) wireless communication does not allow for long inactive periods and therefore power consumption is too high for many WSN applications. Additionally, Bluetooth does not scale well to larger networks. Another disadvantage of Bluetooth is the relatively slow pairing time when new nodes enter a Bluetooth network. Furthermore, only eight devices, including the coordinator, can be active members of a Personal Area Network (Piconet). Around 250 parked members can join the network. Both numbers are not sufficient for many embedded system applications. Piconets can be interconnected to form Scatternets using common gateway nodes. However, this topology approach is rather inflexible. WiBree [73] is a new digital radio technology, developed by Nokia as an extension to Bluetooth and designed for ultra low power consumption, within a short range of approximately 5–10 meters. WiBree is designed to complement rather than replace Bluetooth. It is aimed at interconnecting small devices that do not need full Bluetooth functionality and consumes a fraction of the power of related Bluetooth technology. It operates in the 2.4 GHz ISM band with a physical layer bit rate of 1 Mbps. Targeted applications include Sport and Wellness, the Wireless Office and Mobile Accessories, Healthcare Monitoring, Entertainment Equipment; these is a focus on interconnecting devices such as watches, keyboards, sports sensors to mobile phones, with low power consumption being a key design requirement. WiBree is aimed at creating sensor networks around mobile phones rather than large scale networks.


3.5

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IEEE802.15.4, Zigbee, WiHART, ISA-SP100.11a

IEEE 802.15.4 is the main IEEE standard specifying the physical layer and medium access control for low cost, low power, low data rate, personal area (short range) wireless networks. IEEE802.15.4 operates on one of three possible ISM bands, 868MHz, 915MHz, and 2.4GHz. Similar to IEEE802.11, IEEE802.15.4 uses a direct sequence spread spectrum (DSSS) based physical layer. In the 868 MHz frequency band, data transmission rates of up to 20 kbit/s are possible using BPSK modulation with a 15 chip spreading code, resulting in a chip rate of 300 kchp/s. Only one channel is available here. In the 902–928 MHz range there are 10 channels available with data rates of 40 kbit/s per channel using BPSK modulation and the same 15 code spreading code. In the 2.4 GHz range, data rates of up to 250 kbit/ s can be supported using O-QPSK modulation with a 32 code spreading code resulting in a chip rate of 2 Mbit/s and 5 MHz channel spacing. IEEE802.15.4 distinguishes two types of network node, the full function device (FFD) - this can operate as the coordinator of a personal area network and is referred to as the PAN coordinator - and the reduced function devices (RFD). RFDs are intended to be extremely simple devices with very lightweight resource and communication requirements and it is only possible for such nodes to communicate with FFDs. Due to power and functionality restrictions, RFDs are precluded from acting as coordinators. Networks can be topologically configured as either pointto-point or star networks, as per Fig. 7.3, with networks requiring one FFD to act

Star Topology

Tree Topology (Peer to Peer) (not recommended in ZigBee)

Legend Full Functional Device

Legend Full Functional Device

Reduced Function Device

Reduced Function Device

Network Co-ordinator

Network Co-ordinator

Fig. 7.3 IEEE802.15.4/ZigBee Topology Configurations

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as the coordinator. Address identifiers are unique 64-bit identifiers, with the possibility to use a short 16-bit identifier within a restricted domain (i.e. individual PANs). As the standard does not specify a network layer, routing is not directly supported, but a subsequent layer can be added to provide support for multi-hop communications. Two operating modes, non-beacon and beacon enabled, are possible with physical medium channel access being achieved via a CSMA/CA protocol. For non-beacon mode, unslotted channel access is based on listening of the medium for a time window scaled by a random exponential back-off algorithm. In beacon enabled mode the coordinator broadcasts beacons periodically to synchronise the attached devices. A superframe structure is used in beacon enabled mode and its format is determined by the coordinator, with successive beacons acting as the superframe limit. Contention within superframes is resolved by CSMA/CA and each transmission must end before the arrival of the second beacon. The focus of 802.15.4 is the provision of low power communication between nearby devices with little to no reliance on underlying infrastructure and this has seen the standard adopted as the main wireless communication technology for automation and control applications. ZigBee [74] is a low-cost, low-power, wireless mesh networking standard that defines the network and application layers that sit on top of IEEE 802.15.4. The ZigBee Alliance comprises industrial partners that include Philips, Motorola and Honeywell. The ZigBee standard provides technology that is suitable for wireless control and monitoring applications, the low power-usage allows longer life with smaller batteries, and the mesh networking provides high reliability and larger range. Among the main applications being targeted is Building Automation – light control, meter reading, etc. The current release is Zigbee 2007 and this offers two stack profiles. A lightweight stack profile 1, referred to as ZigBee, is aimed at home and light commercial use, whereas the stack profile 2, called ZigBee Pro, provides additional features, including multicasting, many-to-one routing and high security with Symmetric-Key Key Exchange. Both stack profiles provide full mesh networking and work with all ZigBee application profiles. The ZigBee standard defines three different device types: Zigbee Coordinator (ZC), ZigBee Router (ZR), and ZigBee End Device (ZED). Only one ZC is required per network, which initiates network formation, assigns addresses and acts as IEEE802.15.4 PAN co-ordinator. The ZR is an optional network component, which associates with the ZC or another ZR. The ZC acts as IEEE802.15.4 Coordinator, a Full Function Device, provides local address management, and participates in multi-hop/mesh routing and maintains routing tables. The ZED is also an optional network component, although essential in most real networks, as it is typically the device that provides sensing and control functionality within the network. The ZED is an IEEE802.15.4 Reduced Function Device (RFD) and therefore needs to associate itself with a ZC or ZR in order to send data towards the PAN coordinator. ZEDs rely on parent devices (FFD) to initiate sleep cycles and do not participate in association or routing.


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As in IEEE802.15.4, Zigbee uses both beacon and non-beacon modes. In the non-beacon enabled mode channel access is supported through an unslotted CSMA/ CA protocol. This mode typically requires ZR devices to have their receivers alwayson and this necessitates constant (line-powered) power supply. In beacon enabled networks the ZR schedules periodic beacons to identify their presence in the network. As a consequence of periodic beaconing, other network nodes, in particular ZigBee End Devices, can sleep between beacons, which facilitates a smaller duty cycle and prolonged battery life. Zigbee uses a basic master-slave topology configuration, shown in Fig. 7.3, suited to static star networks of many infrequently used devices. In the star configuration, Zigbee supports a single hop topology, constructed with one coordinator in the centre and end devices. Devices only communicate via the network coordinator and this is necessary for RFDs as they are not capable of routing. The tree topology is a multiple star topology configuration with one central node acting as the Zigbee network coordinator. For mesh configurations the FFDs communicate without the aid of a network coordinator and the FFDs serve as routers, forming a reliable network structure, as shown in Fig. 7.4. The ZigBee protocols aim at minimising power usage by reducing the duration that the radio transceiver is on, but there are deficiencies associated with this approach in that there is no support for energy efficient routing for networks with mesh topologies; ZigBee does not provide beacon scheduling for such topologies.

Mesh with Star Clusters

Mesh Topology Legend Full Functional Device Reduced Function Device Network Co-ordinator

Fig. 7.4 ZigBee Mesh Topology Configurations

Legend Network Router (FFD) Network End Device (RFD, FFD) Network Co-ordinator (FFD) Mesh Link Star Link

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For FFDs to act as routers in mesh topologies, they need to be line powered as they have to be in listening mode all the time, which drains battery power. The routing protocol is relatively static with route re-discovery occurring as part of route maintenance and this leads to slow recovery from node failures. Likewise, routing is not scalable as it is based on AODV and there is no provision for efficient Real-Time Short Address Allocation Algorithms. The WirelessHART standard, part of HART release 7, was approved and released in June 2007. This is a wireless extension of the HART Communication Foundation’s HART protocol (IEC 61158), used for networking embedded control devices in industrial automation and control environments. The HART Communication Foundation is an independent, not-for-profit organisation and is the technology owner and standards body for the HART Protocol. The foundation has members that include the major instrumentation manufacturers and users on a global scale: ABB, Adaptive Instruments, Crossbow Technology, Dust Networks, ELPRO Technologies, Emerson Process Management, Endress+Hauser, Flowserve, Honeywell, MACTek, MTL, Omnex Control Systems, Pepperl+Fuchs, Phoenix Contact, Siemens, Smar, Yamatake and Yokogawa. HART claims that its WirelessHART standard is the first open and interoperable wireless communication standard focused on providing reliable, robust and secure wireless communication in real world industrial plant applications. WirelessHART uses IEEE802.15.4 for physical and MAC layer and adds self-organising, self-healing mesh based networking. WirelessHART is seen as being complementary to wired HART technology rather than a replacement, extending the capabilities of the existing wired applications. At present it is estimated that HART technology is used in more than 25 million installed devices worldwide. The objectives of the WirelessHART standard are: 99% reliability, 3–10 yr battery life for wireless devices, mesh, star, and combined networks (rather than just point-to-point) and backward compatibility with all equipment in the field. WirelessHART aims to provide more data in real time, with wireless capability giving easier access to new intelligent device and process information, offering multivariable process data, as well as status, diagnostic, and configuration data. It is claimed that it improves asset management, environmental monitoring, energy management, regulatory compliance, and access to remote or inaccessible equipment (personnel safety). WirelessHART claims it offers more flexibility in that the wireless technology allows attachment of HART-based controllers anywhere in the control loop and offers, through the HART protocol, compatibility with legacy systems. The ISA SP100.11a standard is billed as being the first of a family of standards for multiple industrial applications and is a standardisation effort by ISA, the society for automation and control professionals. ISA-SP100.11a is a new wireless protocol standard based upon IEEE802.15.4 and it is aimed at providing a wireless networking solution for industrial automation equipment. ISA is currently considering 6LoWPAN (see below) as an option for the network layer of the SP100.1a standard. SP100.11a is developed as an open standard and, currently, efforts are underway to align Wireless HART with ISO-SP100.11a.


3.6

179

6LoWPAN

The 6LoWPAN standard, specified by the IETF in RFC4944, provides IP networking capabilities for IEEE802.15.4 devices and supports Internet connectivity with IEEE802.15.4 networks. The standard proposes an adaptation layer to provide interoperability between IPv6 and 802.15.4 networks and provides support for mesh topologies, IP header compression unicast and multicast routing. The targeted application space for 6LoWPAN is low data rate applications, such as automation in home, office and industrial environments, which require wireless internet connectivity.

3.7

Z-Wave

Z-Wave is an interoperable wireless communication protocol developed by Zensys and the Z-Wave Alliance, that is focused on low power, low bandwidth applications for home automation and sensor networks. The Z-Wave Alliance is based upon a consortium of independent manufacturers that develop wireless home automation products built on the Zensys Z-Wave open standard. Z-Wave provides 40 kbit/s data transmission capability and is fully interoperable with an open air range of approximately 30 meters, which is lessened for indoor applications, depending on the environment. Z-Wave Radio uses the 900 MHz ISM band and a network can contain up to 232 devices, with the option of bridging networks for supporting additional devices; routing relies on an intelligent mesh network topology without the need for a master node.

4

Proprietary Technologies

A wide range of proprietary and application specific wireless communication technologies exist that are tailored for specific embedded networking applications. Many of the large RF chip manufacturers now provide their own wireless networking software with those chipsets in order to promote their sales. The networking software is, if not based on standards, proprietary and targets a particular application range that is often not well covered by standards based protocols, or where standards based technology is not necessary. A selection of such manufacturers and technologies include Texas Instruments’ Chipcon range, Nordic Semiconductor, Analog Devices, RF Monolithics, and others. While Texas Instruments have IEEE802.15.4 compliant chipsets, they also provide their own proprietary network technology, called SimpliciTI [75] with other low power RF chipsets, such as CC110x and CC2500. Nordic Semiconductor offers the ANT protocol [76] with a selected range of their low power RF chipsets.

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Simplici is a Texas Instruments proprietary low-power RF network protocol, using Texas Instruments CC1XXX/CC25XX chipsets, suitable for use over small (not exceeding 256 devices) RF networks, aimed at battery operated devices with low data requirements and low duty cycle. SimpliciTI supports peer-to-peer communication with access points and range extenders (max 4 hops) for multihop communications. This is a low cost protocol with a memory footprints of =1 Synapse

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Fig. 9.1 UML model of the ambient ecology concept

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supporting the users’ everyday activities. This interaction is mainly related to either the provision or consumption of context and services between the participating entities. A coffee maker, for instance, publishes its service to boil coffee, while context for a person may denote her activity and location. An augmented interaction between the coffee maker and the person is the activation of the coffee machine when the person wakes in the morning. For this to happen we will probably need a bed instrumented with pressure sensors (an artifact) and a reasoning function for the persons’ process of waking, which may not be trivial to describe. to the entity itself; relational, which relate the entity to other entities; and behavioral, which determine possible changes to the values of structural and relational properties. Artifacts: An artifact is a tangible object - biological elements like plants and animals are also possible here, see [13] which bears digitally expressed properties. Usually, it is an object or device augmented with sensors, actuators, processing, networking, or a computational device that already has embedded some of the required hardware components. Software applications running on computational devices are also considered to be artifacts. Examples of artifacts include furniture, clothes, air conditioners, coffee makers, a software digital clock, a software music player, a plant, etc. Services: Services are resources capable of performing tasks that form a coherent functionality from the point of view of provider entities and requester entities. Services communicate only through their exposed interfaces. Services are selfcontained, can be discovered and are accessible through signatures. Any functionality expressed by a service descriptor (a signature and accessor interface that describes what the service offers, requires and how it can be accessed) is available within the service itself. Ambient Ecology: Two or more eEntities can be combined in an eEntity synthesis. Such syntheses are the programmatic bearers of Ambient Ecologies and can be regarded as service compositions; their realization can be assisted by end-user tools. Since the same eEntity may participate in many Ambient Ecologies the whole-part relationship is not exclusive. In the UML class diagram (see Figure 9-1) this is implied by using the aggregation symbol (hollow diamond) instead of the composition symbol (filled diamond). Ambient Ecologies are synthesizable since an Ambient Ecology is an eEntity itself and can participate in another Ecology. Properties: Entities have properties, which collectively represent their physical characteristics, capabilities and services. A property is modeled as a function that either evaluates an entity’s state variable into a single value or triggers a reaction, typically involving an actuator. Some properties (i.e. physical characteristics, unique identifier) are entity-specific, while others (i.e. services) are not. For example, attributes like color/shape/weight represent properties that all physical objects possess. The ‘light’ service may be offered by different objects. A property of an entity composition is called an emergent property. All of the entity’s properties are encapsulated in a property schema which can be sent on request to other entities, or tools (e.g. during an entity discovery). Functional Schemas: An entity is modeled in terms of a functional schema: F = {f1, f2 … fn}, where each function fi gives the value of an observed property i in

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time t. Functions in a functional schema can be as simple or complex is required to define the property. They may range from single sensor readings, through rulebased formulas involving multiple properties, to first-order logic so that we can quantify over sets of artifacts and their properties. State: The values for all property functions of an entity at a given time represent the state of the entity. For an entity E, the set P(E) = {(p1, p2 … pn)|pi = fi (t)} represents the state space of the entity. Each member of the state vector represents a state variable. The concept of state is useful for reasoning about how things may change. Restrictions on the value domain of a state variable are then possible. Transformation: A transformation is a transition from one state to another. A transformation happens either as a result of an internal event (i.e. a change in the state of a sensor) or after a change in the entitys’ functional context (as it is propagated through the synapses of the entity). Plugs: Plugs represent the interface of an entity. An interface consists of a set of operations that an entity needs to access in its surrounding environment and a set of operations that the surrounding environment can access on the given entity. Thus, plugs are characterized by their direction and data type. Plugs may be output (O) where they manifest their corresponding property (e.g. as a provided service), input (I) where they associate their property with data from other artifacts (e.g. as service consumers), or I/O when both happens. Plugs also have a certain data type, which can be either a semantically primitive one (e.g. integer, boolean, etc.), or a semantically rich one (e.g. image, sound etc.). From the user’s perspective, plugs make visible the entities’ properties, capabilities and services to people and to other entities. Synapses: Synapses are associations between two compatible plugs. In practice, synapses relate the functional schemas of two different entities. When a property of a source entity changes, the new value is propagated through the synapse to the target entity. The initial change of value caused by a state transition of the source entity causes a state transition in the target entity. In that way, synapses are a realization of the functional context of the entity.

3.2

Formal Definitions

To define formally the artifacts and the ambient ecology constructs we first introduce three auxiliary concepts: the domain D is a set which does not include the empty element; P is an arbitrary non-infinite set called the set of properties or property schema - each element p of which is associated with a subset D denoted τ(p) called the type of p; τ is actually a function that defines the set of all elements of D that can be values of a property. The domain D might include values from any primitive data type such as integers, strings, enumerations, or semantically rich ones such as light, sound and image.

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3.2.1


Artifact

An artifact is a 4-tuple A of the form (P, F, IP, OP) where: ● ● ●

●

P is the artifacts’ property schema F is the artifacts’ functional schema IP is a set of properties (ip1, ip2, …, ipn) for some integer n ≥ 0 that are imported from other artifacts (corresponding to input plugs); OP is a set of properties (op1, op2, …, opm) for some integer m ≥ 0 that are exported to other artifacts (corresponding to output plugs).

The role of artifacts in an ambient ecology can be seen as analogous to that of primitive components in a component-based system. In that sense they provide services implemented using any formalism or language. Plugs (input and output) provide the interface through which the artifact interacts with other artifacts. The functionality of an artifact is implemented through its functional schema F. In general an artifact produces data on its OP set in response to the arrival of data at its IP set. There are two special cases of artifacts: ● ●

a source artifact is one that has an empty IP set; a sink artifact is one that has an empty OP set.

A source artifact from the point of view of the application in which it is embedded generates data. For example, an eClock generates an alarm event to be consumed by other artifacts. On the other hand, a sink artifact receives its input data from its input plugs but produces no data. For example, the eBlinds artifact receives the awake event from the eClock and opens the blinds without producing any new data.

3.2.2

Ambient ecology as a composite artifact

Ambient ecologies are synthesizable since an ambient ecology is an entity itself and can participate in another ecology. Then we can formally define an ambient ecology as a 5-tuple S of the form (C, E, S, IP, OP). Let s be a composite artifact then: ●

C is the set of constituent artifacts (see previous section for artifact definition) not including S at time t. It follows that the composition of s at time t is: Θ(σ, t ) = {x | x ∈C}

●

E is the surrounding environment, the set of entities that do not belong to C but interact with artifacts that belong to C at time t. It follows that the surrounding environment of s at time t is: ∏(σ, t ) = {x | x ∉Θ(σ, t ) ∧ ∃y ∈Θ(σ, t ) ∧ ∃d ( x, y) ∈ S} where d(x, y) denotes a synapse existence between x and y.

●

S is a set of synapses that is a set of pairs of the form (source, target) such that if d is a synapse, then:

9 Achieving Co-Operation and Developing Smart Behavior ● ● ● ●

217

source(d) is either an input plug of S or an output plug of an element of C; target(d) is a set of properties of S not containing source(d); For each target r of d, t (source(d)) Õ t (r). It follows that the interconnection structure of σ at time t is: ∆(σ, t ) = {d ( x, y) | x, y ∈Θ(σ, t )} ∪ {d ( x, y) | x ∈Θ(σ, t ) ∧ y ∈ ∏(σ, t )}

●

●

●

IP is a set (possibly empty) of distinct properties that are imported from the surrounding environment (corresponding to input plugs); OP is a set (possibly empty) of distinct properties, called emergent properties, that are exported to the surrounding environment (corresponding to output plugs); Auxiliary to the above we define the following items: The property schema of S is defined as the set: IP ∪ OP ∪ { p | ∃x ∈C ∧ p ∈ P( x )}

where P(x) is the property schema of constituent artifact x. ∀x, y ∈C , the sets IP, OP, P( x ) and P ( y) are pairwise disjoint. A composite artifact is a set of interconnected artifacts through synapses. A synapse associates an output plug of one artifact (the source of the synapse) with the input plugs of one or more other artifacts (the targets of the synapses). A synapse reflects the flow of data from source to targets. Each target should be able to accept any value it receives from the source, so its type must be a subset of the type of the source. Synapses cause the interaction among artifacts and the coupling of their execution. When a property of a source artifact changes, the new value is propagated via the synapse to the target artifact. The initial change of value caused by a state transition of the source artifact, causes eventually a state transition of the target artifact and thus their execution is coupled.

3.2.3 States, Transitions and Behavior Modeling A state over a property schema P is a function f: P → D such that f(p) ∈ t(p) ∀ p ∈ P. A state is an assignment of values to all properties. The dynamics of an artifact are described in terms of its changes of states. When an artifact a undergoes a state change the value of at least one of its properties will alter. A change of state constitutes an event. Thus an event may be defined as an ordered pair 〈k, k '〉where k, k ' are states in the state space of a. If a is an artifact (it can be a composite one) and k is a state, then an execution of a from k1 is a sequence of the form k1 → k2 → k3 → … → kn. For each i ≥ 1 three kinds of transitions are identified: 1. ki is a propagation of ki-1; 2. otherwise ki is a derivation of ki-1; 3. otherwise ki is an evaluation of ki-1

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The propagation is the simplest transition as it simply copies values that have been generated by an artifact along the synapses from the artifact’s output plug to the other artifacts. These values may arrive at input plugs of some artifacts, which can trigger accordingly an evaluation of the artifact’s function(s). The derivation is a composite transition, which incorporates the propagation and evaluation of a relational property at the synapse level. The derivation associates logically (using logical operators) the properties that are found at the end-points of the synapse essentially deriving a new relational property, which serves as an input plug to subsequent evaluation. The evaluation transition refers to a situation where the input plugs of an artifact have been defined through propagation or derivation transitions and the function(s) of the artifact can be executed so that the results are passed to its output plugs. Based on the above discussion it emerges that a natural way to model the behavior of artifacts and the behavior of ambient ecologies viewed as assemblies of artifacts is to use statechart diagrams. Statecharts are a familiar technique to describe the behavior of a system. They describe all of the possible states that a particular object can have and how the object’s state changes as a result of events that reach the object. In principle, a statechart is a finite-state machine with a visual appearance that is greatly enhanced by introducing a specialized graphical notation. Statecharts allow nesting of states (hierarchical statecharts). The expressive power of statecharts is enhanced by using Object Constraint Language (OCL) for conditional triggering of communication events. Statecharts play a central role in object-oriented software engineering methodologies (e.g., Unified Process) and is one of the diagrams supported by the UML standard [14]. The UML style is based on David Harel’s statechart notation [15]. Statecharts represent states by using rounded rectangles. Input and output control ports are attached to states, representing the states’ entry and exit points, respectively. Transitions between states are represented by arrows linking control ports of states. Statecharts may contain ports not attached to any state. These control ports refer to the entry/exit points of superstates. The states of a statechart define the states of the artifact and the links between the states define the events of an artifact.

4

Gas Architectural Style

The ways that we can use an ordinary object are a direct consequence of the anticipated uses that object designers “embed” into the object’s physical properties. This association is in fact bi-directional: objects have been designed to be suitable for certain tasks, but it is also their physical properties that constrain the tasks people use them for. According to Norman [16] affordances “refer to the perceived and actual properties of the thing, primarily those fundamental properties that determine just how the thing could possibly be used”. Due to their “digital self”, artifacts can now publicize their abilities in digital space. These include properties (what the object is), capabilities (what the object


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can do) and services (what the object can offer to others). At the same time, they acquire extra capabilities, which during the formation of UbiComp applications (ambient ecologies), can be combined with the capabilities of other artifacts or adapted to the context of operation. Thus, artifacts offer two new affordances to their users: ●

●

Composeability: artifacts can be used as building blocks of larger and more complex systems. Changeability: artifacts that possess or have access to digital storage can change or adapt their functionality. For example, an artifact can aggregate service information into its repository on behalf of artifacts that are less equipped facilitating in that way a service discovery process.

Both these affordances are a result of the ability to produce descriptions of properties, abilities and services, which carry information about the artifact in digital space. This ability improves object/service independence, as an artifact that acts as a service consumer may seek a service producer based only on a service description. For example, consider the analogy of someone wanting to drive a nail and asking not for the hammer, but for any object that could offer a hammering service (could be a large flat stone). In order to be consistent with the physical world, functional autonomy of UbiComp objects must also be preserved; thus, they must be capable to function without any dependencies from other objects or infrastructure. As a consequence artifacts are characterized by the following basic principles: ●

●

Self-representation: the digital representation of artifact’s physical properties is in tight association to its tangible self. Functional autonomy: artifacts function independently of the existence of other artifacts.

We have designed GAS (the Gadgetware Architectural Style), as a conceptual and technological framework for describing and manipulating UbiComp applications [9]. It consists of a set of architecture descriptions (syntactic domain) and a set of guidelines for their interpretation (semantic domain). GAS extends componentbased architectures to the realm of tangible objects and combines a software architectural style with guidelines on how to physically design and manipulate artifacts. For the end-user, this model can serve as a high level task interface; for the developer, it can serve as a domain model and a methodology. In both cases, it can be used as a communication medium, which people can understand, and by using it they can manipulate the “invisible computers” within their environment. GAS defines a vocabulary of entities and functions (e.g. plugs, synapses etc.), a set of configuration rules (for interactively establishing associations between artifacts), and a technical infrastructure (the GAS middleware). Parts of GAS lie with the artifact manufacturers in the form of design guidelines and APIs, with people-composers in the form of configuration rules and constraints for composing artifact societies and with the collaboration logic of artifacts in the form of communication protocol semantics and algorithms.

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5


Application Engineering Paradigm

To achieve the desired collective functionality, based on the GAS architectural style, one forms synapses by associating compatible plugs, thus composing applications using entities as components. Two levels of plug compatibility exist: Direction and data type compatibility. According to direction compatibility output or I/O plugs can only be connected to input or I/O plugs. According to Data type compatibility, plugs must have the same data type to be connected via a synapse. However, this is a restriction that can be bypassed using value mapping in a synapse. No other limitation exists in making a synapse. Although this may result in the fact that meaningless synapses are allowed, it has the advantage of letting the user create associations and cause the emergence of new behaviors that the artifact manufacturer may never consider. Meaningless synapses can also be seen as having much in common with runtime errors in a program, where the program may be compiled correctly but it does not manifest the behavior desired by the programmer. The idea of building UbiComp applications out of components is possible only in the context of a supporting component framework that acts as a middleware. The kernel of such a middleware is designed to support basic functionality such as accepting and dispatching messages, managing local hardware resources (sensors/ actuators), plug/synapse interoperability and a semantic service discovery protocol.

5.1

Synapse-Based Programming

The introduction of synapse-based programming has been driven mainly by the introduction of the previously discussed enabling paradigm, component software. Traditional software programs have followed the procedure call paradigm, where the procedure is the central abstraction called by a client to accomplish a specific service. Programming in this paradigm requires that the client has intimate knowledge about the procedures (services) provided by the server. However, this kind of knowledge is not possible in an ambient ecology because it is based on artifacts that may come from different vendors and were separately developed. That is why ambient ecology programming requires a new programming paradigm, which we have called synapse-based programming. In synapse-based programming, synapses between artifacts are not implicitly defined by procedure calls but are explicitly programmed. Synapses represent the glue that binds together interfaces of different artifacts. The basis for synapse-based programming is typically, the so-called, Observer design pattern [18]. The Observer pattern defines a one-to-many dependency between a subject object and any number of observer objects so that when the subject object changes state, all of its observer objects are notified and updated automatically. This kind of interaction is also known as publish/subscribe. The subject is the publisher of notifications. It sends out these notifications without having to know who its observers are.


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Fig. 9.2 Publish/subscribe model for implementing synapses

The strength of this event-based interaction style lies in the full decoupling in time, space and synchronization between publishers and subscribers [19]. Thus the relationship between subject and observer can be established at run time and this gives a lot more programming flexibility. In a UbiComp space (see for example the scenario outlined in Section 1.1), the Observer pattern can be applied as in the following diagram (see Fig. 9.2). The Coffee Maker, Blinds, and MP3 player are the observer objects. The Alarm Clock is the subject object. The Alarm Clock object notifies its observers whenever an awake event occurs to initiate the appropriate service. The observer pattern works like a subscription mechanism that handles callbacks upon the occurrence of events. Artifacts interested in an event that could occur in another artifact can register a callback procedure with this artifact. This procedure is called every time the event of interest occurs. The typical interfaces of software components have to be tailored for synapse-based programming — they have to provide subscription functions for all internal events that might be of interest to external artifacts. This part of the interface is often called the outgoing interface (associated with output plugs) of an artifact, as opposed to its incoming interface (associated with input plugs) that consists of all callable service procedures.

5.2

An Example

The following example refers to the motivating scenario discussed earlier in Section 1.1. Fig. 9.3 depicts the internal structure of a composite artifact with the constituent artifacts, their properties and the established synapses. The composition uses two source artifacts (eBook, eChair), one sink artifact (eDeskLamp) and one simple artifact (eDesk). The interconnection is accomplished with three synapses between properties of the constituent artifacts. For example, the ReadingActivity property associated with a eDesk artifact depends on the input properties defined as

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Fig. 9.3 An artifact composition implementing a UbiComp application

BookOnTop and ChairInFront; the later have been derived as relational properties between eDesk and the pair of eBook and eChair artifacts, respectively (see Figure 9-3). This example illustrates the definition of a simple UbiComp application that we may call the eStudy application. The scenario that is implemented is as follows: when the particular chair is near the desk and someone is sitting on it and a book is on the desk and the book is open then we may infer that a reading activity is taking place and we adjust the lamp intensity according to the luminosity on the book surface. The properties and plugs of these artifacts are manifested to a user via the UbiComp Application editor tool [20], an end-user tool that acts as the mediator between the plug/synapse conceptual model and the actual system. Using this tool the user can combine the most appropriate plugs into functioning synapses as shown in Fig. 9.3. Fig. 9.4 depicts the statechart diagram modelling the behavior of the participating artifacts in the eStudy. States and transitions for each artifact are shown as well as the use of superstates for modelling the behavior of the ambient ecology as a whole. Note that the modelling of the behavior of the artifact/ambient ecology helps us to decide upon the distribution of properties to artifacts and the establishment of

do / opened=FALSE

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9 Achieving Co-Operation and Developing Smart Behavior 223

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synapses. For example, the states that refer to a relational property, like the ChairInFront property, identify the end-point plugs of a synapse. An example of an execution scenario for the above application may have the following sequence of states (the latest defined property is given as underlined): k0: {eChair.Occupancy = TRUE; all other properties undefined} Propagation applies for the Occupancy property k1: {eChair.Occupancy = TRUE; eBook.Opened = TRUE; all other properties undefined} Propagation applies for the Opened property k2: {eChair.Occupancy = TRUE; eBook.Opened =TRUE; eDesk.ChairInFront = TRUE; all other properties undefined} Derivation applies for the ChairInFront, property based on the propagated Occupancy property k3: {eChair.Occupancy = TRUE; eBook.Opened =TRUE; eDesk.ChairInFront = TRUE; eDesk.BookOnTop = TRUE; all other properties undefined} Derivation applies for the BookOnTop property based on the propagated Opened property k4: {eChair.Occupancy = TRUE; eBook.Opened = TRUE; eDesk.ChairInFront = TRUE; eDesk.BookOnTop = TRUE; eDesk.ReadingActivity = TRUE;} Evaluation applies for the ReadingActivity property based on a simple rule-based formula. k5: {eChair.Occupancy = TRUE; eBook.Opened = TRUE; eDesk.ChairInFront = TRUE; eDesk.BookOnTop = TRUE; eDesk.ReadingActivity = TRUE; eDeskLamp.Light = On}; Derivation applies for the Light property based on the propagated ReadingActivity property. Although the above example is rather simple, it does demonstrate many of the features of our definitions. From the example, we see that composite artifacts provide an abstraction mechanism for dealing with the complexity of a component-based application. In a sense a composite artifact realises the notion of a “program”, that is we can build a UbiComp application by constructing a composite artifact.

6 6.1

The Supporting Framework GAS-OS Middleware

To implement and test the concepts presented in the previous sections we have introduced the GAS-OS middleware, which provides UbiComp application designers and developers with a runtime environment to build applications from artifact components. We assume that a process for turning an object into artifact has been followed [17]. Broadly it will consist of two phases: a) embedding the hardware


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modules into the object and b) installing the software modules that will determine its functionality. The outline of the GAS-OS architecture is shown in Fig. 9.5 (adopted from [21], where it is presented in more detail). The GAS-OS kernel is designed to support accepting and dispatching of messages, managing local hardware resources (sensors/ actuators), and implementing the plug/synapse interaction mechanism. The kernel is also capable of managing service and artifact discovery messages in order to facilitate the formation of the proper synapses. The GAS-OS kernel encompasses a P2P Communication Module, a Process Manager, a State Variable Manager, and a Property Evaluator module which are briefly explained in Table 9.1. Extending the functionality of the GAS-OS kernel can be achieved through plug-ins, which can be easily incorporated into an artifact running GAS-OS, via the plug-in manager. Using ontologies, for example, and the ontology manager plug-in all artifacts can use a commonly understood vocabulary of services and capabilities in order to mask heterogeneity in context understanding and real-world models [22]. In that way, high-level descriptions of services and resources are possible independent of the context of a specific application, facilitating the exchange of information between heterogeneous artifacts as well as the discovery of services. GAS-OS can be considered as a component framework, which determines the interfaces that components may have and the rules governing their composition. GAS-OS manages resources shared by artifacts and provides the underlying mechanisms that enable communication (interaction) between artifacts. For example, the proposed concept supports encapsulation of the internal structure of an artifact and provides the means for composition of an application, without having to access any of the code that implements the interface. Thus, our approach provides a clear separation between computational and compositional aspects of an application, leaving

UbiComp Applications

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Ontology

Security Manager plug-in (SM)

Ontology Manager plug-in (OM)

Learning Module plug-in (LM)

GAS-OS plug-ins

Plug-in Manager Rule base

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Communication Module (CM) Fig. 9.5 GAS-OS modular architecture

State Variable Manager (SVM)

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Table 9.1 Modules in the GAS-OS Kernel Module

Explanation

Communication Module (CM) Process Manager (PM)

The P2P Communication Module is responsible for application-level communication between the various GAS-OS nodes. The Process Manager is the coordinator module of GAS-OS and the main function of this module is to monitor and execute the reaction rules defined by the supported applications. These rules define how and when the infrastructure should react to changes in the environment. Furthermore, it is responsible for handling the memory resources of an artifact and caching information from other artifacts to improve communication performance when service discovery is required. The State Variable Manager handles the runtime storage of the artifacts’ state variable values, reflecting both the hardware environment (sensors/actuators) at each particular moment (primitive properties), and properties that are evaluated based on sensory data and P2P communicated data (composite properties). The Property Evaluator is responsible for the evaluation of the artifacts’ composite properties according to its Functional Schema. In its typical form the Property Evaluator is based on a set of rules that govern artifact transition from one state to another. The rule management can be separated from the evaluation logic by using a high-level rule language and a translator that translates high-level rule specifications to XML, which can be exploited then by the evaluation logic.

State Variable Manager (SVM)

Property Evaluator (PE)

the second task to ordinary people, while the first can be undertaken by experienced designers or engineers. The benefit of this approach is that, to a large extent, the systems design is already done, because the domain and system concepts are specified in the generic architecture; all people have to do is realize specific instances of the system. Composition achieves adaptability and evolution: a component-based application can be reconfigured with low cost to meet new requirements. The possibility to reuse devices for numerous purposes - not all accounted for during their design provides opportunities for emergent uses of ubiquitous devices, where this emergence results from actual use.

6.2

ECA rule modeling pattern

Event-Condition-Action (ECA) rules have been used to describe the behavior of active databases [23]. An active database is a database system that carries out prescribed actions in response to a generated event inside or outside of the database. An ECA rule consists of the following three parts: ● ● ●

Event (E): occurring event Condition (C): conditions for executing actions Action (A): operations to be carried out


227

An ECA rule modeling pattern is employed to support autonomous interaction between artifacts that are represented as components in a UbiComp environment. The rules are embedded in the artifacts, which invoke appropriate services in the environment when the rules are triggered by some internal or external event. Following this design pattern, the applications hold the logic that specifies the conditions under which actions are to be triggered. The conditions are specified in terms of correlation of events. Events are specified up front and types of events are defined in the ontology. The Process Manager (PM) subscribes to events (specified in applications logic) and the Property Evaluator (PE) generates events based on data supplied by the State Variable Manager (SVM) and notifies the Process Manager when the subscribed events occur. When the conditions hold, the Process Manager performs the specified actions, which could consist of, for example, sending messages through the P2P Communication Module (CM) and/or request an external service (e.g., toggling irrigation, calling a Web service, etc.). Consider, as an example, the smart plant application discussed in Section 1.1, which enables interactions similar to communication between plants and people. The main artifact is the ePlant. The ePlant decides whether it needs water or not using its sensors readings (e.g. thermistors and soil moisture probe) and the appropriate application logic incorporated in it. A second artifact is a set of keys that is “aware” as to whether it is in the house or not. If we assume that the user always carries her keys when leaving home then the keys can give us information about whether the user is at home or not. User presence at home can be determined by using the Crossbow MICA2Dot mote [24] placed in the user’s key-fold. When the user is at home, any signal from the mote can be detected by a base station and interpreted as presence. Fig. 9.6 depicts the flow of information between the middleware components applying the ECA pattern. The ECA rule defined for the ePlant artifact in the above application is: ● ● ●

E: PlantDryEvent C1: location = HOME A1:SendNotifyRequest(DRY_PLANT) C2: location != HOME A2:SendSMSRequest(DRY_PLANT)

The Location Plug actor in Figure 9-6 represents the user location context supplied by the key artifact. The application requires interaction with a couple of artifacts that will respond to the requests produced by the ePlant artifact, such as a notification device (e.g. TV, MP3 player) and a mobile phone for sending/receiving SMS messages corresponding to the DRY_PLANT code. By employing an ECA rule modeling pattern we can program applications easily and intuitively through a visual programming rule-editing tool. We can modify the application logic dynamically since the application logic is described as a set of ECA rules and each rule is stored independently in an artifact.

3: User Location

2: Soil Moisture Measurements

Sensor Device Sensor Device 1: Temperature Measurements

Fig. 9.6 Interaction sequence in the smart plant application

Location Plug

alt

6: User Location

ePlant_CM: CM

7: Handle Event

9: Send SMS Request

[else]

8: Send Notify Request

[location=HOME]

ePlant_PM: PM

5: Plant Dry Event

ePlant_PE: PE

4: Measurements

ePlant_SVM: SVM

228 C. Goumopoulos, A. Kameas


6.3

229

Tools

A toolbox complements this framework and facilitates management and monitoring of artifacts, as well as other identified eEntities, which when collectively operating, define UbiComp applications. The following tools have been implemented: ●

●

●

The Interaction Editor, which administers the flexible configuration and reconfiguration of UbiComp applications by graphically managing the composition of artifacts into ambient ecologies, the interactions between them, in the form of logical communication channels and the initiation of the applications (see Figure 9-3); The Supervisor Logic and Data Acquisition Tool (SLADA), which can be used to view knowledge represented into the Ontology, monitor artifact/ecology parameters and manage dynamically the rules taking part in the decision-making process in co-operation with the rule editor; The Rule Editor, which provides a Graphical Design Interface for managing rules, based on a user friendly node connection model. The advantage of this approach is that rules will be changed dynamically without disturbing the operation of the rest of the system and this can be done in a high-level manner.

In Fig. 9.7 we show as an example the design of the NotifyUserThroughNabaztag rule for the wish-for-walk awareness application defined as part of our motivating scenario (see Section 1.1). The rule consists of two conditions combined with an AND gate. The first condition checks the ‘wish-for-walk’ incoming awareness state. The second condition checks whether the user to be notified is in the living room (this state is inferred by an artifact - an instrumented couch). The rule, as designed, states that when the conditions are met that the user will be presented with the awareness information through an artifact, called Nabaztag, as this object will be probably in his/her field of vision. Using a rule editor for defining application business rules emphasizes system flexibility and run-time adaptability. In that sense, our system architecture can be regarded as a reflective architecture that can be adapted dynamically to new requirements. The decision-making rules can be configured by users external to the execution of the system. End-users may change the rules without writing new code. This can reduce the time-to-production of new ideas and applications to a few minutes. Therefore, the power to customize the system is placed in the hands of those who have the knowledge/need to do it effectively.

6.4

Implementation

The prototype of GAS-OS has been implemented in J2ME (Java 2 Micro Edition) CLDC1 (Connected Limited Device Configuration), which is a very low-footprint 1

java.sun.com/products/cldc

Fig. 9.7 Designing the ‘NotifyUserThroughNabaztag’ rule for the wish-for-walk awareness application

230 C. Goumopoulos, A. Kameas


231

Java runtime environment. The proliferation of end-systems, as well as typical computers capable of executing Java, make Java a suitable underlying layer providing a uniform abstraction for our middleware. The use of Java as the platform for the middleware decouples GAS-OS from typical operations like memory management, networking, and so forth. Furthermore, it facilitates deployment on a wide range of devices from mobile phones and PDAs to specialized Java processors. Up to now, GAS-OS has been tested in laptops, IPAQs, in the EJC (Embedded Java Controller) board2 and on a SNAP board3. Both EJC and SNAP boards are network-ready, Java-powered plug and play computing platforms designed for use in embedded computing applications. The EJC system is based on a 32-bit ARM720T processor running at 74 MHz and has up to 64Mb SDDRAM. The SNAP device has a Cjip microprocessor developed by Imsys which has been designed for networked, Java-based control. It runs at 80 MHz and has 8 Mb SDDRAM. The main purpose of programming our middleware to run on these types of boards was to demonstrate that the system was able to run on small embedded-internet devices. The artifacts communicate using wired/wireless Ethernet, overlaid with TCP/IP and UPnP (Universal Plug and Play) middleware programmed in Java. The inference engine of the Property Evaluator is similar to a simple Prolog interpreter that operates on rules and facts and uses backward-chaining with depth-first search as its inference algorithm. We have implemented a lightweight Resource Discovery Protocol for eEntities (eRDP) where the term resource is used as a generalization of the term service. eRDP is a protocol for advertisement and location of network/device resources. There are three actors involved in the eRDP: 1. the Resource Consumer (RC), an artifact that has need for a resource, possibly with specific attributes and initiating for that purpose a resource discovery process, 2. the Resource Provider (RP): an artifact that provides a resource and also advertises the location and attributes of the resource to the Resource Directory, provided that there is one, 3. the Resource Directory (RD): an artifact that aggregates resource information into a repository on behalf of artifacts that are less equipped. The Resource Directory (RD) is an optional component of the discovery protocol and its aim is to improve the performance of the protocol. In the absence of an RD, the Resource Consumers (RC) and Resource Providers (RP) implement all of the functions of the RD with multicast/broadcast messages, with the optional and undeterministic use of resource cache within each artifact. When one or more RDs are present (see Fig. 9.8), the protocol is more efficient, as an RC or RP uses unicast messages to the RDs.

2 3

www.embedded-web.com/ www.imsys.se/documentation/manuals/snap_spec.pdf

232

C. Goumopoulos, A. Kameas Resource Directory (RD)

Resource Provider (RP)

REQUEST(RD) RD_ADVERTISE(RD_spec) PUBLISH(res_spec)

Resource Consumer (RC)

REQUEST(RD) RD_ADVERTISE(RD_spec)

unicast

REQUEST(res_class, attr) multicast/broadcast

ACKNOWLEDGE (status) REPLY(res_spec)

Fig. 9.8 eRDP with a RD facility

eDeskLamp light eRDP:PLUG:CTI-eDLamp-ONOFF_PLUG 150.140.30.5

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