.
IEEE Nuclear and Space Radiation Effects Conference
Short Course
Advanced Qualification Techniques; A Practical Guide for Radiation Testing of Electronics
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July 17, 1995 Holiday Inn Madison, Wisconsin
Sponsored by IEEE NPSS Radiation
Effects
Committee **>
Cosponsored by Defense Nuclear Agency/DoD Sandia National Laboratories/DOE Phillips Laboratory/USAF Jet Propulsion Laboratory/NASA
[&) MADISON
1995 IEEE Nuclear and Space Radiation Effects Conference
Short Course
Advanced Qualification Techniques; A Practical Guide for Radiation Testing of Electronics
Ju1y 17,1995 Holiday Inn Madison, Wisconsin
Copyright@ 1995 by the Institute of Electrical and Electronics Engineers, Inc. All rights reserved. Instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. For all other copying, reprint, or replication permission, write to Copyrights and Permission Department, IEEE Publishing Services, 445 Hoes Lane, Piscatawav, NJ, 08855-1331.
TABLE OF CONTENTS
SECTION I Foreword . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I 1-4 James R. Schwank, Sandia National Laboratories SECTION II SINGLE-EVENT EFFECTS QUALIFICATION William J. Stapor, Naval Research Laboratory
. . . . . . . . . . . . . . . . . . . . . . . . II 1-68
SECTION III A FIRST-PRINCIPLES APPROACH TO TOTAL-DOSE HARDNESS ASSURANCE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . III 1-69 Daniel M. Fleetwood, Sandia National Laboratories SECTION IV ADVANCED TEST METHODOLOGIES Nick van Vonno, Harris Corporation
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . IV 1-55
SECTION V QUALIFICATION FROM THE BUYER’S PERSPECTIVE Lee Mendoza, The Aerospace Corporation
. . . . . . . . . . . . . . V 1-44
1995 NSREC SHORT COURSE
(J@&-) MADISON
FOREWORD This is the 16th year that a Short Course has been offered at the Nuclear and Space Radiation Effects Conference (NSREC). The Short Course format provides an opportunity to cover topics in considerably more depth than is possible by individual contributed papers. The themes of the Short Courses have varied over the years reflecting the important subject areas of the time. The theme of the 1995 Short Course is Advanced Qualijkation Techniques: A Practical Guide for Radiation Testing of Electronics for radiation-hzu-dened and commercial systems. This Short Course is intended to be a practical guideline, giving students the background, and know-how to test and qualify present-day and future electronic devices using reliable, costeffective techniques. The development of hardness assurance and qualification testing techniques is a rapidly evolving area. As more emphasis is placed on the use of commercial devices in military systems and the margin between device capability and system requirements becomes increasingly less, knowledge of practical and reliable testing and qualification techniques and their implementation becomes increasingly more important. This year’s Short Course addresses those radiation testing techniques which guarantee that only the most radiationtolerant parts are used in our spacecraft systems. This timely theme should be of interest to attendees having a wide spectrum of backgrounds, from those interested in the mechanisms of radiation effects to users and buyers of electronic components and systems. The course is divided into four sections. The first section, Single-Event Effects Qualification, will emphasize techniques for qualifying electronic devices and integrated circuits for singleevent effects. It will start with an overview of the space environment and how it relates to singleevent effects. Cosmic particles and trapped particles in the earth’s radiation belts can cause softerror upset and hard errors in an integrated circuit. Students will learn about what ground-based measurement sources are available for simulating Single-Event Effects (SEE), their uses, and their limitations, Students will next learn about methods for predicting SEE. This is an area of considerable importance due to the complexity of today’s devices and the variability in radiation environments. Hardness assurance test methods presently available will be discussed. This segment will end with a discussion of problems and trends for future SEE testing. The second section, A Fi.mt+rinciples Approach to Total-Dose Hardness Assurance, will emphasize total-dose hardness assurance techniques for qualifying electronic devices and integrated circuits. It will start with a description of several radiation environments with varying total-dose requirements. The student will then learn of laboratory radiation sources used to simulate and test for total-dose effects. Students will learn of time-dependent effects and device response and failure modes. This knowledge is essential in order to correlate laboratory measurements to system requirements. Present-day test methods will be discussed. This segment will end with an overview of possible non-destructive tests and future trends for hardness assurance testing. The third section, Advanced Test Methodologies, is divided into two parts. The first part is an overview of traditional approaches to qualification testing. In addition to issues such as wafer-
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level testing and screening for latchup and burnout, students will also learn of the special case of testing and quali&ing cryogenic electronics. The second part is on advanced approaches to electronics qualification testing. In this part, students will learn of advanced approaches that can result in substantial savings in cost and time in qualification testing, including the qualified manufacturers list (QML) methodology. The difllcult issue of how to quali~ VLSI components will also be covered. This section will end with a discussion of future trends for hardness assurance testing and the impact of commercial off-the-shelf (COTS) mandates. The fourth section, Qz.uzli@ztionjiom the Buyer’s Perspective, will cover qualification from the buyer’s perspective. This perspective presents different problems from that of the device engineer or manufacturer. The student will first learn how to choose parts to meet system requirements. This can often be a difficult problem considering the wide variety of available parts and test methods for qualification. Due to their lower costs, commercial devices are seeing increased use in military and space systems, Students will learn of the tradeoffs between commercial and radiation-hardened devices. This section will end with several case histories of real system failures caused by radiation-induced part degradation. I would personally like to thank the four authors Bill Stapor, Dan Fleetwood, Nick van Vonno, and Lee Mendoza for the effort they have made in putting this Short Course together. A great deal of pecsonal time and sacrifice is required for assembling and writing the Short Course manuscript and preparing the Short Course presentation. Only those who have endeavored to undertake such a task can appreciate the intense labor that is involved. The authors have done an exceptional job in putting together this Short Course. I also thank Lew Cohn for his efforts in ensuring that the Short Course notebook was printed on time and the DNA Printing OffIce for printing the notebook, Without their efforts, this Short Course notebook would not have been possible.
James R, Schwank Albuquerque, New Mexico
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Biographies James R. Schwank Short Course Organizer Sandia National Laboratories James R. Schwank received his B. S., M. S. and Ph. D. degrees in electrical engineering at the University of California at Los Angeles in 1970, 1974, and 1978, respectively. He joined Sandia National Laboratories in 1979 where he is a senior member of the technical staff. At Sandia, he has been involved in numerous studies investigating the mechanisms of radiation effects in semiconductor devices, in developing techniques for improving the radiation hardness of MOS devices, and in hardness assurance activities. Dr. Schwank has served the NSREC as short course instructor, publicity chairman, session chairman, and reviewer, and the Hardened Electronics and Radiation Technology (HEART) Conference as technical program chairman, guest editor, associate guest editor, and session chairman. He has won six outstanding or meritorious conference paper awards and has authored more than 65 papers on radiation effects in electronic devices. Dr. Schwan.k is a Fellow of the IEEE. William J. Stapor Naval Research Laboratory William J. Stapr has a B. S. in physics from William and Mary, Williamsburg, Virgini% and an M. S. and Ph. D. in nuclear physics from The Catholic University of America, Washington, D. C. He initially worked for a while in the photonuclear physics community making high-energyelectron scattering measurements of nuclear charge distributions. He has worked in the radiation effects area for over eleven years at the Naval Research Laboratory, Washington, D. C., in the Radiation Dynamics Section of the Radiation Effects Branch, specializing in single event effects in microelectronics. Dr. Stapor is presently the Defense Nuclear Agency Program Advisory Reviewer for the single event task area. He has chaired the last two Single Event Symposia held every two years in the Los Angeles area. He performs basic research and development as well as performing practical engineering consulting to the spacecraft community. Dr. Stapor has authored and co-authored over 45 publications. Daniel M. Fketwood Sandia National Laboratories Daniel M. Fleetwood received his B. S,, M. S., and Ph. D. degrees in physics from Purdue University in 1980, 1981, and 1984, respectively. There he received the Lark-Horovitz Award for his work on l/~ noise in metals. Dan joined Sandia National Laboratories’ Advanced Microelectronics Development Department in 1984, and moved to the Radiation Technology and Assurance Department in 1986. He was named a Distinguished Member of the Technical Staff in 1990. He has authored more than 110 papem on radiation effects and Iv noise in microelectronics and has received seven outstanding or meritorious conference paper awards. Dan has served the IEEE NSREC as guest editor, poster session chairman, session chairman, and He presently is vice-chairman for publications and technical technical program chairman.
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program on the radiation effects steering group. Dan is a senior member of IEEE and a member of The American Physical Society, Phi Beta Kappa, Phi Kappa Phi, and Sigma Pi Sigma. Nick van Vonno Harris Corporation Nick van Vonno received his B. S, degree in electrical engineering from the University of Florida in 1966. Upon graduation, he joined Radiation, Incorporated (now Harris Corporation). After initial assignments in reliability engineering, he moved to process development and device engineering with participation in both bipolar and CMOS projects. Later responsibilities were in the design, development, and production of htidened analog components on a variety of strategic programs. Specific areas of interest included mixed-signal design, cryogenic CMOS process development, and SOI technology. Mr. van Vonno has been active in NSREC affairs. He served as session chairman of Isolation Technologies and Poster sessions, and was guest editor for the 1992 conference and awards chairman in 1994. He has authored over 20 technical publications in the field of hardened component design and processing and is a senior member of IEEE. Lee Mendoza The Aerospace Corporation Lee Mendoza received his B. S. degree in applied mathematics and physics from the University of Wisconsi~waukee in 1978 and his M. S. in physics from the University of California at Los Angeles in 1980. He has been employed by The Aerospace Corporation since 1980, currently as the lead project engineer for the Early Warning Systems Program Technology Office. Mr. Mendoza has provided systems engineering and integration support in on-board processing systems and technologies for the Boost Surveillance and Tracking System (BSTS), Advanced Warning System (AWS), and Follow-on Early Warning System (FEWS) programs. In the technology office, he has had a strong role in the development of 32-bit radiation-hardened processors and memories. He has also been very active in the Qualified Manufacturers List (QML) program as an auditor at QML Validation reviews,
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1995 NSREC SHORT COURSE
/. ., (4iiii+ “’” -- :4
*
NSREC ’95 MADISON
SINGLE EVENT EFFECTS (SEE) QUALIFICATION
William Naval
J. Stapor
Research
Washington,
Laboratory DC
20375
This work was supported in part by the Naval Research Laboratory. II-1
SI-NtiLM MVMN”l’J!XNJ!L..-lS (SM!J QUA.JJFICATKJN WILLIAM J STAPOR NAVAL RESEARCH LABORATORY WASHINGTON DC 20375 1.0
2.0
3.0
4.0
5.0 6.0
7.0
Introduction 1.1 SEE Chronology and Definitions 1.2 Concept of Cross Section Single Event Effects (SEE) and the Space Environment Ground Based M easurements 3.1 Accelerators and Ions 3.1.1 Protons 3.1.2 Heavy Ions 3.2 Procedures to Collect Data at the Accelerator 3.3 Laborato Simulators and Tools Y 25 Cf 3.3.1 3.3.2 PUkd Lasers 3.3.3 Microbeams 3.4 Procedures to Collect Data Using Simulator Tools Prediction of SEE Rates 4.1 Methodologies 4.2 Commercial Modeling Codes (CREME, Space lladiatio~ etc.) 4.3 Problems with the Predictions (Realism, Enviromnen~ Statistics, etc.) 4.4 Issues in Single Event Rates 4.4.1 Discrete Devices, Components, Circuits, Systems 4.4.2 Level of SEE Rate Tolerance 4.4.3 SEE Hardening and/or Mitigation Hardness ksurance Test Methods Future Trends 6.1 Increased Device and System Complexity 6.2 -c and Static Operation Better Environmental Models 6.3 6.4 Meaningful Ground Data 6.5 Meaningfid Space Data Conclusions 1.0 INTRODUCTION
Single events have played and continue to nuclear and space radiation effects. As a simple Transactions on Nuclear Science December issues this conference) from the past 15 years beginning II-3
play a major role in the business of measure, let us consider the IEEE (notably the premier publication of with 1980. The single event papers
from only the Single Event specified sessions have strongly averaged nearly 18 + 4 papers out of 100 * 18 papers (or about 18% at least) with a slight increase (0.4 papers per year) and no obvious decline in sight. At this conference last year, the single event session was split in two, and this year there are three single event sessions (NonDestructive Single-Event Effects, Destructive Single-Event Effects, and Space SingleEvent Effects) to accommodate the increasing number of papers. One can readily see how large this role has bee~ and we have not even considered the European IL4DECS or the LA Single Event Effects (SEE) Symposia. Clearly this average 18% mark indicates that single events have held significant importance to our community and to the aerospace community in general. Believer, or skeptic, single events from nuclear and space radiations are real and ultimately unavoidable in nature, especially as we enter a new age utilizing more “commercial technological stufl” that was not originally conceived or developed with single events in mind. The challenge is to determine what to do with these effects so that low cost, high petiorrnance, advanced technologies become realities to the aerospace applications. Speaking of aerospace applications, anything is to fly it successfi.dly. Table 1 have “qualified” single event effects, some reader already knows of others where single
the only real way to ultimately “quali~’ contains a list of some space programs that more successfi.d.ly than others. Perhaps the events have been an issue.
Table 1: List of actual space programs that have “qualified” single events. SINGLE GALl LEO IANDSAT TDRS I(JS DSCS NAVSTAWGPS PIONEER VENUS SDS INTELSAT IV VOYAGER
EVENT
UPSETS
OBSERVED
SHUITLE HUT SPACE TELESCOPE OPEN AMTE GEOSAT SMM DMSP TIROS N LES8 & 9
IN SPACE CRRES ERS-1 ETS-V LEASAT METEOSAT-3 HUBBLE UOSAT CENTAUR MAGELIAN CLEMENTINE
This portion of the short course concentrates on single event effects qualification techniques. It directly addresses our challenge, ‘what to do.’ No previous knowledge in this area is required to understand or participate in this part of the short course, because the problem area is described in a general way, without pedantic details, however, with emphasis on practical effort. It will become evident that this stuff on single events (especially when considering SEE qualification techniques) is arbitrarily complicated and therefore difficult, if not impossible to understand. In a problem area so widely varied and rapidly changing in parameter space, it is possible that there are no “experts.” There are only “damned fools” and “novices,” (and I’m no novice). A reasonable goal of this
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SEE discussion is to give the short course students a clear overview of the general SEE problem so that they maybe at least able to take appropriate steps when investigating and solving SEE problems and issues. This discussion begins with some brief definitions or really descriptions of the classically accepted single event effects followed by the importance of the concept of cross section to the single events problem. Everything else that follows will lead the student (hopefidly) to an awareness of ‘what to do’ for single events. We will very briefly look at the space environment as it relates to single events to make all aware of the various regions and sources. There is great complexity to the space environment. It is not homogeneous, isotropic, or even static which greatly complicates the SEE problem. Next we will investigate what I consider to be the most essential part of SEE qualificatio~ the ground based measurements and discussion on various sinndations of radiations for single events. The ground based tools are essential to ultimately be able to predict or determine the scope of single event type problems in radiation environments. A discussion on the prediction of single events will follow with the intent to bring awareness of different methodologies emphasizing practicality. Afler these first four sections, the discussion will turn to description of existing documentation, guides, and standards. These have served the community well, but may be over-ambitious in the attempt to “cookbook” the single event problem. And lastly, before the conclusion of this part of the short course, the discussion will be directed towards fiture trends and issues which will undoubtedly bring new challenges as materials, devices, integrated circuits, sub-systems and systems become ever more complex and diverse. In the most generic sense, single event effects may occur whenever charge is deposited in electronic devices by energetic ionizing radiation from outside or within the devices themselves. Before discussing specific single event effects details, there are really only two categories of single events that are meaningful, destructive and nondestructive. Destructive single events are not acceptable. Non-destructive single events can be trouble to any system, but usually, they can be tolerated or mitigated with some carefid considerations. The SEE qualification of anything requires knowledge of the destructive or non-destructive mture of the possible single event effects. If a particular SEE in any component or device is destructive, then the device must be eliminated from potential use in any system. If the single events effects in any component or device is non-destructive, then SEE qualification requires knowledge of scope of the problem so that designers can make reasonably accurate assessments of risk and impact to their desired performance. Ideally, we would like to build systems from parts that do not undergo SEE. However, the reality is that with present (and projected) technologies, SEE will occur in space systems and it behooves us, therefore, to attempt to understand the problem area and do the best we can to make our best technologies work in aerospace applications. Let us begin with a ftily extensive discussion on definitions and concepts. These are by no means complete or exact since the field of SEE study is so widely varied. They are meant to provide basic information to the starting point of the SEE Qualification process. At the II-5
same time this discussion is meant to give the reader a general idea of the overall variety and complexity of the problem. 1.1 SEE CHRONOLOGY
AND DEFINITIONS
It maybe useful to SEE novices (and perhaps entertaining to SEE experts) to look at SEE “definitions” and concepts in a historical manner. This is an attempt to put some substantial historical and technical reference well in our path before going into any qualification details. To start, Table 2 contains a list of some of the important SEE acronyms in the business with the associated brief descriptions and the year of earliest reference. This list is by no means complete, but is intended to give the reader some immediate idea of the multitude and complexity of possible single event effects and issues. The list largely contains the most common classical single events accepted by the community. The rest that follows are discussions containing the SEE acronym definitions (when invented), as well as concepts and important observations in chronological order. Included with each is a the earliest technical reference, a reasonable definition, and a brief discussion. Table 2: Single Event Effects acronym list. LIST OF SINGLE . SEU ● SEL
I
. SET
SINGLE EVENT
● SED . SEB
SINGLE EVENT SINGLE EVENT
●
SEGR
. SEMBE c SEIDC
EVENT
EFFECTS
IN MICROELECTRONICS
ACRONYM SINGLE EVENT UPSET SINGLE EVENT LATCHUP
SINGLE EVENT RUPTURE SINGLE EVENT ERROR SINGLE EVENT CURRENT
EFFECT BIT FLIP DIGITAL ELEMENT FAILURE IN CIRCUIT ] OPERATION TRANSIENT I CURRENT TRANSIENT IN DIGITAL OR ANALOG DISTURB BIT UNSTABLE EQUILIBRIUM BURNOUT DESTRUCTIVE BURNOUT OF A MOSFET GATE DESTRUCTIVE RUPTURE OF MNOS OR SNOS MEMORY MULTIPLE BIT MULTIPLE BIT ERROR FROM SINGLE EVENT INDUCED DARK DARK CURRENT INCREASE IN CCD
●
✎✎✎
✎✎✎
✎✎
●
SE?
SINGLE EVENT ?
NOT YET DISCOVERED
YEAR 1979 1979 1983 1984 1987 1987 1989 1989 ✎✎✎
199?
It is most interesting to note that the concept of the possibility of single particle induced effects in microelectronics was first speculated on in 1962, only 15 years after the invention of the bipolar transistor. Then it took another 15 years before single events were actually observed. This 30 year interval illustrates that the initial progress of a device technology towards smaller and denser circuits was relatively slow as compared to the rate of technology progress today. Let us begin with that 1962 speculation.
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1962- COSMIC-RAY UPSETSOFA4.lcmcnwurrs
[1]
Remonable definition A bit flip (upset) in a microcircuit ionization fi-om a heavy ion msrnic ray traversing the circuit.
caused by local
Jn a paper that was considerably ahead of its time, Wallmark and Marcus of RCA predicted in 1962 W as microcircuit feature sizes ccdnued to be made ever da, M point would be reached that microcircuits would start getting upset by the direct ionization of heavy ion cosmic ray tracks and by cmmic ray induced spallation reactions. They were, however, timed in @imat@ that feature sizes could not go much below 10 pm. This paper was largely overlooked until this effect actually started to be observed both on the ground and on orbit in the middle and late 1970’s. 1975- COSMC-IUY UPSETSN llrMLoP
Cntm
ONSPACESATELLITES[2]
Reasonable di?j?nition A cosmic ray upset is an upset in a microcimuit caused by the direct ionization of a heavy ion cosmic ray that has traversed the microcircuit. It is usually a bit error. Partly because the nurnlxr of upsets observed was d, the claim made in this paper by Binder et al., that the flipflop upsets were due to cosmic rays in the “iron grcq” was disputed by most radiation effi experts. The paper was remmkable in that it already showed how to calculate the rate at which cmm.bray upsets could be expected and in that the calculations reported therein were within a fhctor of two of the number of upsets tiy observed.
Reasonable akj?nition A soil error is a non-dam@ng emr in a microcircuit caused by local ionization from an a-particle, a heavy cosmic ray ion traversing tie microcircui~ or fim a nuclear reaction. It is usually a bit enor and maybe wrected if it is found. Random “soft emcq” began to appear as a serious reliability problem in large dynamic IL4Ms in the middle 1970’s. In 1978, May and Woods discovered that the cause of these random “soft errors” were trace amounts of alpha-particle-emitting uranium and thorium isotopes in the materials from which the microcircuits were made. The upsets did not permanently damage the RAMs aud so were called “soft errors.” Reports of this discovery reached the radiation effects cmn.munity and had an impact on it in 1978, i.e. before the paper was published in 1979. 1978- SINGLEPARTICLEErutoru [4],[5]
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Reasonable dejnition Single particle emors are those that are caused by the direct ionizxition iiom a single ionizing particle, such as an cz-parlicle or a heavy ion cosmic ray which has traversed the microcircuit This paper reported a model for calculating the cosmic ray bit error rate in an operating satellite memo~ which consisted of 24 NMOS RAMs, each with 4096 memory bits. The upsets were explained as being due to direct ionization from cosmic mys in the “aluminum” and “iron” groups. The number of upsets observed on this satellite was large enough to be convincing, and it was this paper that particularly alerted the space and nuclear radiation effkcts community to the existence of a new aad important radiation effect Also in a 1979 paper, Ziegler and Landford discussed the effkds of cmn.ic rays on computer memories and developed a scheme for calculating upset rates. 1979- SINGLEEVENTUPSETS(SET-I)[6] Reasonub2e dej%zition A single event upset is a bit flip in a digital element that has been caused either by the direct iotition from a traversing particle or by the ionization produced by charged particles and recoiling nuclei emitted from a nuclear reaction induced near the microcircuit element. Most ofte~ the upset is nondamaging and can be corrected if found. This paper reported upsets due to 14 MeV neutrons and 32 MeV protons in 4K and 16K dynamic NMOS IU4Ms. First upsets were observed at neutron fluences of 1E8 neutnms/cm2 and proton fluences also of 1E8 protons/cm2. In particular, the discove~ that dynamic FL4Ms were vulnerable to such low neutron fluences was startling at the time because dynamic RAMs were majority carrier devices and were expected to be hard to neuh-on fluences three to four orders of magpitude larger than the observed 1E8 neutrons/cm2. It was clear in these measurements that the neutron induced upsets had to be due to nuclear reactions such as the ?3i(La) 25Mg reaction in which case the ionization causing the upset would be due to the emitted energetic a-particle and the recoiling 25Mg nucleus. The term “single particle” was therefore not appropriate for such upsets. For the protons also, direct iotition could not produce enough charge to upset the microcircuit and a nuclear reaction had to be the cause. For these reasons the paper was entitled “Single Event Upset of Dynamic RAMS by Neutrons and Protons.” This was the first use of the term “Single Event UpseG (SEW,” and this term was quickly accepted and used in the radiation effects community. A 1980 paper by Campbell and Wolicki [7] fi.wther showed the inappropriateness of tie term “single particle” because the upsets reported in that paper were caused by single high energy photons which induced photodisintegration nuclear reactions in the silicon. (Note: This was the first paper that discovered a deleterious radiation effect caused by a single photon!) 1979- SINGLEEVENTLATCHUP(SEL) [8]
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Reasonable dij?nitiom A single event Iatchup is a circuit “latchup” (or nonfimctionality) caused by the local ionization from a traversing heavy ion or tlom a nuclear reactiom SEL can be nondestructive or destructive. In CMOS circuits sometimes an SEL can trigger large supply currents which can be &maging to bond wire attachment (or the semiconductor material itself) if the circuit is not protected by current limiting measures. A Iatchup maybe a serious system problem because latchups usually persist until power to the latched element is cycled. Kolasinski et al. reported the first obsemed SEL. This paper reports experiments that were performed with high energy heavy ions iiom an accelerator and was the first observation of heavy ion induced Iatchup. Since then SEL has been a ve~ important consideration in SEE performance for any space system. 1980- CMOS IUM COSMIC-RAYINDUCEDERROR-RATEANALYSIS[9] Reusonuble definition A detailed analysis model was developed for predicting the galactic cosmic-my induced bit-error rate in CMOS RAM devices. Although the 1975 Binder-Smith paper already contained a way of estimating cosmic-ray induced error rates, it was largely overlooked and did not influence the community. The Pickel and Blandford paper reported the development of the “CRIER” model descendants of which are still in use today. Their CRIER model used closed form expressions for a path-length distribution fimction through tie sensitive regions of a device and a l.iuear charge deposition spectrum for the cosmic ray environment to determine the bit error rate (errors per bit per day). 1980- ALPHAPARTICLEEFFWRS rNCHARGE-COUPLED IMAGESENSORS[10] Reasonable dejnitiom A change in the charge stored in individual pixels or cells due to the ionization produced by single alpha particles. This paper by Ko seems to be the first to look at single alpha particle efkcts in a CCD image sensor. The paper reports changes in the charge collected from individual cells as a result of single alpha “hits” and also reports overall total dose effkcts on dark current and charge transfer efficiency. 1981- CHARGEFUNNELING[1 1],[12],[13]
Reasonable dej?nition The extension of charge collection iiom an ionization track to a region beyond the original depletion depth is called a Wmnel” and the extra charge collection from this funnel is called “charge funneling.” The calculations in these papers showed that if an ion track traverses a reverse biased semiconductor junctio~ the density of ionization can be so high that the resulting current flow collapses the field across the junction aud the collection of charge from the rI-9
track reaches fhrther into the semiconductor than the original depletion region. The extension of the collection region is ulled a “fhnnel” or “field fi.mneling” and the collection of charge fbm this region is called “charge funneling.” The paper by Hsie~ Murley, and O’Brien caused considerable controversy at the time because many semiconductor experts refused to believe that a heavily ionized track could cause a field collapse and a resulting charge ‘Yiumeling” in a semiconductor. 1981- FAULTTOLERANTMmoms
FORSINGLEPARTICLERADIATIONEFFECTS1981 [14]
Reasonable a%finition Fault toleraut techniques such as error detection and cmection codes (EDAC) and spatial configurations (e.g. to avoid having adjacent charge collection volumes in the same digital word) can be used to reduce the impact of single particle upsets on memories. This paper addresses the use of fkult tolerant techniques (developed by the reliability community to rninimk effects from electrical noise, transients, etc.) The use of EDAC is mentioned. Also, the memory organization and computer protocols presented in the paper extend the suscqtibility reduction to latchup and to multiple soft or hard errors in a common memory “word.” It must be noted that there is a trade+ff in the use of EDAC techniques, i.e. there is a cast to performance. This performance cost is larger for larger bit error detection and mrrection schemes. Extensive sometimes caunot be used because the compromise is too great which renders the system or components ineffective by def&ating the @onnance advantages. Care must be taken to undmtand the EDAC tradedfs to performance. 1981- SINGLEEvmrr UPsm Reasonable single events.
m MICROPROCESSORS ANDLooIc DEVICES[15],[16]
akjinitio~
Upsets in microprocessors
snd logic devices caused by
W.E. Price et al. and C.S. Guenzer et al. were the first two papers to report SEUS in microprocessors. The Iirst ref~ce also observed upsets in combinatorial logic devices. This work was important because fault tolerant techniques such as EDAC codes could not be used in logic devices and the effects of single bit errors in logic devices could lead to disastrous consequences as, for example, if an instruction word or address change could turn on a thruster rocket on a space system. The Guenzer-Campbell-Shapiro paper reported that many of the errors caused the microprocessor to cease normal operations. This latter paper also was the iirst report of logic upsets in microprocessors from neutrons. 1981 - USE OF w ION MICROBEAMm Sm-mY SINGLEEvm’r UPSETSm MICROCIRCUITS [17],[18] Reasonable Definition. The use of an ion microh with dimensions as small as device cell sizes, fiwm an accelerator to study charge collection and SEUS in microcircuits.
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Van de =accelerator microbeams ranging in size from a 2.5 pm diameter hole uptoa250 ymbyllOO p.rnrectan@ar apertumwere usedtostudy single event upsets and charge cd.lection in microcircuits. The ions used were protons, helium ions (a-particles), snd nitrogen ions. Di.f&ent threshold energies and sensitivities were found for sense amplifiers, normal cell areas, snd inverted cell areas. This paper also reported for the first time that the sensitivity of microcircuits to single event upsets can be increased as a result of the accumulation of total dose in the device. 1982- UPsm ERRORDETECTION~
CO~ON
(EDAC) IIW_EGRATED Cmcurrs [19]
Remonable De@nition. Single event upsets in EDAC integmted circuits which are themselves supposed to detect and correct errors in other microcircuits. This paper reprted the first single event upsets in EDAC integrated circuits. This finding was important because, as mentioned earlier, EDAC circuits are themselves supposed to detect aud correct errors in other microcircuits. In memories, particularly, EDAC circuits and algorithms mu be designed to detect and correct even more than one error in a digital word. Two types of EDAC circuits were tes@ only one of them showed upsets with 40 MeV protons and neither type showed upsets with neutrons. If the circui@ that provides the error protection upsets itself, then obviously, there can be no confidence in the uhimate performance which maybe critical in some applications. This sort of _ points to an important area for SEE qualification in terms of using EDAC schemes. 1982- SNGLE Em
ERRORIwurm
CMOS RAM [20]
Reasonable Dejnition The circuit of a CMOS RAM was redesigned SEU sensitivity of the RAM was greatly reduced.
so that the
report of using resistive decoupling to decrease the sensitivity of a lli.s was the first RAM to single event upsets. Essentially this decoupling technique used the fhct that the charge collection puke from a single ionizing event was much fhster than the opemtion of the memory cell. By slowing down the response of the cell to a charge collection puke, the sensitivity of the cell to upset was greatly reduced while the normal operation of the cell was not a&cted.
1982- SEU Mm? SCALINGN VLSI DEVICES[21] Reusonuble Definition. In a given cosmic ray environmen~ microcircuit upset rates depend on device fsize and critical charge for upsetA simple method of calculating cosmic ray upset rates was developed. This method was then used to study upset mtes as a fi,mction of device size aud critical charge for upset. Although the critical charge was shown to decrease as a fimction of fwture size, perhaps surprisingly; for a given cosmic ray environment the error per bit per day did not
11-11
increase significantly as the fsize became smaller. Part of the reason for this eff’t is that as the fwture size decreases, the probability of a “hit” in the cell area decreases approximately as the square of the linear dimension decrease. 1983- SINGLEEvmrr Tmmslm
(SET) [22]
Reasonable Definition The km “Single Event Transients,” is so general as to de~ easy definition. It maybe usefid, however, to take as a particular meaning for this term the situation in which a single event charge collection at one location in a combinatorial logic circuit is propagated down a path (“pipe”) such that the actual upset occurs at a location at some distance from the original charge collection. In non-storage logic, voltage transients produced by a single ionizing event may propagate down a logical “pipe” to reverse the state of a latch “fed” by the “pipe.” The criteria for the propagation of the voltage transient are discussed in the paper. This paper by S.E. Diehl et al. examines the usefidness of resistive and capacitive SEU hardening techniques for logic circuits. 1983- SEU FIGUREOFMmrr [23] Reasonable Definition. An approximate calculation for the number of upsets per bit per day is given which uses tie cell area and the threshold LET for upset For a 10% wonst case differential spectrum in cosmic ray LET values, a threshold value of LET which can cause an SEU, and for the area of a device cell, a formula was derived which gives the approximate SEU error rate in errors per bit per day. This formul~ which is just an algebraic expression does not require the use of a computer program yet gives an etite of error rate tit has been found usefid by space system designers. 1984- SINGLEEVENTDIsm
(SED) ERRORS[24]
Reasonable Definition. An SED error is an error in a static IU4M cell which is initiated or disturbed by a single event ionization such that it will, by itself, return to its original state. In some high density static R4M designs, however, the disturbed state can last for milliseconds and a reading of the bit during that time will be erroneous. In some high density static RAM designs a memory bit can be misread for milliseconds after a single event interaction that disturbs it but does no~ finally, cause upset. Computer simulations demonstrate that disturb errors have critical charges less than or equal to those for logic upset, Errors due to “disturbs” cannot be prevented by resistive decoupling and elude single event error testing methods that are not designed to catch disturb errors. 1984- CHARGECOLLECTIONINMULTILAYERSTRUCTURES[25]
II -12
Reasonable Definition. Fast and slower charge collection measurements have been made on special layered device structures which are representative of CMOS and bipolar silicon semiconductor layers. Charge collection was studied in special layered device structures with micmbeams of ions of oxyg~ chlorine, and copper. The charge collected fi-om the various layers was studied as a function of ion type, energy, and angle of incidence. Both fast and slower charge collection was measured. For the first time, the existence of both polarities on a circuit node, after the passage of a charged particle, was seen in certain cases. The charge collection process was seen to be more complex than would have been expected form single junction measurements. The measurements also demonstrated the necessity of using at least nanosecond time resolution to look at the transient currents flowing in the device. 1984- SEU lUATEESTIMATESFORTHEEARTH’SPROTONBELTS[26] Reasonable De~nitiom A one-parameter model for predicting the SEU rate in the earth’s proton belts fi-om a measurement of the SEU cross section at a single proton energy. A one parameter model is developed that can estimate the SEU rates in the earth’s proton belts from a measurement of the proton induced SEU cross section at just one proton energy. The model is semi-empirical and comes km the observation that proton upsets are due to nuclear reactions which is an energy dependent phenomena. The one parameter in the model is related to the proton energy threshold to produce an upset. Later research determines that the one parameter model is inadequate for modern technologies and that a second parameter is required to make accurate proton upset rate predictions. [27],[28] 1985- IONTRACKSHUNTEFFECTSm MULTI-JUNCTIONSTRUCTURES1985 [29] Reasonable Definition, For heavy ion hits across multiple p-n junctions in bipolar transistcms and CMOS structures, a resistive ion track shunt was observed bridging two like conductivity regions, The dense ionization of a heavy ion track traversing multiple p-n junctions can cause the development of a resistive path or “shunt” between the layers traversed. It was found thai the charge collection at a given p-n junction is influenced and can even be changed in sign by voltages present at a second p-n junction when the ion track penetrates both junctions. This paper reports the first observation of such a “shunt.” 1987- LASER SIMULATIONOF SINGLE-EVENTUPSETS 1987 [30] Reasonable Definitionmicrocircuits.
A pulse picosecond laser was used to produce upsets in
This paper reported the first use of a picosecond laser to produce SEUS in microcircuits. Comparing the laser energy necessary for producing upsets showed that a
II -13
laser could measure circuit sensitivity to SEUS. Furthermore the small size of the laser spot could be used to ident@ single sensitive trausis-tors. 1987- SINGLEEvmr
EFFECTS(SEE) OR SINGLEEm
PHENOMENA(SEP)[31]
Reasonable Definition Single event effkcts or single event phenomena are the generic terms used to identi~ any observable effi in a microcircuit that can be attributed to the local ionization produced either by direct ionization or by a nuclear mwtion. When the first single event Iatchups wm obsemed it became obvious that the term “single event upsets” was no longer adequate and that a more generic term was needed to describe other effkcts or phenomena that could be caused by single local ionizing events. Single Event Phenomena or SEP came into use, as discussed above, in 1982, Single Event Effects or SEE was fit used in 1986. There is no clear distinction between them and perhaps SEP is somewhat more general thau SEE. 1987- Sm EFFEH OFIONTwxs
ONSINGLEEvmr
MULTIPLEBm UPSETS[32]
Reu.sonuble Definition Double-bit physical upsets caused by a single particle tie in the proximity of satellite memory cells may be explained by track sizes that are larger than previously postulated. A high ratio of multiple (5 to 10%) to single-bit rates over a two-year period was reported on a satellite subsystem. The probability of consecutive hits was estimated to be negligibly small. The explanation given in this paper is that the ion track diameters are larger than previously postulated. However, it must be noted that all double-bit upsets are not necessarily physically adjacent bits in a device. 1987- SmGLE Evmvr Bumou’r
(SEB) [33]
Reasonable Definition The plasma filament (charge track) from an ion traversing the power MOSFET structure, causes an avalanche breakdown between the n-epi and n+substmte regions and produces a burnout and permanent darnage at this interface. The plasma filament (charge track) tim an ion traversing the power MOSFET stmture causes current to flow hm the source to the drain. Since the n+-drain cannot supply holes to the filarnen~ a negalive space charge layer immediately builds up at the nepi-n+ substrate interface until the resulting field causes avalanche breakdown and a permanent burnout. 1987- SmGLE Evmr
GATERummw (SEGR) [34]
Reasonable Definition SEGR is permanent darnage, i.e. a rupture in dielectric gate materials due to avalauche breakdown caused by the traversal of a heavy ion.
II -14
Heavy ion induced hard errors had been observed in some types of microelectronics circuits, particularly in nonvolatile metal-nitride-oxide-semiconductor (MNOS) and siliconnitride-oxide-semiconductor (SNOS) memories. In this paper heavy-ion induced ftilures in SiOz and SiO#3i~N1 composite capacitors were studied for LETs from 15 to 85 MeV/(mg/cm2). Among the findings were: 1) Hard errors are caused by a combination of energy deposited by the ion and from electrical conduction through the plasma channel formed by the ion strike and 2) there is an inverse linear relationship between the ion energy deposition and the bias voltage required to produce composite device failure. 1988- CHARGECOLLECTIONFORIONSOF SAMELET BUTDIFFERENTENERGY[35] Reasonable Definition. Charge collection from ionization tracks produced by ions with the same LET but different energies is different and the differences cannot be explained alone by uncertainties in energy loss calculations. This paper reports the first charge collection measurement for ion tracks produced by ions with the same LETs but different energies. The amounts of charge collected were different and the differences could not be explained by uncertainties in energy loss calculations. A possible explanation is the differences in initial track structure. The higher energy track is more diflhse and may yield more charge to be collected because there is less initial electron-hole recombination. 1988- SEU ERRORSINVLSI LOGICDEVICES[36],[37] Reasonable Definition.
Errors in VLSI Logic devices caused by a single ionizing
event. In these papers Newberry identified two new types of SEU errors in logic devices. One was a “lost data” error. Such an error occurs when one of the control bits in a word, is changed in such a manner that a single word does not get to the output. A control bit is defined as any bit contained in a word in addition to the data. The other words in a data stream (at the output pins) remain intact. Data stream refers to the series of commands, operations, or words initiated and anticipated at the output during a device test. In the second type of error, called a “lost data path”) a control bit is changed in such a manner that the entire data stream is lost (i.e. it does not reach the designated output pad.) These errors have been observed in testing of VLSI logic devices. The “lost data path” in particular, can result in significant system-level failures. Because of these ftilures and the potential for catastrophic system-level results, it is imperative to harden VLSI logic devices against SEU. The paper then discusses six hardening options. The six methods, in brief, are: a) increase the channel width of sensitive devices thereby increasing the critical charge for upset, b) increase the operating voltiges, c) in the logic cell design, increase the loading on sensitive transistors thereby impacting critical charge and error propagation, d) use multiple input cells, thereby reducing the probability of error propagation through interconnected cells, e) isolate critical fi.mctions and use SEU hardened components for them, and f) adjust the timing or use a distributed reset approach to reduce the errors observed a output pads. 11-15
1989- SINGLEEVENTMULTIPLE-BITERRORS(SEMBE) [38],[39] Reasonable Definition. SEMBE was first defined as multiple-bit errors produced in physically adjacent cells by a single ion event or track. For a penetrating ion, the electric field is restored before all of the charge is collected. The remaining charge is transported by diffision. That portion of the charge that diffises to (or along) the surface of the chip may be captured by other charge-collection junctions. By contrast, if an ion track does not intersect a junction, nearly all of the charge is transported by diffbsion. Charge collection in this case is more widely distributed. Lateral charge transport from single-ion tracks can lead to multiple-bit errors in IC chips. Although this paper does not discuss ion tracks that lie in the plane of the chip, such tracks can also produce multiple bit errors but they make them directly and do not require a mechanism of lateral charge diffusion. SEMBE has subsequently been expanded to include multiple bit flips fi-om single events that are not physically adjacent. [40] Multiple bit errors in the same logical address are particularly troublesome and require more extensive error correction schemes to recover. 1989- SINGLEEVENTDARKCURRENTINCREASESINSILICONCID IMAGERS [41], [42],[43] Reasonable Definition. SEIDC is single event induced displacement damage in a single CID pixel accompanied by an increase in dark current so that the pixel is no longer usable. Low energy Coulombic interactions can cause large, although rare, displacement damage events. Such events can be analyzed by extreme value statistics. The effects of displacement darnage on dark current in individual pixels can be enhanced by high electric fields. The increases in dark current from displacement damage thus can be device dependent. The combination of the large rare darnage events and the electric field enhancement lead to increases in individual pixel dark currents that far exceed the increase expected solely on the basis of the amount of displacement darnage produced. 1993 - TOTAL DOSE FAILURES IN ADVANCED ELECTRONICS FROM SINGLE IONS [44], [45],[46] Reasonable Definition. A “hard error” produced in a device as a result of the ionizing track fi-om a single ion. In 1981, Oldham and McGarrity examined the possibility of a total dose failure from the passage of a single ionizing heavy ion and concluded then “that such failures were a long way off.” Koga et al. in 1991 and Dufour et al. in 1992 observed such errors. In the 1993 paper Oldham et al. conclude that hard errors fi-om single heavy ions traversing gate oxides “are to be expected and should not be considered surprising.” The mechanism is simply that, if the transistor is small enough, the total dose produced in the gate oxide by a
11-16
single heavy ion may change the threshold of the device beyond its operating range. also the discussion of SEGR above, 1987.)
(see
1.1 CONCEPT OF CROSS SECTION It is evident that there are several types of single event effixts, the most noted being SEU. No matter what the effect or how very different the outcome, they all have one thing in common, the device single event cross section, a. In the most generic and simple fonnulatio~ this cross section is defined in the following Equation (1) as,
u
(1)
“F where U is the number of events and F is the fluence (usually expressed in particles/cm2), so that u is defined as the number of events per unit fluence. This simple definition addresses the fi.mdamental question of how many particles per unit area does it take to produce the signature single event. It is in this definition that all single events are related. It is in this definition that any ground based qualification begins. Like most true “cross sections,” the meaning is geometrical, expressing an “area” of observed single event sensitivity. The single event cross section is simply the number of observed signature device events, U, (whether they be upset, Iatchups, etc.) divided by the fluence, F, of particles per cm2, with which the single device under test has been irradiated. The only constraints on the measurement are that the beam diameter of the irradiating fluence be large compared to the device dimensions and that, within that diameter, the beam particles be distributed uniformly. Virtually any type of single event can be quantified by this relation. Any sort of single event signature in any type of device, whether it be upse~ latchup, burnou~ gate rupture, or anything that can be uniquely measured as an eveng can be associated with a fluence to achieve that event. This quantity when known over the appropriate parameters allows us to estimate the rate in any application where there is particle radiation and that particle radiation is reasonably known. The issue of single event rate is the essential issue in SEE qualification. The question of SEE rate for the application bounds the probability in time and gives meaning and scope to the possible solutions of SEE problems. In additio~ the SEE rate allows assessment of the impact to the system, whether it be ultimately destructive or nondestructive to the performance. Some single events are meaningfid if they significantly impact successful spacecraft operatio~ while other single events maybe inconsequential. The cross section formulation gives a way to quanti~ SEE through direct measurement. It reduces half of the SEE rate problem to making measurements of U and F simultaneously as used in Equation (1) for the appropriate incident radiations and parameters specified by the environment. More discussion on the rate issue later.
II- 17
The statistical uncertainty associated with the cross section or any scientific measurement for that matter is also important. For any measurement the statistical uncertainty gives important information about the extent of the variability of the data. In SEE qualification it is important to be able to know this because the statistical variability from the measurement can be folded into the rate calculation to give an idea of the statistical range of expected rates from the cross section data. Following Bevington [47] the statistical uncertainty squared in o due to statistical uncertainties in the measurements of U and F is,
@“~=(%’92+(%42 (2)
where AU and AF are the statistical uncertainties in the number of events and fluence respectively. For counting experiments where the average number of “successes” is very much smaller than the total possible number (as in this case for SEE measurements where you have large number of potential single event targets) the statistics are driven by Poisson statistics. Therefore, the statistical uncertainties in U and F are AU and AF respectively and go as U’n and #n respectively. Taking the partial derivatives and substituting for AU and AF in Equation (2) leads to an expression for the statistical uncertainty in ISand is given by,
(3)
Equation (3) is useful in analysis of By plotting useful in SEE analysis. directly see the possible statistical appropriate analysis on the resulting yielded by the dataset.
the SEE cross section data. This quantity Acr is the two curves, u+Acr and also cr-Acr, one can variation in the dataset and then perform the curves to give the statistical range of SEE rates
From Equation (3), it is evident that SEE statistics are strongly driven by the number of observed single events, U, since the fluence, F’, issued in any measurement irradiation is usually a large number compared to U. Lastly, for zero observed single events measured, that is for WI in any measurement the statistics on U becomes U=l so that the statistical uncertainty in the SEE cross section is at least +1 00°/0 for large incident particle fluences. In this special case, the cross section takes on the meaning of being an upper limit, That is, the observed cross section is no worse than 1 event per the amount of issued fluence.
II- 18
2.0 SINGLE
EVENT EFFECTS
(SEE) ~
THE SPACE ENVIRONMENT
Energetic nuclear and space radiations come in many varieties fiwm photons to electrons, neutrons, protons, and heavy ions. It is the overall annual topic of this conkence to investigate and try to understand the consequences and impact of all such radiations on microelectronics and materials. However, not all ionizing radiations readily cause single events. To reduce the overall scope and to try to obtain a fi.mdamental appreciation and understanding of the SEE problem, let us consider only the natural space radiations, and only those components of radiations that can readily cause single events. (An excellent discussion on the overall basic mechanisms of radiation effects in the natural space environment can be found in the 1994 IEEE NSREC Short Course Notes by Jim Schwank.) When considering SEE and space radiation we need to be primarily concerned with protons and heavy ions. Each can cause single event effects, and it is important to emphasize that the mechanisms for the initiation of single events are different. Figure 1 shows a schematic of the difkent mechanisms to initiate single events from protons and pm 1 1 1 1 1
smwrlw
m
heavy Ion
1
1 I1 I
VOLUME
,’
/’
,
sENsrrlvE
NUCLEAR REACTION
1 1
VOLUME
gl
SENSITIVE VOLUME
1 1
DIRECT IONIZATION
L!l f’ t’
NUCLEAR EIASTIC REACTION
Figure1:
SEE initial mechanisms
ions. The arrows in Figure 1 indicate charged particle traversals in a schematic “sensitive volume” of a microelectronics device where the arrow thickness is roughly proportional to the iotition. Both proton interactions and heavy ions involve ionization but the source of the iorhtion is different. The protons themselves are ve ~ fil$flY iofig (e.g. a 60 MeV proton in Si has an LET of only= 0.008 MeV/(mg/cm ) aud usually cannot cause single
II-19
events via their own direct ionization (although there is a trend to the more advanced high performance technologies where this may become an issue). Protons, however, can have nuclear interactions in Si, either a inelastic scatter (or nuclear reaction) or an elastic scatter which results in one or more energetic high energy and high LET fragments traveling through the material depositing energy. If the energy deposited in the “sensitive volume” is greater than the minimum energy required to cause a single event then a single event may occur if the subsequent charge transport meets all the conditions. On the other hand, heavy ions have much higher LET and usually can initiate a single event on their own direct ionization with sufficient energy deposition and charge transport. Since protons initiate single events via some sort of nuclear reactio% not every proton trajectory through a sensitive volume causes a single event effixt. The typical single event production rate for protons in a modem microelectronics device is very roughly 1 in 105 protons traversing a sensitive volume causes a single event. At first thought this may seem like good news. However, there are many protons available in various portions of space and during Solar Flare conditions and many sensitive volumes so that the single event rates in space may be large, Energetic protons can be a significant part of the single event problem for many applications. As already mentioned heavy ions or cosmic rays can directly deposit sufficient energy in the sensitive volume to cause single events, so their single event effectiveness per unit particle seems higher than that for the protons. The fmt thought may be that heavy ions are deadly. However in the space environment in general, there are not significantly large flux populations of cosmic rays compared to the protons, so the heavy ion portion of the single event problem is not as ominous as it appears. Althou~ the heavy ions cannot be ignored in SEE Qualification because of the potential destructive impact.
II -20
.-.-r
mr--T ‘ ““ ~“
Pnorm
‘-
Eaxxm
______
-
,
-1
Ikvl
Figure 2: Trapped proton spectra for various thickness’ of a~~rber.
The main point for space applications and certainly for SEE qualificatio~ is that the environment is an important consideration. The space environment is not homogeneous or isotropic in radiation content. Figure 2 shows the trapped proton flux (in units of 107 protons/(cm2-year-MeV)) obtained horn the NASA AP8 model under Solar maximum conditions behind various Aluminum shield thickness’ as a fimction of proton energy (in MeV) for a particular orbit. The spectrum of protons described in Figure 2 is peaked at around 5x 107 protons/(cm~-year-MeV) between 30 and 60 MeV and shows non-zero l/E type behavior out towards the high energies. Figure 3 shows the relative abundance (in arbitrary units) of heavy ions with energies greater than 450 MeV/nucleon observed at 1 AU. The most abundant elements are hydrogen (or protons) and helium with the heavier elements being 2 to 5 orders of magnitude less abundant. Even though the heavies are relatively few in numbers compared to the protou they are quite penetrating due to their relativistic kinematics.
II -21
COSMIC 1000000
t
10000
AS OBSERVED
AT lAU
E
[ . 100000
RAY COMPOSITION
I [
H
>0.45 GeV
from JA. Lezniak and W.R. Waber, Aalrophya J., 223:1978.
+ 4He >1.8 GeV
‘2C>5,4 GeV ●
lEO
>7.2 GeV
☛
24Mg >10.8 GeV
**
. 100
.
●
‘% >12.6 GeV
.
●
{
.
●
.-
>25.2 ( 9V
‘Fe
●
10
n“
. m.
n
5ENi>26 I GeV E
.=m R
[
1
,
o
I
5
,
1
10
15
I
20
,
25
i
30
z Figure 3: Cosmic ray composition at 1 AU as a function of atomic number Z. The environment is not completely static, but widely dynamic in nature varying with many conditions and phenomena such ss Solar cycle, Solar wind, magnetic field etc. Figure 4 is a schematic representation of the Solar cycle “sawtooth” which strongly Figure 5 is a picture of the SEU modulates the near Earth radiation environment. radiation environment as seen be some devices flown on the CRRES mission fkom July 1990 to October 1991.. In Figure 5 one can readily see the effects of the proton belts for L-shell values less than 3 and also the occurrence of the March 1991 Solar flare around UT 450. A full description of the natural space radiation environment is well beyond the scope of this part of the Short Course and will not be addressed.
II -22
SOLAR CYCLE “SAWTOOTH”
FLARES
j
MINAND MAX CORRELATED
=3 + 8 YEARS+
1-
WITH SUNSPOTNUMBER
11 YEARS 4
FIARE BLAST MAGNETICFIELDCOLIAPSE ● CONSTANTSPECTRUM (1972 KING FLARE) ● ●
1996
Figure 4: Representation
CRRES
MEP
of the solar cycle “sawtooth.
SEUS
e
–
4
DEVICE A.E. NRL
A
C.mp&ll. cRR ES
TYPES
P.l_.McDomdd. ..d FliEht
Data
W.J.
Smpor.
Analysis
L-I. mni.
IM H
L-
Figure 5: Distribution altitude and time.
of CRRES
MEP upsets for four device types versus
II -23
R=) R=)
What k important for SEE qualification is to consider the application, and address the issue of what SEE producing radiation will be present throughout the mission. For example, if the mission will spend a lot of time and proximity in the proton belts, then protons are of major importance in assessing SEE impact and heavy ions of smaller importance due to the Earth’s magnetic shielding. If the mission is intended to spend time outside the proton belts, then the major contributor to the SEE impact would come from the heavy ion cosmic ray component, although there may bean occasional source of single event effects from Solar emitted particles including Solar flare protons. In addition, for low Earth applications where radiation is not a major factor, the South Atlantic Anomaly [48] (or SAA as it is commonly known) becomes a contributing factor containing populations of energetic protons trapped in the belts.
3.0 GROUND BASED MEASUREMENTS The most essential part of any SEE qualification process is ground measurements. While simulation tools derived from first principles may be useful in providing some indication of SEE device sensitivity, no reasonable predictions of actual performance may be made in the absence of data collected with actual devices. There are several factors to consider when approaching the questions of what types of measurements should be performed and how the data should be collected, some of which are: ●
●
●
●
Does data exist on other devices or technologies similar to the one being considered? If so, are the similarities sufficient to provide guidance and expectations for the anticipated response? Examining the measured response of similar devices and technologies can be valuable in forming a testing plan. Is the environment for the application known? As already mentioned the SEE response is partly a function of the incident radiation environment, and measurements for SEE qualification should be tailored to the target environment. Are simulator tools available to model and predict device response? Simulation tools tailored to the device being considered for SEE qualification can be a valuable resource in formulating an experiment plan Has a failure mode analysis been performed? When quali$ing complex systems, it is often useful to identifi critical failure modes and single points of failure. This analysis should also consider the operating modes and system software demands. Many systems are SEE fault-tolerant, obviating the need for SEE-immunity as long as the scope of the device and system response is well known.
II -24
3.1 ACCELERATORS
AND IONS
One of the considerations in the design of an SEE experiment is the target environment of the application. As seen in the previous section, the radiation environment in space is widely varied in compositio~ spectroscopic or energy characteristics, orbital position, time, and largely omnidirectional. The “environment” at a particle accelerator, on the other hand, tends to be monoenergetic and unidirectional. Therefore, ground-based measurements are, at best, an approximation of the space environment. Moreover, in the case of galactic cosmic rays, relatively low energy heavy ions are used at accelerators to predict the SEE response to much higher energy (but having the same LET) particles. It has been proposed that differences in track structure may lead to different SEE response even where ions have the same LET. [35] For all of these reasons, it is important to keep in mind that while particle accelerators are powerful tools in performing SEE qualification, you must give consideration both to their limitations and the differences between ground-based measurements and actual on-orbit conditions. 3.1.1 PROTONS Typical trapped proton spectra were shown in Figure 2 for various thickness’ of Aluminum shielding. As can be seem the typical spectrum is peaked around 50 MeV. There are a number of accelerator fmilities available which provide protons at these and much higher energies. As will be shown in the subsequent sections, in order to perform accurate modeling, it is necessary to make accurate measurements of the asymptotic cross section at a variety of energies, although fairly reliable predictions can be made with data from a single energy. Table 3 lists some of the facilities available in North America and the range of energies available at each. Table 3: Proton fmilities in North America and their approximate energy ranges. RANGE
FACILITY Crocker Nuclear Laboratory (UC Davis Cyclotron) Davis CA Indiana University Cyclotron Facility (IUCF) Bloomington IN Tri-University Meson Factofy (TRIUMF) Vancouver BC NRL Pelletron Washington DC Harvard Cyclotron Cambridae MA
II -25
OF ENERGIES 5-65 MeV
Up
to 200 MeV
Up to 500 MeV Low MeV & Micmbeem Up to 150 MeV
Every fhcility has unique characteristics and requirements. There are, however, some common fwtures and considerations when conducting radiation effects experiments with protons. Some of these are as follows: .
Due to their relatively long range in air, it is usual to irradiate targets without the use or hindrance of a sealed vacuum chamber when working with protons. This normally makes for fewer problems with cabling and electrical noise and provides relatively unhindered access to the DUT and associated measurement equipment. However, the i.mediations typically take place in rooms which are remote to the experimenters due to the radiation hazards of the high energy protons beams directly in open air.
.
The fluxes available at accelerators are normally several orders of magnitude larger than those encountered in space and as a consequence, it is possible to deliver on target years worth of fluence in a matter of minutes or even seconds in high beam current conditions. However, these high fluxes can lead to erroneous results and conclusions in those cases where a DUT exhibits a flux-dependent response.
.
It is possible, when dealing with typical and arbitrary high dose rates and high energies at proton facilities, to nuclear activate targets and the surrounding materials. It is important to closely monitor the level of radioactivity of targets and employ proper radiological safety precautions when handling these materials.
.
A critical element of any SEE qualification experiment is accurate dosirnetry and control of the beam. There are a wide variety of approaches taken in both these regards, but a facility like that in place at the UC Davis Cyclotron is ideal for this kind of work. Highly accurate dosimetry is accomplished by a computer controlled system that utilizes a special vacuum chamber containing a Faraday Cup/Secondary Emissions Monitor (FC/SEM) combination which is at the heart of the measurement system. [49] Experimenters are able to control start and stop of the beam according to a number of presets, dynamically monitor the progress of the run, and log all relevant dosimetric information as the experiment proceeds. Variations on this these theme are employed at various sites for both protons and Heavy Ions.
.
A consideration for protons that is not as important when conducting heavy ion experiments is total dose damage. It is not at all unusual to severely damage a target and thereby modi~ its SEE response in the course of conducting measurements. It is important to closely monitor parameters which give an indication of total dose degradation (such as, for example, DUT standby current) and where total dose performance is unknown, it is always a good idea to make initial measurements at a low flux and in small incremental irradiations.
3.1.2 HEAVY IONS Performing SEE measurements with heavy ions has some similarities to proton testing and some significant differences. In section 4 of these notes it will be shown that
II -26
while it is important to measure the asymptotic cross section, accurate determination of the threshold LET or critical charge has a far greater impact in subsequent modeling and event rate calculations. It is important, therefore, to be able to make measurements with a wide range of LET values. At heavy ion accelerators this is accomplished either by direct energy and species changes of the beam, or by changing the angle of incidence of the beam into the “sensitive volume” of the DUT to obtain what is called an “effective LET” value. The “effective LET,” or L~~~, is the beam LET divided by the cos of the incident angle 0 and accounts for the increased path length of the particle through the device. Table 4 lists some of the heavy ion facilities which have been used to perform SEE qualification. Table 4: Heavy ion facilities and their approximate heavy ions available. FACILIN
energy range for a wide variety of
RANGE
Brookhaven National Laboratory Tandem (SEUTF) Upton NY Chalk River Tandem Accelerator and Superconducting Cyclotron (TASCC) Chalk River ONT Berkeley 88” Cyclotron Berkeley CA NRL Pelletron Washington DC GANIL (France) GSI Darmstadt (Germanv)
OF ENERGIES
35-350
MeV
Up to -2.5 GeV
70-600
MeV
Low MeV & Microbeam up to 100 MeV/amu UDto 2 GeV/amu
As is the case with protons, there are some common issues to consider when performing SEE experiments with heavy ions. ●
Heavy ions of the limited energies typically found at accelerators have also a limited range in materials. For this reason, accelerator testing with heavy ions will be conducted within a sealed vacuum chamber of some kind. This arrangement can introduce some cabling and connection problems to your DUT and also make it somewhat tedious if not impossible to gain ready access to your device. Additional cabling makes it difficult to successfully operate devices and associated microelectronics at high speed and power. Experimental design should take this into consideration and your test plan should minimize the need to have physical access to the test structure or support electronics.
●
Because of their limited range, you also need to be sure to choose incident ion species and energy which will be able to penetrate the sensitive volume of your test structure and which does not suffer significant energy loss across this region (or if it does, to at least know what the residual range of the particle is in order to perform
II -27
accurate energy deposition calculations). It is a common practice to rotate structures through a series of angles and thereby increase the deposited energy or the effective LET of the incident beam (by increasing the path length through the material). However, at large angles, the sensitive volume may become shadowed by the packaging material or the increase in path length may introduce significant range and LET differences for the ion trajectories through the target material. Range and energy loss calculations should be performed when the target surface materials are known or accurately estimated. Simulation tools such as the TRIM code are useful in this task in minimizing these kinds of problems. ●
As is the case with protons, accurate dosimetry and beam control is an important factor in conducting heavy ion SEE qualification experiments. It is equally important to be able to accurately determine ion energy since the event threshold LET is so critical to subsequent upset rate modeling and calculations. Facilities such as Brookhaven’s SEUTF which provide an advanced dosimetric and beam control end station as well as a large target vacuum chamber with 5 axis target rotation are ideal for this kind of testing.
●
Dose damage is not a typical consideration when performing heavy ion testing but owing to the different nature of the interaction mechanisms of the heavy ions with the target material, some effects may be observed with heavy ions that are not seen with protons. As a consequence, it is not unusual to modify testing procedures and experimental software to be different for heavy ions than for protons. Single Event Latchup, for example, which is not unusual for certain kinds of devices when tested with heavy ions, is not typically of concern when performing proton testing.
3.2 PROCEDURES
TO COLLECT DATA AT THE ACCELERATOR
The procedures and methodologies employed to perform SEE qualification at an accelerator are as widely varied as the numbers of technologies, applications, and instrumentation available to perform them. Just as the definition of “SEE bnnzzme” depends not on some objective standard but rather on specific applications and needs, the parameters and types of measurements which are important are largely subjective. There are, however, some common considerations when performing experiments of this type. 1. Microelectronics devices are often capable of operating over a range of electrical characteristics. SEE sensitivity is often a function of parameters such as the chip supply voltage. When possible, measurements should be made which cover the range of such parameters if the application is not well defined. There is sometimes a tradeoff in this regard in that operating a device at a lower supply voltage may increase the SEE rate while decreasing total dose degradation. 2. Environmental conditions such as temperature may have a dramatic impact on SEE response. Designing an experiment where the temperature of a DUT can
II - 28
be controlled and measured is sometimes a difficult task, especially operating the DUT in a sealed vacuum chamber.
when
3. The SEE rate of a DUT may be (and often is) a fi-mction of total dose damage, especially for proton testing. It is important to be able to measure throughout the irradiation process some characteristic parameter of the DUT (such as supply current) as an indication of damage effects, and correlate this degradation with changes in SEE rates measured. 4. Some devices, such as DRAMs, are dynamic in nature while others are essentially static such as SRAMS. Others can be operated and tested either dynamically (a ~Processor) or statically (a pProcessor’s register page or cache). There can be significant differences between static and dynamic testing, and when operating a device dynamically, the clock timing of the operations (both the speed of the clock and the duty cycle as compared to incident beam flux) can have a dramatic impact on SEE rates. Static testing is normally useful in establishing baseline SEE rates, but gives an incomplete picture of actual SEE performance when studying complex devices such as processors (which could be the topic of an entire Short Course by itself). 5. Digital devices being studied in an SEE qualification trial may often display analog effects, such as latchup, single event disturb, and others. The impact of such effects at the system level rather than the DUT level should be considered and accommodated. In addition to general testing issues, specific classes of devices have unique aspects and considerations which often need to be addressed. For example: ●
SRAMs/DRAMs - When testing RAMs, it is not sufficient to simply count the numbers of upsets produced by a given fluence of incident particles. This approach provides far too incomplete a picture of the nature of the SEE response of the device. It is often useful to note, for each upset bit: 1.
The polarity of the upset - Was the transition from 1 to O or Oto 1?
2.
The location of the upset - This location should be both logical and physical address as well as the time of upset relative to any relevant refresh cycle or other timing waveform event.
3.
The numbers of multiple bit upsets - It is important to note the numbers of upset bits which are physically adjacent as well as which occur within the same logical address.
4.
The refresh rate - Upsets in DRAMs are often dependent refresh rate of the chip.
II -29
on the
5.
.
Other parametric information - Shifts in access time and the occurrence of stuck bits (imprinting) are often useful measures of degradation mechanisms within the DUT.
MICROPROCESSORS - The design of an adequate SEE qualification test for a microprocessor is a complex task owing to the complexity of the device itself, Microprocessors, in some respects, are best thought of as a collection of discrete devices with common circuitry and in fact can often be tested and operated in such a way that only specific portions of the chip are used at any given time. For example, some common regions of a typical CPU which are amenable to being operated independently include: 1. Registers/Cache - The processor registers and data/instruction caches can often be treated as simple static storage and testing in the same While there are usually a limited way you would test a SRAM. number of bits which can be directly addressed in this way, this kind of test can provide a usefhl baseline to the general SEE sensitivity of the chip itself. 2. Memory Management Unit - Most microprocessors chip MMU which can be exercised independently.
contain and on-
3. Floating Point Unit/Accelerator - On many microprocessors, the FPU (when it exists) is an independent and asynchronous element of the chip and can be independently operated with test vectors that generate a known result. 4. Central Processing Unit - Like the FPU, the CPU can be exercised with a set of test vectors like a finite state machine with the intermediate and final states compared against expected values. In addition to testing various regions of the microprocessor independently from each other, it is also important to examine their SEE response as a cohesive unit. In a complex device, an SEU may not manifest itself in an apparent way until a long time after the original upset, or it may propagate by physically and temporally far away from the site of the original event. In addition, a single upset at the right time or in the right place may exhibit a “fanout” of tens or hundreds of errors, or the upset may never manifest itself as an error at all. Only by examining both discrete areas of a complex device as well as how those regions interact can a complete picture of the SEE device sensitivity be gleaned. .
Gate Arrays - When evaluating devices like performance is often sensitive to the arrangement
II -30
gate arrays, the SEE of logic elements, and
distinctions should be made between combinational elements, and timing propagation differences.
and sequential
logical
.
FIFOs/Buffers - Devices such as FIFOS normally have inherent single point ftilure modes in their desigq such as the ring pointer. While is possible to measure SEE in the FIFO stack, a single upset in the ring pointer can effectively corrupt the entire stack and in these instances it is necessary to distinguish and quanti& these events.
.
ADC/DAC - In the case of devices such as this which have both digital and analog circuit elements, it is Use&l to distinguish between digital upsets and analog disturbances which lead to an apparent digital corruption and vice versa.
The design of a proper SEE qualification plan incorporates many aspects, as has been show including the utilization of other data on similar devices, information and analysis of the specific application where known, the selection of an accelerator faility which will adequately simulate the environment and the implementation of a test system which will properly and completely exercise and measure parameters and SEE response of the DUT or subsystem being considered. Having made these preparations, it is equally critical that the experiment be conducted with precision once on-site at the accelerator. There are some usefid things to keep in mind when conducting the actual ground measurements: .
Accelerator facilities are complex. It is helpfid to gain an appreciation of the procedures and operation of the facility in order to optimize data collection efforts. Moreover, these facilities are not always turn-key operations and delays and breakdowns are inevitable. Do not schedule run time so tightly that your plans cannot accommodate slippages.
.
Keep detailed records of everything. In addition to the usual recording of SEE data and associated dosimetric information keep records of any adjustments made to experimental test setup (hardware, software, cabling, etc.) and chronological sequencing of beam changes, device changes, nominal beam characteristics (species, energy, flux, etc.). Where possible, it is useful to record this information manually and electronically.
●
Accelerator testing can be an expensive proposition and there are significant pressures to optimize beam utilization, It is importan~ however, to not allow these pressures to interfere with sound measurement and analysis. This is especially true in the case of SEE qualification on a DUT for which the expected response is unknown that whatever preliminary test plan you start out with will require modification. If you are able to perform interim analysis during the data collection effort, this analysis will provide sensible guidance
11-31
to adjusting response.
the data collection
procedures
to accommodate
the observed
.
The typical procedure at an accelerator will be to perform pre-irradiation measurements of all relevant device operational parameters followed by irradiation increments in which the DUT is exposed to fixed fluences of particles and then measured again. In the case of SEE qualification, these interim measurements will typically quanti~ the number of events which have occurred for a given fluence. In the absence of any prior experience or data with a given DUT, it is useful to start with small increments and gradually increase to larger fluences as dictated by the observed response.
.
For purposes of statistical analysis of SEE data after data collection is concluded, it is usefid to collect data on several devices of the same heritage and date/lot code. Repeatability of result is a key component in performing accurate upset rate modeling and predictions.
3.3 LABOIUTORY
SIMULATORS
AND TOOLS
There are three usefhl tools which can be used in the test snd measurement of single event effects. The tools are similar to accelerators in the sense that they issue ionizing radiation to the target structures and/or devices as does sn intense particle beam from an accelerator. Nonetheless, these tools are different from the accelerator facilities in that the tools are more like specialized instruments to look more closely at special SEE problems. These tools have been developed over the years snd are not intended to replace accelerator, but are meant to complement and clari~ accelerator results. .Three laboratory simulators tools are the 252Cf source, the pulsed laser source, and the ion microbeam source. These three tools are not generally usefid in the broad field of SEE study and analysis but can be quite usefid in specific circumstances to screen or investigate for particular single event effects. The relatively high LET spectrum produced by 252Cf sources can give a quick look or preview of potential single event effects problems on a target device. The spatial and temporal localization associated with the puked laser and ion microbeam sources can provide detailed information on single event effect processes not easily available when using ion accelerators. These tools are used most effectively as supplements to ion accelerator data rather than direct replacements for such data. 3.3.1 252cf The 252Cf source is a simple way to screen for SEE effects. A schematic of .a typical 252Cf source set-up along with other pertinent technical information is shown in Figures 6A, 6B, and 6C. It uses the radioisotope 252Cf as the source of particles. 252Cf emits a variety of energetic particles in it’s decay including mostly a psrticles (96.91 ‘%0), neutrons, and spontammus fission fragments (3 .09°/0) which are the most interesting in the SEE application. This type of source requires little effort to operate, but has limited
II -32
utility since the range of most of the fission fragments is very limited to typically VBQ =Ov
-20 -
?? 1./
-40 Pre
‘-
I
I
I 10
1.0
D30\E
[krad
1
I
30
100
300
(Si02)]
Figure 36: Back-gate threshold voltage shifts (in V) as a function of equilibrium x-ray and CO-60 dose for ZMR devices with 2.0pm buried oxides. (After Ref. [102].) 5.9.3. possible Test Methods. Figure 30 above illustrates the point that any testing based on Co60 or 10-keV x-ray exposures will be fundamentally non-consewative for high-rate response due to oxide-trap charge neutralization effects. That is, a significant fraction of the positive oxidetrap charge that can significantly affect MOS device response at very short times (for example, on the ~s - ms time scales associated with some high-dose-rate weapon applications) can (1) anneal out, (2) be compensated via electron capture in border traps associated with the trapped positive charge [83, 108, 109], or (3) be offset by the time-dependent growth of interface-trap charge on the time scales of lower-dose-rate irradiations [86-89]. Short of using high-rate sources for lot acceptance testing, which is often expensive and impractical, one can only circumvent this problem via characterization testing and the use of margin and safety factors in hardness assurance testing [58,59]. These safety factors are above and beyond those employed as part of the system design phase (e.g., Section 2 above). An example is shown in Fig. 37, where the threshold voltage of an MOS transistor exposed to 50 krad(SiOz) at a LINAC at a dose rate of 6 x 109 rad(SiOz)/s is compared to a 10-keV x-ray exposure at 5550 rad(Si02)/s to 100 krad(Si02) [59]. A negative shift at 10 s following the x-ray exposure that is equal to the shift at - 10 ms following the LINAC exposure is obsemed, thus illustrating that additional dose in a laboratory test can sometimes (but not always) make-up for the increased
III-4 1
annealing time. However, the dose rate still must be kept as high as possible in the laboratory exposure for devices which tend to have large interface-trap densities in gate gr field oxid e regions, as otherwise the positive shifts due to interface traps can prevent one from reaching the negative threshold voltage levels one can see at very short times following high-rate exposure [58,59]. Still, Fig. 37 highlights that, with characterization testing, one can often define practical 10-keV x-ray tests based on overtesting and margin that can be useful for hardness assurance testing for high-dose-rate weapon environments [58,59]. The amount of margin required will depend on the neutralization rate of the oxide trap charge in the gate and field oxides, the relative of amount of interface traps in these two regions and their buildup rates, and the system performance requirements (that is, the amount of leakage current associated with negative threshold voltage shifts that can be tolerated at short times). 0.8
T
0.4 LINAC, 1 Pulse, 6X109 rad/s
A Vth (v)
0
50 krad I
-0.4 -4-0.8
.-
~
-“H
9-99
99
X-ray, 5550 rad (S102)/s
Equal AVth
100 krad
-1.2 -1.6
‘
10-4
I
10-3
I
10-2
I
10-’
I
I
100 TIME
101
I
102
I
103
I
lfJ4 10
(see)
Figure 37: Comparison of high-dose-rate LINAC and intermediate-rate 10-keV x-ray exposures of MOS transistors with 45-rim oxides from Sandia’s old baseline technology. (Atler Ref. [59].) 5.10 Synopsis of MOS Test Methods
Defining optimized tests for high-dose-rate environments requires an understanding of system requirements and device time-dependent response that probably never can be captured in a simple test standard the way TM 1019.4 and BS 22900 allow low-rate response to be estimated. Still, we can offer the following test matrix for epiibulk and S01/S0S technologies as a starting point for characterization testing for high- and low-dose-rate radiation environments. The split between these two groups is necessary because of the dramatic impact charge yield in the buried insulator can have on SOI/SOS device response. The matrix also presumes it is not already known from characterization testing that a particular failure mode can be neglected for a given technology. For example, SOI devices with intrinsically hardened buried oxides at high dose rates could be qualified the same as epfiulk devices, as the charge yield issues in the buried oxide would not be significant if the buried oxide is not impacting device response. We emphasize, however, that the absence of one failure mechanism (especially field or buried oxide Ieahge) in laboratoW testing does m ensure its absence in a high-rate environment. Look at Fig. 30 carefully again! For radiation environments in which a significant portion of the total dose is depos-
111-42
ited at rates above the maximum rate achievable in laboratory sources (- 1000-3000 rad(SiOz)/s in an ARACOR Model 4100 X-ray Irradiator), characterization testing at a Ll_NAC or equivalent high-rate source is necessary to avoid risk from possible non-conservatism of the test with respect to oxide-trap charge. The matrix presented in Table 2 should therefore only be used as a general guideline, and should not be presumed to be a serious attempt at a rigorous standard. Table 2: Matrix of possible sources/tests useful for characterization testing and for developing hardness
assurance plans for MOS devices used in weapon or space environments. For purposes of illustration, the breakpoint between high and low doses in this table is -5 krad(Si02), unless modified by arguments on maximum interface-trap buildup such as those in Section 5.7 above.
Epi/Bulk MOS
Environment Low Dose Space
I
Either x-ray or CO-60 testing.
SOI/SOS MOS I
CO-60 preferred.
CO-60exposure per 1019.4 or BS 22900, plus rebound testing.
CO-60 exposure per 1019.4 or BS 22900, plus rebound testing.
CO-60per TM 1019.4 preferred, or x-ray with 2x margin.
CO-60 per TM 1019.4.
High Dose Weapon (Strategic)
X-ray preferred, with 2-3x margin.
Both x-ray testing and CO-60 testing per TM 1019.4 with 2-3x margin.
Military Space
Both x-ray testing with 2-3x margin, and CO-60 plus rebound testing required.
Both x-ray testing with 2-3x margin, and CO-60 plus rebound testing required.
High Dose Space Low Dose Weapon (Tactical)
Several points must be noted about Table 2. For all applications involving possible highdose-rate exposure, the tests should be supplemented with high-rate characterization testing (for example, with a LINAC). The break-point between a high- and low-dose environment is - 5 krad(SiOl) here, though this is for purposes of illustration only, and should not be taken as absolute guidance. Analysis like that in Section 5.7 above is required to modifi this boundary, which is set by the requirement to check for significant interface-trap effects at low dose rates. Rebound testing is only required in Table 2 when stated explicitly. For example, in the “low-dose” space environment, rebound testing is not required (unless gate oxides are thicker than -100 nm or devices or ICS are exceptionally vulnerable to small interface-trap densities [104]). If one cannot eliminate the need for rebound testing by means of characterization testing or analysis along the lines of Section 5.7 above, the “high dose” conditions apply. The “military space environment” is a combination of “high-dose-space” and “high-dose-weapon” environments. X-ray testing presumes using a 10-keV x-ray irradiator at a rate of> 1000 rad(Si02)/s, and that tests are performed immediately after the end of the exposure. When both x-ray and CO-60 testing are suggested, of course separate lot samples are used for each type of exposure. For example, x-ray testing could be performed at the wafer level, subject to the constraints of Sections 5.9 above and 5.11 below, and CO-60 testing (and rebound tests, if required) would be performed on a separate
III-43
I
I
group of packaged parts. So, Table 2 is a useful starting point in hardness assurance test definition for MOS devices in weapon, space, or mixed environments. 5.11 E#ects of Burn-in A complication in the traditional MOS lot acceptance flow is recent work showing that reliability screens normally given devices before product is shipped can sometimes significantly affect their radiation response [169], Because burn-in is performed at a much lower temperature than the device has already experienced during processing, it had previously been presumed that the radiation response of burned-in and non-burned-in devices would be similar, so lot samples for radiation testing could (to save time and expense) be pulled without receiving a burn-in, Figure 38 illustrates the danger of testing devices without burn-in. These commercial octal buffer/line drivers have a problem with excess leakage current in a radiation environment. In Fig. 38, devices which received a burn-in show much higher leakage currents after CO-60 irradiation to 150 krad(SiOz) than do parts which did not receive a burn-in. Distressingly, the nonburned-in parts easily pass the parametric test limits for these devices, while burned-in parts (more representative of shipped-product response) fail the test. At higher dose rates typical of some weapon environments, these parts could cause system failure due to their high leakage currents. Failures could even occur in space systems in oxide-trap charge annealing rates are not high enough for the devices to recover before the leakage current becomes great enough to cause circuit or system failure [104,169]. 1
()-1 .
10-2
.
■
150°C
●
pJo
Burn-in
Burn-In
10-3 -“.------”--”----”Failure Level 10-4 110-5 10-6 10-7
1 o-e 1 ()-9
fl---
8= Lr. Pre
104
103
105
Dose [rad(Si02)] Figure 38: Static power supply leakage current as a fimction of dose for commercial octal buffer/line
drivers with or without a pre-irradiation 150”C bum-in, irradiated with CO-60 gamma rays at 90 rad(Si02)/s. The dashed line represents a parametric failure level of 1 mA. (After Ref. [169].) Enhanced leakage currents associated with burn-in have also been observed in the hardened SRAMS of Fig. 30 [169]. An initial characterization study of gate and field oxide transistors suggests that burn-in may alter some interface-trap precursors in these technologies, perhaps due
III-44
to hydrogen motion [169]. Without compensating interfhce traps, gate-, field-, or edge-transistor leakage can be unacceptably high in high- or low-dose-rate applications [86,89, 140]. If devices are to be burned-in before being used in such systems, the results of Ref. [169] show clearly that one must perform radiation testing on burned-in parts (unless the devices have been shown not to exhibit changes in radiation response due to burn-in, or unless the response of burned-in devices can be correlated accurately to that of non-burned-in devices). This effect must also be considered in interpreting the results of wafer level irradiations on non-burned-in devices for technologies that show this effect [169]. Finally, we should mention that the sensitivity of device radiation response to burn-in is most likely not unique to MOS technologies, as bipolar and BiCMOS devices which are prone to show parasitic leakage in recessed or trench field oxides (discussed below) may also be susceptible to these burn-in effects. 5.12 ~. The final topic to be covered in this section is what to do if parts fail a radiation test like TM 1019.4 or BS 22900, during the hardness assurance phase of a project. The glib (and sometimes only comet) answer is to throw away the bad parts and buy or build better ones! However, there are some steps to go through before making this decision. First, one should check to see that the parts were biased and tested correctly. Doing something as simple as putting a part into a socket the wrong way or applying bias incorrectly can damage a part quite independently of its radiation response (see Figs. 1 and 2, for example). Second, one should review the cause of the failure. Does it make sense with what is known about the part? For example, if failure analysis shows a blown input protection device, that’s probably not a radiation-induced ftilure. On the other hand, if it’s a commercial MOS IC that fhils functionally or shows high leakage at a few hid, you may be stuck, because that’s fairly normal behavior for commercial, off-the-shelf devices! About the only options for dealing with real radiation-induced IC failures are (1) for oxide charge related failures, to use the less conservative tests in Section 5.8 above, if the application is a low-rate environment, and if permitted to do so by the contracting authority, (2) for interfacetrap charge related ftilures, to consider a detailed characteri=tion of the part over a wide range of dose rates and/or annealing times to try to accurately extrapolate device response in space, as was done for oxide charge in Fig. 27 (this can be a very difficult task, and is not recommended for the non-expert), (3) to re-evaluate the radiation requirements for the system to see if the requirements on the part of interest can be relaxed without jeopardizing the system (and/or consider spot shielding the device), (4) try to get a more radiation-tolerant part (or a harder version of the present part), or (5) fly the bad part anyway, and accept the risk of reduced system lifetime. It is presumed that option (5) would not be chosen lightly. 6. Testing Issues for Bipolar Devices Bipolar devices can fail in radiation environments due to parasitic leakage effects similar to those in MOS IC’S [170-172], or due to gain degradation, where the device physics can be entirely different from that of MOS devices [173-176]. Figure 39 illustrates a typical parasitic leakage path for a bipolar IC [172]. As in a MOS parasitic field oxide, trapped positive charge in the oxide overlying the p-region between the two buried layers can cause the surface to invert, III-45
forming a parasitic leakage path. For this or other types of parasitic leakage-related failure modes associated with trapped-positive-charge buildup in insulators, either in weapon or space environments, test methods for bipolar devices are similar to those for MOS devices [1 14]. Moreover, for gain degradation in high-dose-rate (e. g., strategic weapon) environments, similar tests can also be employed to those discussed for MOS devices above, though more attention must be paid to displacement effects associated with high-energy electrons and protons for bipolar devices (sensitive to minority carrier lifetime) than to MOS devices (sensitive to majority carrier lifetime). Where testing issues become more difficult for bipolar devices than for MOS devices is for IC’S in which gain degradation is the primary failure mode, for space or other lowdose-rate applications. We now discuss why this is the case, and provide some preliminary testing recommendations. INCREASED SIDEWALL 3
2
CURRENTS
Y
P
COLLECTOR TO EMITTER CHANNELING ON WALLED EMITTERS
7
BASE
RECESSED FIELD
OXIDE N EPITAXIAL
7 L
,.-
..:,;.. ,,
+ N+ BURIEDLAYER
N+ BURIEDLAYER P SUBSTRATE I
T
o 1
BURIED LAYER TO BURIED LAYER CHANNELING
Figure 39: Cross-section of parasitic MOSFET that can invert during ionizing radiation exposure, causing buried-layer to buried-layer leakage in some bipolar technologies. (After Refs. [67, 172].) A cross-section of a modern bipolar junction transistor (BJT) similar to those used in Analog Devices Inc.’s (ADI’s) XFCB complementary bipolar process is shown in Fig. 40 [177], The screen oxide that overlies the emitter-base junction is the primary problem in a radiation environment for many types of modern bipolar/B iCMOS technologies [1 12,173,174, 178], The buildup of positive oxide-trap charge in the screen oxide can greatly enhance the surface recombination rate in the p- base region of NPN transistors. (Analogous effects also apparently can occur in p-emitter regions of lateral or substrate PNP transistors with similar screen oxides [179181].) The excess base current responsible for the gain degradation in these devices scales as exp (NOX2),where N OXis the net positive trapped charge density in the screen oxide. Thus, the devices are extremely sensitive to the oxide charge [173,174]. Moreover, the oxide electric field in the screen oxide ordinarily is small, and due primarily to base-emitter fringing fields (in the absence of accidental overlapping metallization). Finally, the screen oxides are typically of much poorer quality than MOS gate oxides, due to processing constraints associated with the need for a high base surface doping density and the high-temperature emitter drive-in anneal [1 12], The combination of poor oxide, low electric fields, and extreme sensitivity of the excess
III-46
base CUITent can lead to dramatically different radiation response with respect to dose- rate and annealin [g effects for some bipolar devices than for the MOS devices considere( iin Slectifm 5 above, Base
❑
Eti~r
■
Oxide
Chllector
Base
❑
Metal
Polysilicon
Figure 40: Cross-section of bipolar devices built in ADI’s XFCB complementary bipolar process. The
oxide above the emitter-base junction is - 545 nm thick for this process. (After Ref. [177].)
——— —— ——— —— —— .— —— ——— ——— ——— F ——— ——— — — —— —— ——— —— ———— 1 F- ———
1
I
Range
of 1.1 rad/s
,
1
I
I
Data
1
~o-2 .
m:
300 rad(Si02)/s ■
., 5 0 -2 0
100° 200 krad I @
,
1 104
Time
,
, ,
I ~05
, 106
(see)
Figure 41: Comparison of low-dose-rate and high-rate plus high-temperature annealing data for a de-
velopment version of ADI’s RBCMOS process. Devices were irradiated to 200 krad(Si02) at 1.1 or 300 rad(Si02)/s. High-rate irradiations were followed by 100”C anneals. The band of low-rate response after irradiation to the same total dose is indicated by the region between the dashed lines. (After Ref. [182].) Two examples of these differences in response are shown in Figs. 41 and 42 [182,183]. These are representative of much recent data in the literature that show similar effects [181-188], Figure 41 is the data of Enlow et al. in which the differences in bipolar and MOS post-irradiation response were first noticed [182]. For these devices, irradiation at a rate of 1.1 rad(Si02)/s
III-47
caused much worse gain degradation than does irradiation at 300 rad(Si02)/s andor performing a subsequent high-temperature anneal. Before this report, it had been considered likely that both MOS and bipolar devices would show gain degradation in space that were dominated by interface-trap effects [175, 176], and that rebound tests might be an effective way to simulate bipolar gain degradation in space [1 14], Figure 41 showed this was simply not the case. Figure 42 is a follow-on study by Nowlin et al. which reinforces the inability of room-temperature or elevated temperature anneals to increase the amount of gain degradation to levels observed at low dose rates [183]. More recent IC data have shown this type of response is also seen in other technologies [181,1 85,186]. AIB/l Bo 12 ‘
Room Temperature
Annealinf I
10 ‘0 co Data
a -
Standard
Emitter
2 V Reverse Bias 1.5 w x 1.5 I.IM Emitter
6 -
4 -
2Isochronal Annealing hit
poatrad
1 A
1 B Meaaurament
1 c
1 D
)
E
Figure 42: Room-temperature and isochronal annealing data for ADI XFCB transistors. All measurements were taken after the devices were irradiated to 500 krad(Si02) with CO-60 gamma rays at a rate of -240 rad(SiOz)/s, Annealing points during the isochronal anneal correspond to 30 minutes of annealing at (A) 60°C, (B) 100”C, (C) 150”C, (D) 200”C, and (E) 250”C. The room temperature parts were characterized at the same times as the isochronally annealed parts. (After Ref, [183],) Recent capacitance-voltage (C-V) and thermally stimulated current (TSC) tests on MOS capacitors processed similarly to bipolar screen oxides have strongly suggested that differences in the amount and distribution of oxide-trap charge following high- and low-rate irradiation maybe responsible for the enhanced gain degradation of bipolar devices at low dose rates [112]. In particular, for O-V irradiation of capacitors simulating bipolar screen oxides at - 25°C, the net trapped-positive charge density (NO,) inferred from midgap C-V shifts is -25-40 ‘A greater for low-dose-rate (< 10 rad(Si02)/s) than for high-dose-rate (> 100 rad(Si02)/s) exposure [1 12]. Device modeling shows that such a difference in screen-oxide NO. is enough to account for the enhanced low-rate gain degradation often obsemed in bipolar devices, due to the - exp(NOX2)dependence of the excess base current [174,178]. At the higher rates, TSC measurements revealed
III-48
a -10 VOdecrease in trapped-hole density over low rates. Also, at high rates, up to - 2.5-times as many trapped holes are compensated by electrons in border traps than at low rates for ADI devices under the irradiation conditions of Ref. [112]. Both the reduction in trapped-hole density and increased charge compensation reduce the high-rate midgap shift. A physical model has been developed which suggests that both effects are caused by timedependent space charge effects in the bulk of these soft oxides associated with slowly transporting and/or metastably trapped holes (e. g., in Ea’ centers) [112]. Figure 43 is annealing data from electron-spin-resonance experiments that supports the asertion that metastably trapped holes in E5’ centers anneal more rapidly than more deeply trapped holes in E; centers [189]. The space charge associated with these slowly transporting or metastably trapped holes was argued to both reduce the charge yield in the bulk of the screen oxides during high-rate irradiations more than during low-rate irradiations, and to force holes to be trapped somewhat nearer to the Si/SiOz interface during the high-rate irradiations than during the low-rate irradiations. Holes trapped nearer to the interface can be more easily annihilated or compensated by tunneling electrons, consistent with the TSC data. Additional details of this physical model are in Ref. [1 12].
.!! 1.0 .tn c
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50
100 Temperature
150
200
25
0
(“C)
Figure 43: Normalized densities of holes in metastable (Eb’) or deep (~)
hole traps, as measured via
electron paramagnetic resonance. (After Ref. [189].) On the basis of the model outlined in Ref. [1 12], it was predicted that bipolar transistors with enhanced gain degradation at low dose rates might show comparable behavior after higher-rate exposure, if irradiated at a temperature that was high enough to enhance the annealing of holes in metastable traps (and/or slowly transporting holes) at high dose rates, but low enough that holes in deeper traps are not significantly affected [112]. Figure 44 verifies that prediction for XFCB devices [1 12]. The triangles represent the normalized excess base current (responsible for the enhanced gain degradation) as a function of dose rate for XFCB transistors irradiated with 10keV x rays at 25”C. The squares are 60°C irradiations of the same devices. At 200 rad(SiOz)/s, the 60°C data match the low-rate 25°C data exactly. At 20 (SiOz)/s, the 60°C show even greater
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degradation than at low dose rates. However, some annealing apparently occurs at 60”C at the lowest rate shown here, -1.7 rad(SiOz)/s. The results of Fig. 44 strongly reinforce the ideas behind the model of enhanced gain degradation at low dose rates outlined in Ref. [1 12], as do preliminary results on RBCMOS devices. Moreover, Johnston et al. also have irradiated LM324 operational amplifiers, with sensitive substrate PNP’s, that show similar dose rate effects [181]. Their results are shown in Fig. 45. Here the parts irradiated at elevated temperature clearly show a response that is degraded from that at 25”C, but the low-rate response is worse still. Thus, more work is required to determined whether elevated-temperature irradiations might fill the same role as do elevated-temperature anneals in rebound testing of MOS devices [112,180,181]. 6
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Dose Rate [rad(SiO 2)/s] Figure 44: Excess base current (normalized to preirradiation values) versus x-ray dose rate and irradiation temperature for ADI XFCB devices irradiated to 100 krad(Si02) at OV bias. (After Ref. [112].) Kosier et al. [184] have reported that the amount of gain degradation possible in bipolar structures like that depicted in Fig. 40 is ultimately limited by geometric factors that are independent of device bias or radiation dose rate. Thus, if a given bipolar device or circuit can still operate successfully after receiving the large amount of radiation (typically more than 1,0 h4rad(SiOz)) required to reach this level of saturation, the difficult testing issues posed above can be avoided [184], For many types of devices, however, failure occurs at lower levels, and testto-saturation is not an option. At the present, it seems that one must perform detailed characterization testing of bipolar devices and circuits that are intended for use in a low-dose-rate environment. Once the basic response is characterized, then some combination of low-rate tests (e.g., at a rate below 10 rad(Si02)/s), elevated temperature irradiation, and/or use of safety factors must be combined to provide a consemative test of bipolar/13 iCMOS devices prone to failures due to gain degradation in low-dose-rate radiation environments [1 12,179,180,187]. Clearly, defining improved standard hardness assurance tests for bipolar and BiCMOS devices is an important area for future work.
111-50
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20
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Figure 45: Change in input bias current as a Ilmction of dose, dose rate, and irradiation temperature for LM324 operational amplifiers, (After Ref. [181].) 7. QML Many of the test methods described in Section 5 above, though based on a first-principles understanding of total-dose radiation effects, were designed to be applied without any special knowledge about the radiation response of the devices being tested. A clear example is TM 1019.4, in which the main test flow can be applied to consematively test MOS devices for tactical or space applications even without the requirement for characterization testing to understand the response of the particular devices being tested. While this has advantages from the standpoints of standardization and simplicity, it also may lead to increased qualification costs for some types of devices. For example, if a given technology has been processed so that an insignificant number of interface traps are created at the dose levels of interest, why go to the time and expense of performing rebound testing? This issue was explored in Section 5.7 above for devices which “happened” to have been processed acceptably to meet these conditions. Recently, there has been a lot of interest in applying some of the time and expense heretofore spent on lot acceptance testing to improve the underlying radiation response of a particular process, and then use the knowledge developed in improving the process to reduce hardness assurance costs. That is, apply resources to “build in” the quality, not try to shake it out during testing. This is the cornerstone of the Qualified Manufacturers List (QML) approach to radiation hardness assurance [15- 19]. The QML methodology will be described in more detail by Nick van Vomo in the next section of the course [52], but I will introduce the topic briefly here in the context of qualifying MOS devices for use in space applications.
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The basic principle that underlies the QML approach to radiation hardness assurance is illustrated schematically in Fig. 46 [18]. On the y-axis are savings, represented by reduced hardness assurance costs. On the x-axis is knowledge, which is obtained from studies of the fundamental radiation response of a given process, and from implementing that knowledge via improved processes. With very little knowledge about the response of a process, one must resort to simple, conservative tests--like TM 1019.4 for space environments, or like LINAC testing for high-doserate weapon environments. If one increases his or her knowledge about a process, and finds that a few basic parameters control the radiation response (for example, nMOS transistor interfacetrap buildup or field-oxide threshold-voltage shifts), one can shift the lot acceptance problem from a circuit-assessment task to a test-structure assessment task [16-19,61]. And test structures are much easier and less expensive to test than IC’s. Finally, if one can isolate the critical areas of a process that determine the hardness of a given technology, radiation hardness assurance for that technology ultimately could be accomplished via process control verification [18]. For example, in-line statistical process control of initial threshold voltages, gate- and field-oxide thicknesses, and post-oxidation annealing temperatures may satis@ the needs of some low-dose (e. g., less than 5-10 krad(SiOz)) tactical weapon applications [16,141]. Unfortunately, Figure 46 is easier to think about schematically than to apply in a verifiable way to actual IC technologies. However, the spirit of this process can certainly be useful in minimizing testing costs, as we discussed briefly in Section 5 above, and as we further illustrate in the discussions that follow.
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DETAILED
EXPERIMENTS ON TEST STRUCTURES
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KNOWLEDGE Figure 46: Key correlationsrequired to increase one’s knowledge about a process technology to realize
cost savings in hardness assurance testing. (After Ref. [18].) A key element of a cost-effective QML program is wafer-level irradiation of test structures using a 10-keV x-ray irradiator, or an equivalent technique (if available), to ensure that appropriate process control is maintained [16-18,61]. As one example of a historical record of such data, consider Fig. 47. This is a chart of threshold-voltage shiils due to oxide-trap charge and interface-trap charge for Sandia’s 3-pm radiation-hardened “Mod-B” process. Taking this one
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step t%rther, Fig. 48 shows a AVit control chart based on the same da@ with deviations from statistical process control (SPC) marked with solid symbols. The reader is directed to Ref. [18] for a discussion of what it means to be under SPC, and how deviations from SPC can be identified and corrective measures taken. 2
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Figure 48: SPC of interface-trap charge for the data of Fig. 47. Average values (X-bar) and upper and lower control limits (I-JCLand LCL) are indicated. SPC violations are denoted by solid symbols. (After Ref. [18].)
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Although one can see several “glitches” through the years that the process was monitored, some attributable to identifiable changes (mostly unintended) in the processing and some not traceable to a clear origin, it can be seen that the process was generally centered around welldefined mean values for interface- and oxide-trap charge densities. These were reasonably small for applications requiring total-dose hardness of- 500 krad(Si02) or less. This is a very reasonable hardness “capability” level for a radiation-hardened technology with - 45-rim oxide thickness. Just as importantly, the deviations were manageable, and it was verified over the course of running the process that IC’S whose test structures remained under control always passed lot acceptance tests [16- 18]. Conversely, a lot that showed poor test structure data occasionally had After a while, the only reason we kept doing the IC tests at trouble in meeting specifications. Sandia on a regular basis on the parts that came from the lots processed during periods when the line was under demonstrated process control was because contracts forced us to do so! The idea behind QML is to allow such “wasted” lot acceptance tests to be waived if sufficient control of the process is demonstrated. 25
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5
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8
AVlt (Volts) Figure 49: Change in read access time versus nMOS transistor AVit for static RAMs and test transistors from Sandia’s Mod B technology. RAMs were irradiated in a Cs- 137 source at 0.2 rad(SiOJ\s, and
transistors were irradiated with 10-keV x rays at 16.7 krad(Si02)/s. Doses corresponding to data points (left to right along the line) are 84,280,420,840, and 1120 krad(Si02), respectively, (After Ref. [18].) As one example of how the QML test methodology can be applied to streamline lot acceptance testing, consider Fig. 49. Here, the change in read access time is plotted for a 2k static RAM as a fi-mction of the threshold voltage shift due to interface-trap charge measured at the wafer level immediately after processing [18]. An obvious correlation is present, suggesting that one could use these test structure data as a measure of the circuit response. That is, as long as interface-trap charge densities during wafer level testing remain below those at which the IC still
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functions acceptably, the process is verified to be under sufficient control that lot acceptance testing with respect to this parameter is not required. Of course, tests to ensure control of oxidetrap charge in the gate and field oxide would also normally be required. The QML approach to radiation hardness is still undergoing growing pains, being relatively new in philosophy compared to more traditional approaches based on simple lot acceptance testing of IC’S. Time will be required for vendors and users to agree on what must be measured to ensure that proper control of a process is being maintained, so that the fidl cost-saving capabilities of QML can be realized [15-19,52]. However, there is no doubt that some elements of QML (i. e., knowledge-based reduction in lot acceptable tests) are very usefhl, indeed essential, to defining cost-effective radiation hardness assurance test plans in the Mure,
8. Non-destructive
Testing
Until now we have been discussing test methods that involve either imdiating a lot sample of the devices of interest (e. g., TM 1019.4), or a test structure that serves as a hardness verification surrogate. There has been a lot of interest in the past on trying to find electrical tests that can be used to predict, before irradiation, the hardness of an individual IC or device. An extensive report on early activities was generated by Ron Pease in 1978 [190]. Basically, his conclusion was a lot of things made sense to try, but nothing really worked convincingly. This general rule remains true today for integrated circuits having more than a few transistors. It has been shown recently that, for discrete MOS transistors or perhaps small-scale circuits in which individual transistor response can be isolated, the preirradiation l/jnoise of the transistor can predict the postirradiation oxide-trap charge [142, 191-1 94]. This correlation is illustrated in Fig. 50, for five different wafers processed with different gate oxidation snd annealing treatments from the same lot, but with all other process steps being identical [112, 191-193]. The preirradiation noise power scales exactly with the postimadiation AVot for these devices. This correlation evidently occurs because both the preirradiation noise and postirradiation AVot are proportional to the density of oxygen vacancieshacancy complexes in the oxide [195]. A correlation similar to that in Fig. 50 was noted for these devices between the preirradiation channel resistance and the postirradiation AVit [196], but this is more difllcuh to exploit for a hardness assurance test, for reasons discussed in Ref. [192]. Unfortunately, it is difficult to extend these correlations to integrated circuit tests, which have more interest and impact on hardness assurance testing. Moreover, preirradiation tests for field oxide isolation (other than measurements of the initial field oxide threshold vol~) are not possible in an integrated circuit, since the parasitic field oxide transistor characteristics are only accessible after the device is irradiated. Some promise has been demonstrated for using l/’noise as a screen for power MOSFETS [197]; however, more work is needed to determine the utility of the method, We conclude that non-destructive tests of radiation hardness using l/~noise can be performed (at most) on discrete transistors and small-scale circuits, but it is unlikely that such a method can be developed with general applicability to large-scale IC’S.
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I
1O-”L 0.1
A D. M. Fleetwood and J. t-f. Scofield, Phys. Rev. Let t. 64, 579 (1990) 1
1
1 0.3
1
t
m 1 &a I 1.0
1
I 3.0
1
1 1 1 1I I 10
-AVOT (V) Figure 50: Postimadiation AVOtversus preirradiation noise magnitude for MOS transistors with five different gate oxide processes. Wafers D and E received an 1100”C Nz anneal to additionally soften the oxide; wafers A-C did not receive this anneal. (After Refs. [112,191-193].) 9. Conclusions
and Future Trends
A first-principles approach to radiation hardness assurance was described that provides the technical background for the present US and European total-dose radiation hardness assurance test methods for MOS technologies, TM 1019.4 and BS 22900. These test methods could not have been developed otherwise, as their existence depends not on a wealth of empirical comparisons of IC data from ground and space testing, but on a fundamental understanding of MOS defect growth and annealing processes [16, 113]. Because defect growth and annealing, and their effects on device response, can differ strongly in MOS and bipolar devices, it is not possible to apply the same rebound tests to bipolar devices that have been successfully applied to MOS devices in space applications [182-187]. Work continues to develop an optimized test for bipolar devices in space applications [180]. Rebound testing should become less of a problem for advanced MOS small-signal electronics technologies for systems with total dose requirements below 50-100 krad(SiOz) because of trends toward much thinner gate oxides [104]. For older technologies with thicker gate oxides and for power devices, rebound testing is unavoidable without detailed characterization studies to assess the impact of interface traps on device response in space [22,23,104]. Commercial technologies will continue to be limited by positive trapped charge in their field oxides. For low dose rate applications, the annealing rate offield-oxide leabge will be one of the most important parameters determining whether or not a given commercial MOS device or
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IC can be used in the natural space environment. This is not yet recognized in hardness assurance test methods like TM 1019.4, and must be fmtored into fi.dure test methods and guideline documents, as discussed in detail in Section 5,8 above. The QML approach is promising for fiture hardened technologies. A sufficient understanding of process effects on radiation hardness has been developed that we should be able to reduce testing costs in the future for hardened parts. Of course, this point may be moot if the present trend continues toward the increasing use of commercial parts in space systems [52,139]. On a commercial line, one cannot derive benefits fi-om knowledge gained during part development and characterization, because factors controlling radiation hardness are not identified and controlled. In the fiture, it seems prudent for hardness assurance standards to allow more relief to manufacturers who attempt to build in the quality via QML, and not just assess the innate hardness of an as-built commercial part. Finally, to paraphrase an old joke, nondestructive testing is the “Holy Grail” of total-dose radiation hardness assurance for IC’S, and probably always will be. It is hoped that the above discussions have demonstrated that the foundation for costeffective hardness assurance tests is laid with studies of the basic mechanisms of radiation effects. Without a diligent assessment of new radiation effects mechanisms in fiture technologies, we cannot be assured as a community that the present generation of radiation test standards will continue to apply. Witness the difilculties qualifying bipolar devices and IC’s at present. If the past tells us anything, it is that there will always be these kinds of surprises to deal with. I would rather deal with these surprises up front during the device characterization or hardness assurance phase of a project than in assessment of a field failure. It is hoped that there will be budget enough in the future to do so.
10. Acknowledgments I wish to thank my Sandia colleagues and fiends Peter Shaneyfelt, Fred Sexton, Bill Warren, Paul Dressendorfer, Tim Beutler, Leonard Riewe, and Sylvia Tsao for their patience, course of our hardness assurance studies on MOS devices.
Winokur, Jim Schwank, Marty Meisenheimer, Dick Reber, Dave support, and guidance over the I also would like to thank Ron
Schrimpf, Steve Kosier, Nathan Nowlin, Mike DeLaus, Ron Pease, Dawn Schmidt, Russ Graves, and Bill Combs for their assistance with bipolar device testing, and John Scofield and his students at Oberlin for assistance with the l~noise and non-destructive testing. Also thanks to Lew Cohn, Harvey Eisen, and Dennis Brown for partial fimding support from DNA, as well as for many helpfi.d discussions on hardness assurance test standards. Finally, thanks go to the members of the NASA/SSD Space Parts Working Group and the DNA Time Dependent Effects Working Group for providing user and vendor perspectives and sanity checks on hardness assLuance testing recommendations.
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References 1. P. S. Winokur, J. R, Schwank, P. J. McWhorter, P. V. Dressendorfer, and D. C. Turpin, “Correlating the Radiation Response of MOS Capacitors and Transistors,” IEEE Trans. Nuc1. Sci. 31, 1453 (1984). 2.
P. J. McWhorter and P, S. Winokur, “Simple Technique for Separating the Effects of Interfaee Traps and Trapped-Oxide Charge in MOS Transistors,” Appl. Phys. L&t. 48, 133 (1986).
3.
R. L, Pease, A. H. Johnston, and J. L. Azarewicz, ‘Radiation Testing of Semiconductor Devices for Space Electronics,” 1990 IEEE NSREC Short Course, Reno, NV.
4.
R. L. Pease, A. H. Johnston, and J. L. Azarewicz, “Radiation Testing of Semiconductor Devices for Space Electronics,” Proc. IEEE 76, 1510 (1988).
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A. Holmes-Seidle, “Predicting End-of-Life Performance of Microelectronics in Spaee~ Radiat. Phys. Chem. 43,57 (1994).
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8.
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9,
L. Henderson, L. Simpkins, A. Namenson, A, Campbell, J. Ritter, and E. Wolicki, “A PraeticaI System Hardness Assurance Program,” IEEE Trans. Nucl. Sci. 40, 1725 (1993).
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19. D. R. Alexander, “Implications of QML Reliability Procedures for Radiation Hardness Assurance,” 1990 IEEE NSREC Short Course, Reno, NV. 20. R. D. Schrimpf, P. J. Wahle, R. C. Adrews, D. B. Cooper, and K. F. Galloway, “Dose Rate Effects on the Total-Dose Threshold-Voltage Shift of Power MOSFETS,” IEEE Trans. Nucl. Sci, 35, 1536 (1988); G. Singh, K. F. Galloway, and T. J. Russell, “Temperature-Induced Rebound in Power MOSFETS,” LEEETrans. Nucl. Sci. 34, 1366 (1987). 21. J. Desko, “Application of Power ICS and Smart Power to Space Systems,” 1991 IEEE NSREC Short Course, San Diego, CA. 22. P. Khosropour, K. F. Galloway, D. Zupac, R. D. Schrimpf, and P. Calvel, “Application of Test Method 1019.4 to Non-Hardened Power MOSFETS,” IEEE Trans. Nucl. Sci. 41,555 (1994), 23. P. Khosropour, D. M. Fleetwood, K, F. Galloway, R. D. Schrimpf, and P. Crdvel, “Evaluation of a Method for Estimating Low-Dose-Rate Irradiation Response of MOSFETS,” IEEE Trans. Nucl. Sci. 41,2560 (1994). 24. M, A, Xapsos, G. P, Summers, C. C. Blatchley, C. W. Colerico, E. A. Burke, S. R. Messenger, and P. Shapiro, “CO-60 Gamma Ray and Electron Displacement Damage Studies of Semiconductors,” IEEE Trans. Nucl. Sci. 41, 1945 (1994). 25. G. P. Summers, E. A. Burke, P. Shapiro, S. R. Messenger, and R. J. Walters, “Damage Correlations in Semiconductors Exposed to Gamm~ Electron, and Proton Radiations,” IEEE Trans. Nucl. Sci. 40, 1372 (1993). 26. S, Roosild and R. Zuleeg, “Radiation Effects on GaAs Technologies,” 1988 IEEE NSREC Short Course, Portland, OR. 27, G. P. Summers, E. A. Burke, M. A. Xapsos, C. J. Dale, P. W. Marshall, and E. L. Petersen, “Displacement Damage in GaAs Structures,” IEEE Trans. Nucl. Sci. 35, 1208 (1988). 28. E. A. Burke, C. J. Dale, A. B. Campbell, G. P. Summers, T. Palmer, and R. Zuleeg, “Energy Dependence of Proton-Induced Displacement Damage in GaAs,” IEEE Trans. Nucl. Sci. 34, 1220 (1987). 29. A. Meulenberg, C. M. Dozier, W. T. Anderson, S, D. Mittleman, M. H. Zugich, and C. E. Caefer, “Dosime~ and Total Dose Radiation Testing of GaAs Devices,” IEEE Trans. Nucl. Sci. 34, 1745 (1987), 30. A. B. Campbell, A. R. Knudson, W. J. Stapor, G. Summers, M. A. Xapsos, M. Jessee, T. Palmer, R. Zuleeg, and C. J. Dale, “Particle Damage Effects in Gtis JFET Test Structures,” IEEE Trans. Nucl. Sci. 33, 1435 (1986). 31. G. R. Hopkinson, “Radiation Effects on Solid State Imaging Device,” Radiat. Phys. Chem. 43, 79 (1994). 32.1, H. Hopkins, G. R. Hopkinson, and B. Johlander, “Proton-Induced Charge Transfer Degradation in CCDS for Near-Room Temperature Applications,” IEEE Trans. Nucl. Sci, 41, 1984 (1994). 33. J. R. Srour, “Radiation Effects R & D in the 1970’s: A Retrospective View,” IEEE Trans. Nucl. Sci. 41,2660 (1994). 34. C. J. Dale, P. Marshall, B. Cummings, L. Shamey, and A. Holland, “Displacement Damage Efkcts in Mixed Particle Environments for Shielded Spacecraft CCDS,” IEEE Trans. Nucl. Sci. 40, 1628 (1993),
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IEEE Trans.
154, J. A. Halbleib and T, A. Melhorn, “ITS: The Integrated TIGER Series of Coupled Electron/Photon Monte Carlo Transport Codes,” Nucl. Sci, Eng. 92,338 (1986). 155. L. J. I.mrence, Jr., W. E. Nelson, and J. E. Morel, “Coupled Eleciron-Photon Transport Calculations Using the Method of Discrete Ordinates,” IEEE Trans. Nucl. Sci. 32,4416 (1985). 156. D. E. Beutler, D, M. Fleetwood, W. Beezhold, D. Knom L. J. Lorence, Jr., and B. L, Draper, “Variations in Semiconductor Device Response in a Medium-Energy X-ray Dose-Enhancing Environment,” IEEE Trans. Nucl. Sci. 34, 1544 (1987). 157. C. M. Dozier, D. B. Brown, J. L. Throckmorton, and D. I. M% “Defect Production in SiOz by X-ray and CO-60 Radiations,” IEEE Trans. Nucl. Sci. 32,4363 (1985). 158. D. M. FleetWood, P. S. Winokur, R. W. Beegle, P. V. Dressendorfer, and B. L. Draper, “Accounting for Dose-Enhancement Effects with CMOS Transistors,” IEEE Trans. Nucl. Sci. 32,4339 (1985). 159. T. R. Oldham and J. M. McGarrity, “Comparison of CO-60 Response and 10-keV X-ray Response in MOS Capacitors,” IEEE Trans. Nucl. Sci. 30,4377 (1983). 160. C. M. Dozier and D. B. Brown, “Photon Energy Dependence of Radiation Effects in MOS Structures,” IEEE Trans. Nucl. Sci. 27, 1294(1980). 161. D. M. Fleetwoo~ P. S. Winokur, C. M. Dozier, and D. B. Brown, “Effects of Bias on the Response of MOS Devices to Low-Energy X-ray and CO-60 Irradiation,” Appl. Phys. Lett. 52, 1514 (1988). 162. J. R. Srour and K. Y. Chiu, “MOS Hardening Approach for Low-Temperature Application,” IEEE Trsns. Nuc1. Sci. 24,2140 (1977). 163. S. S. Tsao, D. M. Fleetwood, H. T. Weaver, L. Pfeiffer, and G. K. Celler, “Radiation-Tolerang Sidewall-Hardened SOI/MOS Transistors,” IEEE Trans. Nucl. Sci. 34, 1686 (1987). 164. G. E. Davis, H. L. Hughes, and T. I. Kamins, “Total Dose Radiation-Bias Effects in LaserRecrystallized SOI MOSFET’S,” IEEE Trans. Nucl. Sci. 29, 1685 (1982). 165.0. Flamen~ D. Herve, O. Musseau, Ph. Bonnel, M. Raffaelli, J. L. Leray, J. Margail, B. Giffard, and A. J. Auberton-Heme, “Field Dependent Charge Trapping Effects in SIMOX Buried Oxides at Very High Dose,” IEEE Trans. Nucl. Sci. 39,2132 (1992). 166. H. E. Boesch, Jr., T. L. Taylor, L. R. Hite, and W. E. Bailey, “Time-Dependent Hole and Electron Trapping Effects in SIMOX Buried Oxides,” IEEE Trans. Nucl. Sci. 37, 1982 (1990). 167. F. T. Brady, W. A. Krull, and S. S. Li, “Total Dose Radiation Effects for Implanted Buried Oxides,” IEEE Trans. Nucl. Sci. 36,2187 (1989). 168. M. Matloubian, E. J. Zorinsky, and D. B. Spratt, “Total Dose Radiation Characterization of SOI MOSFETS Fabricated Using Islands Technology,” IEEE Trans. Nucl. Sci. 35, 1650 (1988). 169. M, R. Shaneyfelt D. M. FleetWood, J. R. Schwank, T. L. Meisenheimer, and P. S. Winokur, “Effects of Burn-In on Radiation Hardness,” IEEE Trans. Nucl. Sci. 41,2550 (1994). 170. E. W. Enlow, R. L. Pease, W. E. Combs, and D. G. Platteter, “Total Dose Induced Hole Trapping in
Trench Oxides,” IEEE Trans. Nucl. Sci. 36,2415 (1989). 171. R. L. Pease, D. Emily, and H. E. Boesch, Jr., “Total Dose Induced Hole Trapping and Interface State Generation in Bipolar Recessed Field Oxides,” IEEE Trans. Nucl. Sci. 32,3946 (1985). 172. R. L. Pease, R. M. Turfler, D. Platteter, D. Emily, and R. Blice, “Total Dose Effects in Recessed Oxide Digital Bipolar Microcircuits,” IEEE Trans. Nucl. Sci. 30,4216 (1983).
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173, S. L, Kosier, A. Wei, R. D. Schrimpf, D. M. Fleetwood, M. DeLaus, R. L, Pease, and W. E. Combs, “Physically-Based Comparison of Hot-Camier-Induced and Ionizing-Radiation-Induced Degradation in BJTs,” IEEE Trans. Electron Dev. 42,436 (1995). 174, S. L. Kosier, R, D. Schrimpf, R. N. Nowlin, D. M. Fleetwood, R. L. Pease, M, DeLaus, W. E. Combs, A, Wei, and F. Chai, “Charge Separation for Bipolar Transistors,” IEEE Trans. Nucl. Sci. 40, No. 6, 1276 (1993). 175, A, R. Harg J. B. Smyth, V. A. J. van LinC D. P. Snowden, and R. E. Leaden, “Hardness Assurance Considerations for Ixmg-Term Ionizing Radiation Effects on Bipolar Structures,” IEEE Trans. Nucl. Sci. 25, 1502 (1978). 176. L. L. Sivo, H. L, Hughes, and E. E. King, “Investigation of Radiation-Induced Interface States Utilizing Gated-Bipolar and MOS Structures,” IEEE Trans. Nucl. Sci. 19, 313 (1972). 177, S. Feindt, J-J. J. JaJar. J. Lapham, and D. Buss, “XFCB: A High Speed Complementary Bipolar Process on Bonded SOI,” IEEE BCTM Tech. Digest, 264 (1992). 178. A. Wei, S. L. Kosier, R. D. Schrimpf, D. M. Fleetwood, and W. E. Combs, “Dose-Rate Effects on Bipolar Junction Transistor Gain Degradation,” Appl. Phys. Lett. 65, 1918(1994). 179, D. M. Schmidt, R. J. Graves, R. D. Schrimpf, D. M. Fleetwood, R. N. Nowlin, and W. E. Combs, “Comparison of Ionizing Radiation Induced Gain Degradation in Lateral, Substrate, and Vertical PNP BJTs,” to be presented at 1995 IEEE NSREC, Madison, WI, and submitted to Dec. 1995 IEEE Trans. Nucl. Sci. 180, R. J. Graves, D. M. Fleetwood, D. M. Schmidz R. N. Nowlin, R. D. Schrirnpf, W. E. Combs, R. L. Pease, and M, DeLaus, “Hardness Assurance Issues for Lateral PNP Bipolar Junction Transistors,” to be presented at 1995 IEEE NSREC, Madison, WI, and submitted to Dec. 1995 IEEE Trans. Nucl. Sci. 181. A. H, Johnston, G. M. Swift, and B. G. Rax, “Total Dose Effects in Conventional Bipolar Transistors and Linear Integrated Circuits,” IEEE Trans. Nucl. Sci. 41,2427 (1994). 182. E. W. Enlow, R. L. Pease, W. Combs, R. D. Schrimpf, and R. N. Nowlin, “Response of Advanced Bipolar Processes to Ionizing Radiation,” IEEE Trans. Nucl. Sci. 38, 1342 (1991). 183. R. N. Nowlin, D. M. Fleetwood, R. D. Schrimpf, R. L. Pease, and W. E. Combs, “HardnessAssurance and Testing Issues for Bipolar/BiCMOS Devices,” IEEE Trans. Nucl. Sci. 40, 1686 (1993). 184. S. L. Kosier, W. E. Combs, A. Wei, R. D. Schrimpf, D. M. Fleetwood, M. DeLaus, and R. L. Pease, “Bounding the Total Dose Response of Modem Bipolar Transistors,” IEEE Trans. Nucl. Sci. 41, 1864 (1994). 185. J. Beaucour, T. Carriere, A. Gach, D. Laxague, and P. Poirot, “ToM Dose Effects on Negative Voltage Regulator,” IEEE Trans. Nucl. Sci. 41,2420 (1994). 186. S. McClure, R. L. Pease, W. Will, and G. Pemy, “Dependence of Total Dose Response of Bipolar Linear Microcircuits on Applied Dose Rate,” IEEE Trans. Nucl. Sci. 41,2544 (1994). 187. R. N. Nowlin, D. M. Fleetwood, and R. D. Schrimpf, “Saturation of the Dose-Rate Response of Bipolar Transistors Below 10 rad(Si02)/s: Implications for Hardness Assurance,” IEEE Trans. Nucl. Sci. 41,2637 (1994). 188. R.N. Nowlin, E, W. Enlow, R. D. Schrimpf, and W. E. Combs, “Trends in the Total-Dose Response of Modem Bipolar Transistors,” IEEE Trans. Nucl. Sci. 39,2026 (1992).
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189. W. L, Warren, M. R. Shaneyfelt, J. R. Schwank, D. M. Fleetwood, P. S. Winokur, R. A. B. Devine, W, P. Maszara, and J. B. McKitterick, “Paramagnetic Defect Centers in BESOI and SIMOX Buried Oxides,” IEEE Trans. Nucl. Sci, 40, 1755 (1993). 190. R. L. Pease, “Identification
and
Verification of Total Dose Hardness Assurance Techniques,”
BDM/TAC-78-764-TR (1978). 191.
D. M. FleetWood, T. L. Meisenheimer, and J. H. Scofield, “1/&_Noiseand Radiation Effects in MOS Devices,” IEEE Electron Dev. Lett. 41, 1953 (1994).
192. J, H. Scofield and D, M, Fleetwood, “Physical Basis for Nondestructive Tests of MOS Radiation Hardness,” IEEE Trans. Nucl. Sci. 38, 1552(1991). 193. J. H. Scofield, T. P. Doerr, and D. M. Fleetwood, “Correlation Between Preirradiation l/f Noise and Postirradiation Oxide-Trapped Charge in MOS Transistors,” IEEE Trans. Nucl. Sci. 36, 1946 (19s9). 194.
L. K. J. Vandamme, X. Li, and D. Rigaud, “l/’Noise in MOS Devices: Mobility or Number Fluctuations?” IEEE Trans. Electron Dev. 41, 1936(1994).
195.
D. M. FleetWood, W. L. Warren, M. R. Shaneyfelt, R. A. B. Devine, and J. H. Scofield, “Enhanced MOS I/&Noise due to Near-Interracial Oxygen Deficiency,” accepted for publication, J. Non-Crys. Solids (1995).
196. J. H. Scofield, M. Trawick, P. Klimecky, and D. M. Fleetwood, “Correlation Between Preirradiation Channel Mobility and Radiation-Induced Interface-Trap Charge in MOS Transistors,” Appl. Phys, Lett. 58,2782 (1991). 197. P. Augier, J. L. Todsen, D. Zupac, R. D. Schrimpf, K. F. Galloway, and J. A. Babcock, “Comparison of 1/’Noise in Irradiated Power MO SFETS Measured in the Linear and Saturation Regions,” IEEE Trans. Nucl. Sci, 39,2012 (1992).
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1995 NSREC SHORT COURSE
Advanced Test Methodologies
Nick van Vonno
Harris Semiconductor
Iv
NSREC ’95 SHORT COURSE - SECTION 4 Section
Oblective
While this section is entitled “Advanced Test Methodologiesm perhaps a more appropriate name would be “Radiation Testing: The Manufacturers Perspective” since that is what we will seek to provide. In that sense the Short Course provides a fairly logical flow: it leads off with two sections on the basic technical considerations of radiation testing with focus on total dose and single event effects, taught appropriately enough by recognized experts from government. The student will gain insight from a vigorous, almost “pure science” approach to these two disciplines. Section 3 takes this basic material and views it from the semimnductor manufacturers perspective; he is not interestad in science, but would like to ship compliant parts! The emphasis here is on practical testing and standards, first in the context of traditional approaches and then from the standpoint of today’s rapidly changing markets. Sedlon 4 shifts perspectives to the system integrator, who is the semimnductor vendor’s direct wstomer and whose interests are different again.
Section Roadmap ●
Review some terms and definitions.
●
Review total dose testing, including wafer and package level testing, test correlations and dose rate effects.
●
Review dose rate testing.
●
Tie these topics together in a review of in-orbit verification.
●
Digress to cryogenic radiation testing, a little out of sequence but a topic of current interest.
●
Summarize limits of traditional approaches.
●
Introduce and review the QML concept, including certifications, methodology and SPC applications.
●
Compare US standards to European standards.
●
Review several somewhat disparate future trends, including dose packaging, bumin effects and the impact of current commercial off-the-shelf (COTS) mandates.
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NSREC ’95 SHORT COURSE - SECTION 4
1.
Traditional
1.1.
Introduction
Approaches
In this section of the Short Course we first review conventional test methods for total dose, SEE and transient environments. These methods have been developed to a high degree of maturity but as device complexity inweases and ASIC applications extend to hardened systems, alternatives have become necessary to control costs leading to advanced methods such as QML.
1.1.1. Definition of Hardened Pafts Radiation Hardness Assured (RHA) pads are semiconductor components that have demonstrated predictable performance after inadiation to a specified level. These parts can include those specifically designed and processed for hardness as well as commercial parts that have been characterized for hardness. Clearty the higher levels of radiation will require specialized processing and design using post-red models to predict performance. Procurement of RHA components has been defined by military standards such as Ml L-S-l 9500 (discrete components) and MIL-M-3851O (microcircuits), while test methods are incorporated in to the environmental test draw-rigs MIL-STD-750 and MIL-STD883. Recent trend has been towards Qualified Manufacturer Listing (QML) based qualification as defined by MIL-I-38535, a topic we will cover in detail later on. A second, less cJeariy defined category is that of radiation-tolerant parts. These components feature lower radiation levels and are typically commem-al parts that have been characterized by radiation testing; they are then sold against this experimentally defined radiation spec. Implicit in this approach is the possible sudden disappearance of the part’s hardness capability due to process changes in what is basically an uncontrolled situation. Nonetheless these red-tolerant patis can be effective in many programs, given adequate lot screening and qualification procedures. 1.1.2.
Testing Testing is the key pati of a well structured hardness assurance program. Its primary objective is the verification of hardness performance, usually on a lotby-lot basis; this will also allow establishment of a database of hardened parts. These databases[’2Jq are useful in selecting hardened parts or assessing the potential hardness of standard commercial parts. They can also be used for verifying hardening techniques and understanding basic radiation damage mechanisms.
1.2.
Total
Dose Testing
Since the first section of the Shotl Course has covered total dose testing in great detail this section will be kept brief. The standard US method for total dose acceptance
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testing is MI L-STD-883 Test Method 1019.4; it describes procedures for testing in a ‘Co source at moderate dose rates, and has been in use for a number of years. The procedure also specifies accelerated aging evaluation as a means for estimating low dose rate radiation effects. Total dose testing can also be performed using an alternative source, usually an Aracor x-ray system; this has a major advantage in being able to do acceptance testing at the wafer level and is of current interest in the context of QML approaches, both for qualification testing and process monitoring. It is well adapted to wafer-level testing since X-ray irradiation of packaged devices suffers from limited penetration of the 10 KeV photons, Correlation to ‘Co results[”q is provided by ASTM Standard ASTM-F 1467, “Standard Guide for the use of an X-ray Tester -10 KeV Photons) in Ionizing Radiation Effects Testing of Microelectronic Devices”. L While this correlation requires careful attention to device physics and test conditions, it is accurate and enables qualification testing to be wried out in a predictable manner. In particular, dose enhancement effects need to be taken into account; electrons absorbed in one region of the device can deposit energy in other regions through electron transpoti and diffusion. High-Z materials such as W or Ta used for siliciding operations can provide substantial dose enhancement. Dose enhancement factors as high as 2.5 have been reported.m Alternatives to ‘Co and 10 KeV X-ray sources include linear accelerators (LINAC) that deposits high-energy (20 MeV) electrons at high dose rate to the order of 10g rad(Si)/sec. This approach is best suited to high levels of total dose irradiation. Finally radioisotopes such as ‘Sr and ‘37CS are in use and are convenient laboratory sources. From a simulation fidelity standpoint, most of these sources have rather narrow energy ranges as compared with the attenuated, broad spectrum that reaches actual components after passing through the shielding of spawxaft structures. It should also be noted that Method 1019.4 specifies a greatly accelerated dose rate in comparison to actual natural environments; the actual dose rate specified[8] is from 50 rads(Si)/sec to 300 mds(Si)/sec. 1019.4 does permit dose rates outside this range if mutually agreed upon. The use of Gammacells and so on introduces reflections and dose enhancement, and accurate dosimetry is still a key requirement. Packaging also plays a role and dose enhancement can occur here as well. The low energy (1O Kev photons) of x-ray sources leads to significant absorption k# packaging materials,and this effect is a component of the correlation issue between Co and x-ray results. The table below summarizes total dose radiation sources and some of their characteristics.
Table 1: Total Dose Radiation Source Sourca
Type
Enargy
Doss Rata
‘co
Photon
1.25 MeV
104-103 rads(si)kec
103-1 d radqsi)tsec 103-104 rads(Si)/sec 103-1011 rads(Si)/sec (pulse mode)
Natural Environment
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Electrons Protons Photons
1 MeV 100 MeV
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A subject of great cunent interest is the effects of low dose rate radiation on commercial pads. Recall that ground testing proceeds at dose rates in the 150-300 md(Si)/sec range of ‘Co sources and that dose rates in space are much lower, in the .001 -.01 rad(Si)/sec ran e. MOS technology response to low dose rates has been extensively investigated. A Charge separation techniques[’q have been used to develop test standards that enable the testing of MOS parts at high dose rates, followed by high temperature anneals. [”] These techniques separate the interface trap density (NJ and the fwed charge at the SiOJSi interface (Nd), enabling correlation with the respective threshold voltage shift components AVnand AVd. The degradation mechanisms in bipolar devices are dearly much different. Degradation of current gain is caused by excess base current increases; these occur under imadiation by charge deposition in the oxide over the active base area. Excess base current components are determined by surface recombination velocity and depletion layer spreading; both are caused by net positive charge (N4 in the oxide. Bipolar oxides are not as ‘clean” as MOS oxides, in particular because of ion implantation damage, and are very effective at trapping positive charge. The actual mechanism responsible for the low dose rate sensitivity of these structures is implicated by the fact that there are two components to the radiation damage. “q Analysis of these mechanisms has shown that the increased degradation at low dose rate is caused by large amounts of net trapped charge in the base oxide at lower electric fields. [’a This increased amount of charge has been found to lead to much larger excess base cuments, in some cases as high as 10 times. The dependence of Albon Na has been shown [’41to be proportional to exp (NU2), explaining the severe gain degradation encountered. An excellent treatment by Nowlin, et al[’a shows the low dose rate sensitivity saturating below 10 rads(Si)/second, using data for dose rates mnging from .01 md(Si) to 1760 rad(Si)/sec. Fig. 1 shows the dose rate dependence of the excess base current for singl~poly SOI NPN bipolar transistors[’6”q- the saturation at 10 rad(Si)/sec shows up dearty. The implications on hardness assu;ance for the commercial components that are increasingly being used are significant. Worst-case testing at the breakpoint (see Fig. 1) of 10 mds(Si)/second appears to be adequate, and acceleration factor can be computed from the mtio of the two response regimes. Work has also been done in testing these bipolar parts at Method 1019.4 dose mtes (50 -300 mds(Si)/see), but with the devices heated to 60°C during inadiation. A great deal of work remains to be done in this area, and intensive research is ongoing. Note also that the saturation below 10 md(Si)/sec as shown in Fig. 1 will not apply to all bipolar processes, and that the breakpoints on this plot may also vaty from lot to lot.
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Dosimetry for total dose testing can use various approaches, and we will review two frequently used ones. Thermoluminescent detector (TLD) devices are widely used for compactness and convenience. TLD’s operate by light emission from lattice sites excited by irradiation; they do have a limited lifetime due to wear out mechanisms (fading) which restricts use in very long exposures. Photochromic detectors (PD) use color-sensitive organic dyes in a transparent plastic matrix. Readout is by measurement of absorption as a function of wavelength, a simple spectrophotometric procedure. These are very stable detectors and 1% reproducibility is achievable. They are better suited than TLD’s for monitoring of long-term radiation tests. Table 2 shows representative TLD materials, while Figure 2 shows a representative PD calibration characteristic.
Table 2: TLD Materials Material
I
Dose Range, rads(Si)
I
Thermal Fading
LiF
10-2.104
CaF2/Mn
104-104
Average (1%/day)
CaF2/Dy
103-104
Weak (13%/me)
Weak (5%/yr)
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The basic specification for a total dose test will include at least the following parameters in order to fully define the test: Radiation source to be used Dosimetry standards and methods Radiation level(s) and dose rate lmadiation temperature Circuit configumtion:
static, dynamic or unpowered
Circuit measurements: in-situ or pre- and post imadiation; cool down Measurement
period
“cool down”
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time period
The basic approach to total dose acceptancetesting is the qualification of a ‘lot” of product, with the definition of a lot being variable over a wide range depending on program requirements. Some commonly specified approaches are discussed below. A. Date Code The manufacturer’s date code can be used to define a reasonably homogeneous lot. The actual meaning of a date code can vary, and the manufacturer needs to be consulted as to the exact meaning of the code. Most often date codes are based on assembly date, and a given code can contain die from many fabrication lots. Since hardness is driven largely by wafer fabrication parameters a date code
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will likely contain large variability in radiation response. This method is inexpensive, though, and is used to good advantage in radiation-tolerant parts programs with relatively low total dose requirements. B. Lot Code This usually defines a fabrication lot, and requires special attention from the device manufacturer to retain traceability. The use of lot codes has been used extensively in military programs; usually, the lot is kept intact through assembly, test and subsequent hi-ret processing that includes radiation acceptance testing. Clearly the paperwo~ overhead increases dramatically, as does the cost. Lots tend to be small, and record keeping is ~ a function of lot size! The method offers much improved uniformity of radiation response within the lot since it contains only waferwafer variations. C. Wafer Number Here each wafer retains its identification all through the process, and screening and acceptance are done on a by-wafer basis. This method is prevalent in MILSTD-883 “Class S processing for space appli~tions. Processing will include inprocess SEM inspection as well as hi-rel screening and radiation testing, with wafer quadrant traceability a mmmon requirement. Costs and throughput time are high, but the method offers excellent correlation of radiation test results to in-process data. In the above lot conventions acceptance is done by sampling lot populations and performing radiation tests on the samples, with electrical data being taken before and after irradiation. Method 1019.4 provides exhaustive specification of radiation test conditions, device biasing, cool down and biasing during cool down. As an alternative, parts can be monitored in-situ while being irradiated; this approach is limited in accuracy because long leads restrict measurement flexibility. In all cases the complex sequence of selecting samples and then performing the test/irradiate/test flow will take a great deal of time and expense. Since this is a destmctive test the irradiated samples are scrap; this is not diffmlt to accept for SS1/MSl parts but starts to hurt at levels much above that. By the time one gets to the extreme complexity of a large static randomaccess memory or (worse) a 200000 gate ASIC the method becomes impractical. Early attempts at solving the sampling dilemma used test structures as an alternative method of evaluating hardness. These approaches used on-chip test transistors; hardness evaluation must then obviously be indirect in nature. Past experience ‘18’lq used bipolar transistor gain and transition frequency (FT) as indicators of BJT hardness; this works well enough for neutron environments but is of limited utility in total dose environments. Especially in the case of MOS transistors device hardness is such a strong function of processing that extrapolation is diticult. In the MOS device the gate and field oxides dominate total dose hardness, and direct testing is required. Significantly, die-level acceptance schemes invariably require periodic sampling radiation tests to validate the procedure. As we will see later, the introduction of QML methods
has revived interest in test structure physics.
Acceptance testing at the wafer level has been used in the past and eliminates the effort and delay of packaging. Wafer level testing also enables rejection of failed wafers before any further value added is incurred. Total dose irradiation of individual die on a wafer has been performed by collimated low-energy x-rays; in this way
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individual die can be irradiated. Dosimetry by PIN diode can be readily implemented, and the referenced systems can provide dose rates ranging from 1 rad(Si)/sec to 3000 rad(Si)/sec. The collimation system can reduce x-ray s@ter by four orders of magnitude. As we have mentioned elsewhere, the X-ray to ‘Co comelation must be taken into mnsideration due to the differences in energy spectraP1=. At the wafer level package-redu=d dose enhancement is eliminated. An alternative, test structure-based method is part of the QML procedure. In this approach the performance of a test structure is correlated to experimentally defined IC performance. In order to cover the entire range of threat environments, the test structure will actually be a complex chip with both individual active devices as well as circuit functions. We’ll describe this Technology Characterization Vehicle (TCV) approach in more detail in the QML section. QML offers a completely different approach to total dose qualification (as well as all other aspects of reliability and quality assurance) and will be discussed in detail later. Again, correlation of test structure data to actual part-level results is a key consideration.
1.3.
Dose Rate Testing Dose mte is defined as the rate of change of a gamma radiation pulse; it causes hole/electron pair generation in silicon that result in wrrent spikes. These can be simple junction photocment or more complex primary and secondaty photocuments in devices. Low levels of transient mdiation produce noise pulses, while higher levels can cause Iatchup and burnout. The term “upse~ is commonly used in dose mte testing and refers to the device under test changing state. This is easily defined in digital systems as a bit flip, a soft error from which the circuit can recover quickly. In an analog context this is not as straightforward, and a more arbitmfy definition of upset has to be supplied. As an example opemtional amplifiers are commonly connected in a 10X gain configuration and the output is monitored during mdiation exposure; a change in output voltage of more than one volt is then defined as upset. This is very subjective and mre must be taken to define such a criterion clearly. As dose rate increases response will change from a soft-emor upset to potentially more damaging phenomena. In both analog and digital devices that use junction isolation (Jl) the part may latch up due to four-layer devices being turned on. This results in a low-resistance path between supplies that at best will cause a nonfunctional device that can be restored to correct operation by cycling the power supplies through a zero crossing. The worstcase effect simply bums out the device. Use of current limiting and dielectric isolation (Dl) technology can produce a virtually burnout-proof device; this is a mmmon bipolar technique. In MOS technologies the use of epitaxial construction on heavily doped substrates will greatly enhance Iatchup susceptibility, while passive isolation techniques such as silicon-on-sapphire (SOS) and the more recent silicon-on-insulator (SOI) approach will reliably eliminate it, Both of these passive isolation techniques have diminishing source issues, however, with milita~ part volume redutions resulting in only a few viable sources. Commercial SOI is attractive from a performance viewpoint, but has yet to make much of an impact. Defect density problems and high substrate costs are limiters. If commercial SOI catches on the availability of military/space parts in this technology will be eased. Again MIL-STD-883 provides basic guidelines for dose mte testing. Since dose rate sensitivity is a fundamental system consideration, response data needs to be obtained eafiy in the design cycie. Especially in bulk technologies it is essential that samples represent as many fabrication lots as is practhl since the four-layer devices responsible for Iatchup are highly variable. m’z’za
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Upset testing is nondestructive in nature and so in principle could be done on a 100% basis, although the complexity and expense of this test usually preclude such an approach. Burnout testing on the other hand is considered destructive; even if the DUT does not actually bum out the possibility of latent damage resulting in later reliability problems is very high, Similarly Iatchup testing is also destmctive, and both of these tests are thus performed on a sample basis. The most common radiation sources used for dose rate testing are the linear accelerator (LINAC) or flash X-ray (FXR) machines. The LINAC is useful for testing devices in dose-rate ranges from 1x10° to 1x1 011rad(Si)/see, with variable pulse width. The FXR machine can provide higher dose rates but is restricted to a single pulse width. Since dose rate testing is performed with the device under test in an operating condition, equipment and fixturing to drive and monitor the DUT is needed, and this can be very complex in the case of higher level-of-integration parts. Noise caused by coupling into cables and by air ionization an result in signal corruption, and irradiation of the empty fixture is needed to detect these signals. Accurate dosimeters for dose rate are not readily available and the integrated total dose delivered in each pulse is usually measured along with the pulse shape. Clearly this method is best suited to package-level testing, and acceptance and qualification tests take a long time. Transient radiation testing at the wafer level can be indirectly simulated using a pulsed laser. A Nd:YAG laser operating at 1.00pm has been used~ to provide the transient energy into the DUT. This is clearty an indirect measurement in comparison with actual tmnsient gamma exposure and uncertainty is introduced by reflections, interconnect shadowing and so on. An alternative approach illuminates the back of the wafer, which is optidly more complex but yields more repeatable results. Screening for these effects is needed in the case of Iatchup and burnout-susceptible parts that cannot be eliminated by device substitution. Methods such as DI or epi construction are well known and prevent Iatchup by either outright elimination of fourIayer effects or by reducing their sensitivity through reduction of the parasitic gains that make up such a device. Latchup testing is performed using either a LINAC or a flash x-ray facility, This method enables screening for Iatchup sensitivity by controlling the amount of total dose radiation delivered to the DUT. As an example, a 20 nanosecond pulse at a rise time of 1010 rads(Si)/second will deposit less than 50 rads(Si) of total dose. A carefully designed test configuration is needed, with biasing and power supplies chosen to reflect a worst-case condition. Quick detection of a Iatchup condition is needed, necessitating fast electronics and low impedance, “stiff power supplies to prevent dropping out of the latch condition by power supply loading. Typically latch current over time, dropout curren~voltage and other latch characteristics are measured. Once latch occurs the measuring setup needs to interrupt power to the DUT unless a burnout test is desired. A basic specifidion
Scsdoc
for transient testing will incJude at least the following parameters:
.
Radiation source to be used
.
Dosimetry standards and methods
●
Dose rate
.
Test tempemture
IV-8
Y1S’9s
●
Test configuration, including functional, test vector and power supply levels
.
Clear definition of upset and Iatchup
Again as in total dose testing acceptance is generally on a lot-by-lot basis. Acceptance testing runs into the same cost problems that we saw in total-dose testing, with increased overall testing cost due to equipment and source constraints.. 1.4.
SEE Testing Single-event effects (SEE) testing has been an inmeasing area of interest as geometies in integrated circuits have shrunk dramatically, bringing greater susceptibility to these effects. Much of this testing is done as scientific research in order to improve our understanding of basic mechanisms, while other tests are performed to qualify pads for specific applications and systems. The study of these effects has been mostly confined to digital technology, although noise and output pulses in analog circuitry have also been studied. “1 Figure 3 shows ‘m sensitivity expressed in linear energy transfer (LET) as a function of speed-power product; as feature sizes shrink and operating currents decrease the SEU sensitivity is seen to increase. Over the range of technologies and minimum feature sizes the critical charge is obsewed to vary as the square of feature size, explaining the greatly increased interest in SEE over the past ten years. The basic mechanisms of SEE are covered in detail in the first section of the Short Course, so we will just provide a basic overview for completeness. The basic SEE mechanism is a higkenergy particle strike on an integrated circuit causing an ionized path through the bulk silicon, The diameter of the ionized path is small and particle transit time is also small; however the ionization along the partide track is intense and the electric field across the depletion layer will actually reach beyond the depletion layer. This effect creates a funnel that is able to collect charge from outside the depletion layer, increasing the total charge that can be deposited on a critical circuit node. At best the change ends upon a noncritical circuit node and has no effect on circuit operation. A single-event upset (SEU) caused by charge exceeding a critical threshold for a given node; this is a “SOW error resulting in a logic state change in digital circuits and noise spikes in analog parts. No permanent damage is incurred, and the system can recover by resetting its processors or reloading correct information into memory. In both ~ses error correction is necessary, and a graceful recovery is possible if the frequency of upsets is low. At higher upset rates operability is impaired, and in the limit the system bemmes useless as the error correcting algorithms are saturated. A second single-event effect is single-event gate rupture (SEGR)P- “31] which is of interest mostly in large power MOSFET devices. Here an energetic heavy ion passes through a thin dielectric resulting in rupture of the dielectric. The high electric fields found in these devices enables the release of energy well in excess of that required to destroy the dielectric. SingI&event bum out (SEB)W-= occurs in power devices, both MOS and bipolar. When an energetic heavy ion passes through one of the many parasitic bipolar devices found in such structures, it can turn these devices on and allow them to enter secondary breakdown. Given suhlcient externally supplied energy the device can be destroyed, often at volta es lower than normal device limits. Single-event Iatchup (SEL) is a closely related 8 ‘w phenomenon in which the parasitic devias actually latch up in a classical four-layer stmcture, again providing potential par&destruction.
SC9MOC
IV-9
WI S’95
100
10
.
0
NMOS
●
+
CMOWBULK Ch40WSOS
■ ● 0
PL GaA9 CMOWBOI
~ A
VHSIC BIPOLAR ECL
1.0 Qc (pc) +
0.1
.
9
.01
.
.W1
100
1
1
10
1.0
.1
FeatureSizel(pM) Figure 3:
sc9s.doc
Critical charge required to cause upset as a function of feature size. After Petersen, et al. [28]
Iv- 10
5/1w
SEE testing is a much more complex and expensive procedure than the comparatively simple total dose procedures. During these tests the DUT has to be in an operating mode and monitoring electronics has to be provided to detect upsets. One method uses external test equipment to exercise the part through its test vectors; upsets are detected by simple pass/fail methods. As an alternative two devices can be exercised in parallel, with one exposed to the SEE environment and a second ‘control’ part located outside the test chamber. Memory testing represents a specialized requirement and is usually performed using repeated write/read cycles, with an alternative approach of loading worst--se test patterns into memory and then checking periodically also in use. As circuit complexity increased the difficulty of these tests leads to greatly increased capital expense and recurring rests. Analo parts do not upset in the digital sense; continuous time analog parts can sho & noise spikes and output saturation. Mixed-signal devices such as A/D converters and signal processors show a more complex response of both analog and digital upsets leading to output errors, and the analysis of the circuit mechanisms responsible for these errors is difficult. In Fig. 4A through 4D we show a representative data plot of error rate in an A/D converte~n, using silicon, chlorine, nickel and bromine ions, respectively, to generate LET ranging from 7,5 to 37. The increased error rate shows up clearly, as do specific codes that are more vulnerable than others; this information is valuable in understanding design issues.
10
I
90-
I
Si
1
m-
70-
eoE : *
LEC
1
7.58
I I 1 I I I 1 I I 1 I I 1 I I I 1 I I
so-
40-
so-
zo-
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1250
i 1’ 1 m1 1 1’ 1 m
1
1
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I
I
leso
Dlglhl Oulput Cd@
FIGURE 4A: A/D convetir
Sc%.doc
error rata, LET= 7.68. After Turflinaer, et al. [37’J
IV-II
w W95
100
1 1 I
eo”
I L=
1
11.64
I I
L
I
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70
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1 1
I
~.
I
40, 2020.
10. 0.
-1
m , , l,,
,
,.+
1
! law Dlgltdoutputcods
Figure 48: A/D converter error rate, LET = 11.64. Atir Turflinaec, et al. [3~
NI
w
LET
26.7
i
lo0
■
so
FIGURE 4C: #D
m
I
eeo
convemr
1220
error
rate,
LET=
26.7. After Turflhmer, et. al. [371
IV-12
Y16/9s
: 1
37.2
LET
t
1
I
m
L&
I’&
2iaa liaa DrglId Olqaut C91k
m
FIGURE 4D: ND convefter error rate, LET= 37.2. After Turflin ~
et al. [371
High energy ions for SEE testing can be derived from a number of sources, including accelerators, radioisotope sources and ion microbeams. A representative accelerator is the twin tandem van de Graaff at Brookhaven National Laboratories. This facility is set up for SEE testing and is available on a time purchase basis. Note that the possibly complex test ftiure and equipment have to be transported to the test site and have to be setup and debugged there, fudher contributing to costs. An accelerator facility of this type provides a variable LET range of energetic ions. Table 3 provides a summafy of typical ions available at this facility.
Table 3: Typical Ions Used for SEP Testing at the Brookhaven Twin Tandem van de Graaff Accelerator pJ
●
scs5doc
AMU
Max Energy (MeV)
LE~ (MeV~m2/mg)
(Pm)
c
12
105
1.39
202
F
19
150
302
133
Si
28
195
7.7
81
cl
!35
210
11.5
63.1
Ni
58
255
27
40.3
Br
79
285
37.3
38.4
Ag
107
53.1
30.9
I
127
230
59.9
30.7
Au
197
345
82.3
27.9
LET and rangedata are calculatedat ionmaximumenergy.
IV-13
5/1m
Note the range of the heavier ions is limited to thirty or so microns; in order to approximate the much higher particle energies found in galactic cosmic rays an accelerator with GeV capabilities is needed. In Table 4 we show ion species available at the AECL facility in Chalk River, Canada. Efforts are also underway to establish SEE test =pability at the Brookhaven Alternating Gradient Synchrotrons. All these sources are clearly expensive, and a simple Iaboratoty source would offer the important advantage of being transportable. Califomium 252 provides such a source; it emits alpha particles at 6 MeV and fission fragments at 79 and 103 MeV. We obsewe an average LET of 43 MeV.cm2/mgm, a useful value for many applications. ‘2Cf is available in disc form and used in a vacuum chamber to reduce air attenuation. There are safety issues in handling this material, and the composite energy spectrum necessitates some analytid correction. m The method is also limited to low threshold LETS and devices with thin ovetiayers due to the mmparatively low energy of the fission fragments, and is thus best suited to SEE evaluation of nonhardened commercial circuits. As a second approach ‘a041]tie use of focused high-energy laser illumination allows control of penetration into the silicon by selecting an appropriate wavelength, usually in the IR. The spot can be reduced to a small size, and the beam can be positioned to hit specific sensitive areas to look at layout effects. Since this is still an optical technique it is limited by interconnect shadowing, and the beam must be used off-interumnect to yield any result at all, Laser intensity can be varied, and the short pulse durations (50 psec) attainable help simulation fidelity. A direct correlation of beam energy to particle LET is diiTcult and the method has been used primarily as a diagnostic tool. The net result of an SEU testing sequence is usually expressed as an SEU crosssection curve. Fig. 5 shows SEU cross-section as a function of LET for a Harris HM 6516 static random-access memory, a typid part for space applications. We note that the cross section saturates at perhaps 5x10-2cm2 corresponding to a LET of 23 MeV.cm2/mg. It drops off steeply below LET= 15, and below this threshold value the part will rarely upset. An excellent reference ‘] by Petersen, et al. reviews the predictive calculations used in interpreting SEU testing and contains useful recommendations for laboratory testing and simulations. The need for actually determining the LET threshold is stressed. The actual space environment has a wide energy distribution, with a 10% chance of an LET = 75 MeV.cm2/mg event and a 3% chance of a corresponding event at LET = 130 MeV.cm2/mg.
sc95.doc
Iv- 14
Y1w
A ?
O- ALICS ❑ -cl A--dun
10
6
16
20
2s W
Figure 6: SEU
cross
section
as a function
ao
(*V
3s
40
4s
so
mg+ 08+ (S0 )
of LET, HM8616 static RAM. Source AEA (UK)
Table 4: Representative Ions Available at the AECL TASSC Facilityp Chalk River, Ontario, Canada ~
SC9MOC
~
Max Enemy (Mev)
LET (MeV~/mg)
MM (w)
c
12
600
0.36
4048
N
15
700
0.49
3475
Si
28
1260
2.11
1487
c1
35
1400
3.4
1053
Cu
63
2200
10.4
592
Ge
72
2160
14
453
Br
79
2200
16.8
393
Ag
107
2550
30
280
I
127
2650
38.7
239
Au
197
2900
77.4
157
u
238
2850
98.1
133
IV-15
91&m
1.5.
ln~rbit
Evaluation
This is where a wefully designed testing program is actually verified. This is an important activity since it validates the entire wmulative result of testing and prediction. The three key objectives of in-orbit evaluation are: .
Verification of semiconductor processes and design methodologies
●
Verification of test and prediction techniques
●
Verification of dosimetry technology
In-orbit evaluation can be implemented by three different approaches: .
Modifications to existing payload hardware and software to enable the acquisition of data as the mission progresses. An example of this method is the ESA UOSAT-2 singl-event upset stud~ in which a portion of the main payload memory was reconfigured to serve as an upset monito~ this was accomplished by software modifications by uplink. Note that no hardware modifications were required for this experiment. As noted in the referenced paper, this wok resulted in improved insight into proton-induced upsets. Fig 6 taken from the Adams paper provides representative data, showing SEU rates for the various memory types flown on the experiment. These upset rates were also correlated to geographical location, providing further data on the environment.
IE-4
+ lE-5
t
I
IF-6 t :
lE-7
Figure 6: SEU rates
Scsk%ia
for
v
t
I
+ t
1
I
t
I
I
I
1
UOSAT-2 Memories. After Adam% et al. [43]
IV- 16
w 6/%
Piggyback experiments on existing missions are the next step up in complexity and cost. These experiments take the form of “black boxes” containing the experimental setup, flown on various missions. These missions range from the US Space Shuttle to various satellites to commercial aircraft. An excellent example is the CREAM payload that has been carried on the Space Shuffle as well as Concorde. The Cosmic Radiation Environment and Activity Monitor is designed to monitor the natural space environment responsible for noise and SEU in electronics and sensors. The instrumentation package has been manually deployed[~ in the Shuttle cargo bay to look at shielding effects. The SEU environment is monitored by a P-i-N diode array; passage of an energetic paiticle creates a pulse, and both frequency and pulse height are recorded. The data enables mapping of high-energy particle flux distribution. An adapted version of CREAM has also been flown on Concorde, and Dyer and coWorkersw’q obtained data on SEU rates at high altitude, due mostly to neutrons and protons, and explored the correlation of these SEU rates to solar flares. We show in Figs 7 and 8 a representative result for both quiet time and solar flare environments, plotting padicle munt as a function of flight time (top) and rigidity (bottom). The vertical cutoff rigidity of a particle is defined as the ratio of the particle’s momentum to its charge and is a measure of the energy needed to penetrate the earth’s magnetic field. The dificulty of adequately simulating the SEU environment has led to numerous onorbit experiments since this is the only really accurate way to assess SEU sensitivity.
Quid-TimB,
CREAM Concwdo 1889, LHR4FK 28th Ss@mbu ‘ml ~ CMxloo
b
18.~
18.S0
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Figure 7:
Scsiidm
Patiicle counts and rigidity from CREAM experiment on Concorde, quiet solar period. After -r, et al. [461
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Particle counts and rigidity from CREAM solar flare. After ~r, et al. [~
experiment
on Concorde,
24 Oct.
1989
The third approach to in-orbit evaluation is the use of an entirely dedicated satellite, Obviously the most expensive way, this provides an opportunity to test a w-de variety of microelectronic components, The US Combined Release and Radiation Effects Satellite (CRRES) is the classical (by now) example of a dedicated satellite. Included in CRRES were dosimetry and temperature sensing facilities to measure conditions at multiple locations within the satellite. The effects of total dose and singl-event effects were monitored on a continuous basis and are transmitted to Eatth via a ground link. CRRES was launched in July 1990 and lasted 1087 otiits to Oct. 1991. It flew a highly elliptical orbit (18.2° inclination; 348 km perigee; 33,582 km apogee) in order to traverse the outer (electron) and inner (proton) van Allen belts, and provide a diverse range of environments. This satellite has produced an enormous amount of data, as you would expect, and we will cover some representative examples. Correlation of ‘Co ground-based total dose testing and the much slower dose rate irradiation actually experienced in space is an important area of research. CRRES enabled the exposure of various discrete and integrated mmponents to total dose radiation with rates varying from .0001 to .048 rads(Si)/second, and ground testing at 8 rads(Si)/sec to 48 rads(Si)/sec was also carried out.[’n Good agreement was shown for MOS power devices and digital parts, and we show in Fig. 9 raw data of
sc95.doc
IV- 18
Wlws
HEXFET performance vs. orbit number. The change in slope of the wwe is due to changes in the environment caused by increases in the trapped particle population.
2.5
T
3
2d
2
1.s
1
—
elq=bxumlati
—
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—
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04
o~ o
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400
em
SM
1000
la
orMMumber
Figure 9:
Gate voltage of discrete HEXFET devices as a function of orbit number, CRRES data. After ~, et al. [471 A second sample of CRRES results involves SEU data. SEU testing on the Microelectronics Package (MEP)[W included forty device types including RAMS, microprocessors, gate array, PROMS and EAROMS. The MEP monitors SEU rates and reports each second on each device. To avoid upsets of the monitoring circui~ two redundant systems including the controller and test circuit~ were used. The data generated by this system was put in context by the environmental mapping systems and dosimeters that were also on the satellite; the environment was continuously measured and quantitative mrrelations are possible. The proton flux and total dose were monitored simultaneously. The results for the (largely nonhardened) tested devices were found to vary widely. SEU’S occurred at between 10 and 20 events per day. Some CMOS RAM devices showed Iiffle or no upsets, while bipolar RAM (93 L422) sensitivity was found to be large, The bipolar results clearly line up with results from a practical in-orbit verification test - the Hubble Telescope. As a representative result Fig 10 shows SEU rate as a function of time for seven static RAM parts, and we note variations in this rate as the environment changes.
sc95.doc
IV-19
S/l 6/95
2.0
I
I
I
I
I
I
Slo
Sss
1
I
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II
1.5
1.0
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o 210
=
m
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Figure 10:
MO
ass
410
42s
lkl1990)
CRRES MEP SEU rate as a function of time, aggregate for seven RAM device-s. After QW!W!!, et al. [48]
As a last example of CRRES data we will cite results by Ray et al.[q on highefficiency solar calls. The High Efficiency Solar Panel (HESP) experiment was designad to determine the radiation sensitivity of GaAs/Ge and Si solar cells. Permutations also included packaging and interconnection methods. Damage to the solar cells was incumed mostiy in the electron and proton belts, and again the detailed dosime~ of these environments enabled direct interpretations. Representatively we show Fig. 11 proton fluenca as a function of orbit number, while Fig. 12 shows mmparative degradation of the maximum per-cell power for GaAs/Ge, thin Si and reference Si cells, also as a function of orbit number.
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Iv-m
&aa+lo
Z6E+lo
I.m+lo
m
o
m
am
MO
1000
lam
ofbRmRll&r
Figure 11:
Proton Fluence as a function of orbit number for 6.8, 10.7 and 19.4 MeV protons. After ~ et al. [49]
o=
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0.0s
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Oms
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Figura 12:
Maximum mil cover
power
per solar
glass. After ~
sc95.doc
cell as a function
Iv -21
,,
.,
of orbit
number,
Si
and
GaAs/Ge
cells,
et al. [49]
,.
w W)s
4
The use of dedicated satellites for radiation effects investigation has been shown to be an extremely powerful method, which we have illustrated by CRRES data. CRRES data resulted in major new discoveries, incJuding multiple bit upsets caused by protons and the existence of a transient proton belt. It also resulted in change; design review criteria for error handling were improved, ground SEU test procedures were updated and modeling of the near-earth radiation environment was improved. Follow-on to CRRES is cumently planned through the Microelectroni& and Photonics Test Bed (MPTB) program; it is based on the CRRES design and is funded by a wide range of agencies. Strong industry participation is planned as well. The mission will be a 100pound package, to be piggybacked on potential satellites such as GPS, Pegasus and defense comsats, with a preference for an elliptical orbit through all radiation belts to geosynchronous orbit. Planning is for inclusion of advanced high level of integration IC’S as well as photonic components.
1.6.
Special Case:
Cryogenics
1.6.1. Introduction Operation of silicon devices at cryogenic (120K and below) temperatures has been extensively studied in the context of IR sensor applications. The highperformance signal processing, multiplexing and A/D conversion functions required for IRFPA applications place severe demands on the process used to implement these functions. These processes require at least the following attributes: .
Vety high packing density
.
Compatibility with extreme low-power operation
.
Low noise, particularly in the critical l/f regime
.
Compatibility with high reliability requirements
●
●
Freedom from such wear out mechanisms as hot electron degradation and time-dependent dielectric breakdown Adequate radiation hardness
In practice this set of requirements has led to the use of analog CMOS processes in the .6-1.2 micrometer gate length range, with appropriate hardening modifi=tions and thorough m-engineering for cryogenic o eration, and these processes have been well-documented in the literature. W-R521 ~~at has not been so well described are the various aspects of reliability, hardness assurance and qualification procedures. This gap is caused by the profound changes in failure mechanisms that occur when operating temperature drops; indeed new mechanisms will appear that do not even exist at “room” temperature. In this section we will discuss some aspects of device physics and failure mechanisms and will then progress to production and qualification testing. Some of this work is not definitive as yet, and new device issues and failure mechanisms may well appear in the future.
sc95.doc
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w 6/95
1.6.2. Failure Mechanisms
and Device Physics
Cryogenic operation puts specific demands on CMOS processes. Device failure mechanisms change as well, and exposure to radiation environments further complicates matters. As temperature decreases the absolute threshold voltage of the MOS transistor will increase and ultimately cause circuit nonfunctionality. The design of an effective cryo CMOS process involves adjusting the thresholds so that lowtemperature operation is optimized. This lowers the room temperature thresholds; a compromise is necessary to keep the part functional for testability reasons, Total dose radiation will also shift threshold voltages; here, the value I VTN- VTP I remains mnstant, and both values shift negative. [n contrast the radiation-induced shift increases I Vm - Vm 1. The deli~te balancing act required to keep all this under control is further complicated by counte~ope freeze out effects that eliminate the use of CD implants as a threshold adjusting technique; dual polysilicon doping is then required. The sensitivity of MOS threshold voltage to total dose irradiation is much worse at lower temperatures. Fig. 13 shows A Vm as a function of stress voltage during irradiation for MOS capacitors irradiated at 77K and room temperature. The shifts at 77K can be seen to be nearly an order of magnitude worse. The effect is due to the large reduction in hole mobility at low temperatures; electron mobility remains high, and positive (hole) charge builds up rapidly. Several complex effects take place after initial irradiation as shown in Fig. 14 with holes initially migrating through the oxide by hopping transpor&;these holes are eventually trapped in deep traps near the Si/SiOz interface. Eventually these holes anneal and the device recovem; the time constant mns in the range of a few hours. The effect of the trapped positive charge is a shift in threshold voltage in the negative direction for both polarities of devices. In the limit, the n-channel device will enter the depletion mode, with the channel turned on at zero gate bias; clearly this will cause circuit nonfunctionality. Two approaches have been used to harden these devices; thinning of the gate oxide and changing the gate oxide to a composite dielectric. Fig. 15 shows the effects of oxide thinning on hardness at 80K, and this method can be seen to work well at this temperature. As opemting temperature drops to the 10K-40K mnge of strong current interest gate oxide thinning loses effectiveness, and a different approach is needed. The use of deoxidized nitrided oxide (ONO) gate dielectricsm’H offers a promising alternative to straight oxide dielectrics. The use of a rapid thermal anneal (RTA) step in a NH3 environment has been shown to produce gate dielectrics of excellent dieledic integrity, enabling thinner films to be used; this improves hardness and density. It is also important to note that hot electron effects in these structures are a major limitation. W’w’5mThe use of ONO dielectrics has been shown to reduce susceptibility to hot electron degmdation; one way of interpreting ONO processing is that it allows much thinner dielectric films to be used while remaining reliable, which in turn improves total dose hardness. The annealing behavior of the ONO films is different from oxide annealing and is an interesting topic that is beyond the scope of this section, Note also that the l/f noise performance of ONO dielectrics may be higher than that of conventional dielectrics.
Scsmla
IV-23
wls/95
-16
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0
AppMi
Flatband voltage shift as a function of gate bias applied during total dose imadiation for MOS capacitors at temperatures of 26° and 77K. After Pickel.
Figure 13:
L@,~~.~
AVTN
LONO-TKRM
(2)HOLE
~
+—.
10+
REcovEnv
10+
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Figure 14:
mHOmT-nmM
~
~
(1) INITIAL HOLE YIELMMMALAVTH 1
Sc%.dac
voltage (v)
dtef
Radldal
-
PUIOO (9)
Threshold shift regimes for MOS devices recovering from total dose Irradiation. After Pickel.
IV -24
Wlel’m
I(P T=80K
o
MOSFET 7hre8hold Voltage Shift
I(P
/
Eox = +1.0 NWlcm
0’ 0 /
IQ1
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/
McGarrlty
0 I@
AVm
q&l
.
0
,0
0
a doxa 0’ 0 0 0 0
0
AV B tiWTl S&s et al (1084) +2.0 Mvicm
0
.
10 dox (rim)
1
Figure 15:
1(P
Relative threshold vottage shift as a function of gate oxide thickness. After Pickel.
A second key failure mechanism is totaldose induced device leakage.
The thick field oxides used in these processes ~nnot be readily hardenedm] and such approaches as composite field oxides have not been successful at cryo. Current processes use the proven earlier method of preventing N-channel field inversion by the use of P+ guard rings. This uses some space but has been shown to be effective in controlling Ieakage.m It should be noted that the low power operation of IRFPA applications is very sensitive to leakage. Devices are
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routinely operated in the subthreshold region, and radiation-induced leakage quickly grows to the same value as the operating currents. Leakage has also been reported[w between the polysilicon gate and the underlying silicon, i.e. gate oxide leakage. This is not yet well understood, but has been seen on test devices; both normal oxide and ONO dielectrics are affected, and the leakage has no correlation to applied bias. The effect worsens with lower temperature, and has been reported to occur under ‘Co imadiation but ~t under 10 KeV xrays. Returning to hot electron effects we note that the customary approach has been to provide lightly-doped drain (LDD) regions at the source and drain regions. This is an effective method at room temperature and works well down into the cryo range. In a hardened application, however, the tradeoff changes. LDD regions are created by deposited spacer oxides on each side of the polysilicon gate; the spacers modify the source/drain doping profiles by attenuating the S/D implants. In a total dose environment these spacer oxides will trap charge which modulates the resistivity of the comparatively lightly doped LDD structures. The P-channel device thus incurs parasitic resistance in its sources and drains, leading to transconductance degradation as shown in Fig. 16. The N-channel of course experiences a decraase in LDD resistivity, and Fig. 17 shows the resulting major increases in GM. A potential approach is the elimination of the P-channel LDD structures, since this device is much less sensitive to hot electron effects than the N-channel.
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Figure 16:
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P-channel normalized transconductanca as a function of total dose irradiation at 77K. Harris Corporation data.
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