Advanced Design Techniques for RF Power Amplifiers (Analog Circuits and Signal Processing)

ADVANCED DESIGN TECHNIQUES FOR RF POWER AMPLIFIERS

ANALOG CIRCUITS AND SIGNAL PROCESSING SERIES Consulting Editor: Mohammed Ismail. Ohio State University Related Titles: CMOS CASCADE SIGMA-DELTA MODULATORS FOR SENSORS AND TELECOM del Río, R., Medeiro, F., Pérez-Verdú, B., de la Rosa, J.M., Rodríguez-Vázquez, A. ISBN 1-4020-4775-4 Titles in former series International Series in Engineering and Computer Science: SIGMA DELTA A/D CONVERSION FOR SIGNAL CONDITIONING Philips, K., van Roermund, A.H.M. Vol. 874, ISBN 1-4020-4679-0 CALIBRATION TECHNIQUES IN NYQUIST A/D CONVERTERS van der Ploeg, H., Nauta, B. Vol. 873, ISBN 1-4020-4634-0 ADAPTIVE TECHNIQUES FOR MIXED SIGNAL SYSTEM ON CHIP Fayed, A., Ismail, M. Vol. 872, ISBN 0-387-32154-3 WIDE-BANDWIDTH HIGH-DYNAMIC RANGE D/A CONVERTERS Doris, Konstantinos, van Roermund, Arthur, Leenaerts, Domine Vol. 871 ISBN: 0-387-30415-0 METHODOLOGY FOR THE DIGITAL CALIBRATION OF ANALOG CIRCUITS AND SYSTEMS: WITH CASE STUDIES Pastre, Marc, Kayal, Maher Vol. 870, ISBN: 1-4020-4252-3 HIGH-SPEED PHOTODIODES IN STANDARD CMOS TECHNOLOGY Radovanovic, Sasa, Annema, Anne-Johan, Nauta, Bram Vol. 869, ISBN: 0-387-28591-1 LOW-POWER LOW-VOLTAGE SIGMA-DELTA MODULATORS IN NANOMETER CMOS Yao, Libin, Steyaert, Michiel, Sansen, Willy Vol. 868, ISBN: 1-4020-4139-X DESIGN OF VERY HIGH-FREQUENCY MULTIRATE SWITCHED-CAPACITOR CIRCUITS U, Seng Pan, Martins, Rui Paulo, Epifânio da Franca, José Vol. 867, ISBN: 0-387-26121-4 DYNAMIC CHARACTERISATION OF ANALOGUE-TO-DIGITAL CONVERTERS Dallet, Dominique; Machado da Silva, José (Eds.) Vol. 860, ISBN: 0-387-25902-3 ANALOG DESIGN ESSENTIALS Sansen, Willy Vol. 859, ISBN: 0-387-25746-2 DESIGN OF WIRELESS AUTONOMOUS DATALOGGER IC'S Claes and Sansen Vol. 854, ISBN: 1-4020-3208-0 MATCHING PROPERTIES OF DEEP SUB-MICRON MOS TRANSISTORS Croon, Sansen, Maes Vol. 851, ISBN: 0-387-24314-3 LNA-ESD CO-DESIGN FOR FULLY INTEGRATED CMOS WIRELESS RECEIVERS Leroux and Steyaert Vol. 843, ISBN: 1-4020-3190-4 SYSTEMATIC MODELING AND ANALYSIS OF TELECOM FRONTENDS AND THEIR BUILDING BLOCKS Vanassche, Gielen, Sansen Vol. 842, ISBN: 1-4020-3173-4

ADVANCED DESIGN TECHNIQUES FOR RF POWER AMPLIFIERS by

Anna Rudiakova Donetsk National University, Ukraine and

Vladimir Krizhanovski Donetsk National University, Ukraine

A C.I.P. Catalogue record for this book is available from the Library of Congress.

ISBN-10 ISBN-13 ISBN-10 ISBN-13

1-4020-4638-3 (HB) 978-1-4020-4638-4 (HB) 1-4020-4639-1 (e-book) 978-1-4020-4639-1 (e-book)

Published by Springer, P.O. Box 17, 3300 AA Dordrecht, The Netherlands. www.springer.com

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Contents

Contributing Authors

vii

Preface

ix

Chapter 1 Introduction to the RF Power Amplifiers Design

1

Chapter 2 Theoretical Analysis of BJT Class-F Power Amplifier

31

Chapter 3 BJT Class-F power Amplifier Design

63

Chapter 4 PBG Structure as Amplifier Output Network

69

Chapter 5 BJT Fifth-Harmonic Peaking Class F Power Amplifier

81

Appendix

87

References

131

Index

135

v

Contributing Authors

Anna Rudiakova Donetsk National University, Donetsk, Ukraine Vladimir Krizhanovski Donetsk National University, Donetsk, Ukraine

vii

Preface

Power amplifier is the main power consumption block in any advanced wireless communications system. When the DC power is limited, it is crucial to design power amplifiers with high power-added efficiency. The output power and efficiency depends on the active device, bias conditions according to the operating class, matching networks, and so on. One of the methods to improve the output power and efficiency is to terminate the harmonics at the output. Among the harmonics, the first five are especially in want of tuning, because their magnitudes are relatively larger than the others’. In the last seven years the authors have made a lot of efforts in the field of development of high-efficiency polyharmonic power amplifiers, and the original results are highly enhanced both by the modelling and the related design methodologies. Thus, the main idea of this book will be to provide the reader with a deep analysis of modeling and design strategies of BJT high-efficiency polyharmonic power amplifiers, as well as to organize in a coherent manner all the authors’ results in the field of polyharmonic power amplifiers. Hence, the book allows the reader not only to understand the operating principle and the features of bipolar transistor power amplifiers, but also to design high-efficiency amplifiers at the frequencies close to transition. The book can be used as a guide by researchers and practicing engineers dealing with this subject and as a text book to graduate and postgraduate students who want to extend their knowledge and study all aspects of the analysis and design of high-efficiency polyharmonic power amplifiers. Although the material is presented in a formal and theoretical manner, much emphasis is made on a design perspective. To further link the book’s

ix

x

Preface

theoretical aspects with practical issues, simulation and experimental examples are included. The book is organized into five chapters. Chapter 1 is introductory and it contains analytical review of current state of high-efficiency power amplifiers design problem. The strength and weakness of existing approaches are highlighted, unsolved issues pointed out. Chapter 2 of the book is devoted to theoretical analysis of BJT class-F power amplifier near transition frequency and is divided into three sections. In section 1, we propose the simplified transistor model accounting the charge storage issues that will be needed in the sequel. Section 2 describes the analytical derivation of collector current harmonic content depending on the operating frequency and the biasing conditions, while section 3 presents the Class F realization conditions according to the analysis. Chapter 3 deals with verification and demonstration of the results achieved in Chapter 2. Section 1 covers the simulation of BJT class-F power amplifier near the transition frequency using the accurate transistor model. Furthermore, section 2 contains experimental results of the fabricated prototype. Chapter 4 is devoted to the use of photonic band-gap structures (PBG) as the output networks of high-efficiency polyharmonic power amplifiers. The novel type of PBG is proposed providing improved characteristics in the both stop and pass bands. Finally, Chapter 5 presents the BJT fifth-harmonic peaking class F power amplifier design using proposed in Chapter 4 structure. In addition, we provide our own comprehensive nonlinear power amplifiers’ simulation tutorial in Appendix.

Anna Rudiakova, Vladimir Krizhanovski

Chapter 1 INTRODUCTION TO THE RF POWER AMPLIFIERS DESIGN

1.

BASIC TERMS AND DEFINITIONS

The general equivalent circuit of power amplifier is shown in Fig. 1-1. It consists of active device (AD), input and output networks and supply and bias circuits1,2. Electrical operation mode of power amplifier can be characterized by the following fundamental parameters: the first harmonic output power P1 , the dc supply power PDC , the efficiency regarding the first harmonic η = P1 PDC (so-called electronic efficiency), the power gain K P , the passband or amplitude-frequency characteristic, and the nonlinear distortions values. The power-added efficiency (PAE) is also important characteristic accounting the driving signal power.

iC

Input matching network

Active Device (AD) AD Bias network

v CE

DC supply network

Output matching network

Figure 1-1. General equivalent circuit of power amplifier.

1

2

Chapter 1

The driving signal source and supply voltage source parameters substantially influence the power amplifier operation. These external parameters are the following: - nominal power Pin , frequency f and intrinsic impedance Z i of the driving signal source; - voltage EC of supply voltage source, and the load impedance Z L at the transistor output terminals. The dependencies of the amplifier parameters on the external parameters present the sets of characteristics as follows: - load: dependencies of P1 , PDC , η , K P on the load impedance Z L ; - amplitude: dependencies of P1 , PDC , η , K P on the input power Pin ; - modulation: dependencies of P1 , PDC , η , K P on the supply voltage EC ; - frequency: dependencies of P1 , PDC , η , K P on the driving signal frequency. The approximate views of the load, amplitude, modulation, and frequency characteristics’ sets are shown in Figs. 1-2 - 1-5, respectively. The f1 < f 2 < f3 is assumed for all of the figures. P1

f1 f2 f3

ZL Figure 1-2. Load characteristics’ set.

P1

f1 f2 f3

Pin Figure 1-3. Amplitude characteristics’ set.

Introduction to the RF Power Amplifiers Design

3

P1 Pin

EC Figure 1-4. Modulation characteristics’ set.

P1

Pin

f Figure 1-5. Frequency characteristics’ set.

There are other characteristics’ sets besides the above mentioned: for example, the bias characteristics, etc. However, the above four sets are of special importance. The nonlinear power amplifier can operate in one of the following modes: undersaturated, critical, overloaded, switching. The latter two belong to the saturated one. The amplifier’s operating mode can be determined by the dynamic load line, which represents the operating point coordinates at the current-voltage curves’ plane. The mode is undersaturated, if the dynamic load line stays within the active and cut-off regions as shown in Fig. 1-6. However, when it moves to the saturation region, the operating mode becomes overloaded. The critical mode is the boundary between the undersaturated and overloaded ones. In this case, the operating point is just touching the saturation line. The switching mode assumes the transistor as an ideal switch that can be either in the saturation region, or in cut-off. This mode can be considered as an extreme case of overloaded one.

4

Chapter 1 saturation line

iC

1 3

iB

2

vCCE Figure 1-6. Dynamic load lines for the undersaturated (1), critical (2), and overloaded (3) operating modes.

The power amplifiers are divided into several classes within two major groups depending on the input signal amplitude, bias and supply conditions, and the properties of the input and output matching networks: 1) the sinewave output operation, and 2) the polyharmonic operation. The detailed description of these classes is given in the further paragraphs.

2.

SINE-WAVE OUTPUT OPERATION: CLASSES A, AB, B, C

There are two cases for the sine-wave output operation power amplifiers as shown in Fig. 1-7: 1) the small signal class A - linear mode, and 2) the large signal modes with cut-off. The magnitude of RF signal is much smaller than its dc component for the linear mode (see Fig. 1-7 (a)). Typical application of such amplifiers is the input low-power stages of RF transmitters. Maximal theoretically reachable efficiency is equal 50% for this case. The large-signal operation modes (see Fig. 1-7 (b)) give the advantage of higher efficiency. Here, the collector current is zero during the cut-off interval, so the instant parasitic power dissipation becomes zero for this region leading to the efficiency increasing. The large signal operation modes are divided into different classes according to the conduction angle as follows: class AB with 90° < θ < 180° , class B with θ = 90° , and class C with θ < 90° . The analytical expression for the large-signal operation collector current iC is following:

Introduction to the RF Power Amplifiers Design iC

5 iC

iC

ICm v BE

v BE

(a)

θ

ω0 t

(b)

Figure 1-7. Small signal class A operation - linear mode (a), and large signal nonlinear modes with cut-off (b).

iC = I Cm

cos ω t − cos θ , for − θ < ω t < θ 1 − cosθ iC = 0, for θ < ω t < 2π − θ

½ ° ¾, °¿

(1-1)

where I Cm is the maximal collector current value, θ is the conduction angle, which is equal to the half of nonzero current interval, and varies from 0° to 180°. The dependencies of the Fourier coefficients α 0 and α1 of the collector current dc component I C 0 = I Cmα 0 and fundamental frequency component I C1 = I Cmα1 on θ are the following:

α0 =

sin θ − θ cosθ θ − sin θ cosθ , α1 = π (1 − cosθ ) π (1 − cosθ )

(1-2)

In case of higher harmonics, the appropriate Fourier coefficients should be determined as:

αn =

2 sin nθ cos θ − n cos nθ sin θ , π n(n 2 − 1)(1 − cos θ )

n≥2

The α 0 - α 3 coefficients are shown in Fig. 1-8. Assuming the ideal matching and harmonic output voltage, the collector efficiency can be written as:

Chapter 1

6 αn 0.5 1

0

0.4

0.3 2 0.2 3 0.1

0.0

0

45

90

Figure 1-8. The dependencies of the Fourier coefficients α

η=

θ

135

0

-α

3

on θ .

1 I C1VC1 1 α1 P1 , = = ξ PDC 2 I C 0 EC 2 α 0

(1-3)

where the ξ = VC1 EC is the transistor utilization factor, ξ ≤ 1 . As it is follows from Eqs. (1-2) and (1-3), the efficiency increases when the conduction angle decreases. Furthermore, the efficiency approaches 100% for the θ → 0 and ξ = 1 . As the collector current becomes almost zero during the cut-off interval, the dissipated power is smaller for the decreased conduction angle. However, the fundamental component power goes down dramatically for a low θ . That is why the class B or class C with θ greater than 60° are usually used. It allows obtaining η = 70 .. 80% and acceptable output power level3-7.

3.

POLYHARMONIC OPERATION: CLASS F

The polyharmonic operation is characterized by the complex output voltage waveform8, which contains the series of harmonics. In general case, the output voltage includes infinite number of harmonics: ∞

vC = EC − ¦ VCn cos(nω t + ϕ n ) , n =1

However, only few first harmonics are considered practically.

Introduction to the RF Power Amplifiers Design

7

The simplest particular case of polyharmonic operation is so-called biharmonic9. Here, an output voltage contains the second or the third harmonic besides of dc and fundamental components. The advantages of higher harmonic tuning were shown by Tyler in 195810 and Snider in 196711. The short-circuit mode for the even harmonics and the open-circuit mode for the odd harmonics were realized at the transistor output. For the first time, F.H. Raab12 proposed the term “class-F ” for such tuning. It is worthy to note that in this case output current contains the only even harmonics, while output voltage contains the only odd harmonics, or vice versa. In other words, either current, or voltage, but not both simultaneously, has non-zero value for a given higher harmonic, so the power dissipation is omitted. The output network of class-F power amplifier is usually presented as the multiresonator harmonic filter. The equivalent circuit of third harmonic peaking network is shown in Fig. 1-9. This network and its varieties were considered in details by Trask13.

Z in = RL for ω 0 Z in = ∞ for 3ω 0 Z in = 0 for others

Cb

3ω 0

iC Active device (AD)

+

AD

v CE C

−

ω0

RL

Figure 1-9. Equivalent circuit of third-harmonic peaking class F amplifier output network.

8

Chapter 1

3.1

The maximally flat output current and voltage waveforms

The ideal current and voltage waveforms are shown in Fig. 1-10. They correspond to the account of infinite number of harmonics. However, tuning of output network for such case is almost impossible practically. So, usually the only few first harmonics are under consideration, as much energy efficient. In order to choose between the circuit complexity and efficiency increasing, one have to have an idea about influence of number of harmonics taken into account on the power amplifier characteristics. Such analysis was conducted by F.H. Raab14. He supposed, that output voltage contains the only odd higher harmonics, while output current contains the only even higher harmonics: vC = EC + VC1 sin ω0t + VC 3 sin 3ω0t + VC 5 sin 5ω0t + ... iC = I C 0 − I C1 sin ω0t − I C 2 cos 2ω0t − I C 4 cos 4ω0t + ... ,

The following relations were defined for voltage:

γV =

VC1 , EC

δV =

VC max , EC

(1-4)

δI =

iC max . IC 0

(1-5)

and for current

γI =

I C1 , IC 0

Here vC max and iC max are maximal values of voltage and current pulses, respectively. The several assumptions were made: the output network is lossless and the only fundamental frequency component can reach the load; the active device is ideal current source or ideal switch. Raab called such the approximations of ideal current and voltage waveforms as “maximally flat”. The parameters m and n define the numbers of even and odd harmonics taken into consideration, respectively. The parameters δV , δ I , γ V , γ I , and relations of higher harmonics to the dc component for the maximally flat waveforms are presented in Tables 1-1 and 1-2.

Introduction to the RF Power Amplifiers Design

9

iC

0

ω 0t

vCE

0

ω0t

Figure 1-10. The ideal waveforms of output current and voltage for a class F power amplifier.

The collector efficiency of power amplifier with the maximally flat waveforms of current and voltage can be written using Eqs. (1-4) and (1-5) as follows:

η=

γV γ I

(1-6)

2

The efficiency values for the different combinations of m and n are summarized in Table 1-3. As one can see from the table, the increasing of number of voltage or current harmonics leads to the efficiency growing. Table 1-1. The voltage maximally flat waveform parameters14 δV VC 3 ȿC n γ V = VC1 ȿC 1 2 1 – 3 2 9/8 = 1.125 1/8 = 0.125 5 2 75/64 = 1.172 25/128 = 0.195 ∞ 2 4/π = 1.273 4/(3 π ) = 0.424

– – 3/128 = 0.023 4/(5 π ) = 0.255

Table 1-2. The current maximally flat waveform parameters14 δI IC2 IC 0 m γ I = I C1 I C 0 1 2 1 – 2 8/3 = 2.667 4/3 = 1.333 1/3 = 0.333 4 128/45 = 2.844 64/45 = 1.422 16/45 = 0.356 ∞ π = 3.142 π /2 = 1.571 2/3 = 0.667

– – 1/45 = 0.022 2/15 = 0.133

VC 5 ȿC

IC 4 IC 0

Chapter 1

10 Table 1-3. Maximally flat waveform power amplifier efficiency14 η ( n = 1) η ( n = 3) η ( n = 5) m 1 1/2 = 0.500, 9/16 = 0.563 75/128 = 0.586 class A 2 2/3 = 0.667 3/4 = 0.750 25/32 = 0.781 4 32/45 = 0.711 4/5 = 0.800 5/6 = 0.833

∞

π /4 = 0.785, class B

9π /32 = 0.884

75π /256 = 0.920

η(n= ∞) 2/π = 0.637 8/(3 π ) = 0.849 128/(45 π ) = 0.905 1, class F

Herewith, the faster growing is appropriate to the simultaneous increasing of both current and voltage numbers of harmonics. However, the above analysis did not pay any attention to the harmonic generation mechanism. In addition, it was supposed that the fundamental component and the higher harmonics are in the proper phase relation. As will be shown in the Chapters 2 and 3, this assumption can lead to the poor efficiency.

3.2

Phase relations between the first and higher harmonics

The first and the third harmonics of transistor output voltage should be out-of-phased in order to obtain its flat waveform15,16. In this case, the third harmonic decreases the peak value of voltage impulse and leads to its flattening while is taken in the proper magnitude relation to the fundamental component as shown in Fig. 1-11 (a). These effects allow to increase the output power capability, to decrease the power dissipation losses in the transistor, and therefore lead to the higher efficiency. In case of incorrect phase tuning, one can obtain converse situation: the peak voltage value and the dissipation in transistor power increasing followed by efficiency decreasing (see Fig. 1-11 (b)). The conditions of formation the out-of-phase the first and the third harmonics were considered by Colantonio et al15,16. Usually, the transistor of single-stage class-F power amplifier operates in the critical or slightly overloaded mode. So, the transistor output voltage is completely defined by the transistor output current and the input impedance of the output network. Therefore, for each of harmonics one can write: VCn = I Cn Z Ln .

The input impedance Z Ln was assumed pure resistive, and the truncated sine-wave approximation for the collector current similar to (1.1) was used under the Colantonio’s et al analysis15,16.

Introduction to the RF Power Amplifiers Design

11

Figure 1-11. The phase relations between the first and the third harmonics: out-of-phase (a) and in-phase (b).

The first and the third harmonics are out-of-phase for above conditions if their Fourier coefficient α n are opposite. As one can see from the Fig. 1-8, it is possible for the conduction angles θ > 90°. 3.2.1

Optimum input impedance

In case of third-harmonic peaking class-F power amplifier, the transistor output voltage consists of the first, the third harmonics, and the dccomponent as follows:

12

Chapter 1 vC = EC − VC1 cos ω0t − VC 3 cos 3ω0t · § 1 = EC − VC1 ¨¨ cos ω0t + cos 3ω0t ¸¸ ε3 ¹ ©

(1-7)

where

ε3 =

VC1 Rω 0 I C1 = ⋅ . VC 3 R3ω 0 I C 3

(1-8)

The ε 3 is defined by the relation of the first harmonic complex amplitude to the third harmonic one15,16. It has to be negative in order to realize voltage impulse flattening (See Fig. 1-8). The first harmonic magnitude is greater than half of the signal swing for the signal with out-of-phase the first and the third harmonics. It allows increasing the output power without overload. The growing of the first harmonic magnitude can be expressed as: VC1,F = γ (ε 3 )VC1,sin ,

(1-9)

where the γ (ε 3 ) is the class-F first harmonic growing coefficient defined by the relation of the first harmonic magnitude to the magnitude of overall voltage swing as follows:

γ (ε 3 ) =

VC1 1 = . v(θ m ) − E C cos θ m + (1 ε 3 ) cos 3θ m

Here, the θ m is the point of minimal or maximal value of the voltage impulse vC , which can be determined from (1-7). In order to find θ m , the derivative of vC on ω 0 t = θ should be equated to zero. Then, the obtained equation should be solved. The derivative of vC can be written as follows: vC' = −VC1 (− sin θ − 3 ε 3 sin 3θ ) .

(1-10)

The points of possible maximums of vC within the 0 ≤ θ ≤ π region can be found by equating of Eq. (1-10) to zero:

θ m1 = 0 ,

(1-11)

Introduction to the RF Power Amplifiers Design 1.5

γ 1 (ε 3 )

13

γ 2 (ε 3)

ε 3,MF

1

0.5

0 −30

−25

−20

−15

−10

−5

0

Figure 1-12. The γ 1 (ε 3 ) and γ 2 (ε 3 ) functions.

§ 3 − ε3 ¨ 2 3 ©

θ m 2 = arccos¨

· ¸. ¸ ¹

(1-12)

The following expressions for the γ 1 (ε 3 ) and γ 2 (ε 3 ) functions are correspond to the θ m1 and θ m 2 , respectively:

γ 1 (ε 3 ) =

γ 2 (ε 3 ) =

cos θ m1

ε 1 = 3 , + (1 ε 3 ) cos 3θ m1 1 + ε 3

(1-13)

cos θ m 2

3 3ε 3 1 =− + (1 ε 3 ) cos 3θ m 2 (3 − ε ) 3 2

(1-14)

3

The γ 1 (ε 3 ) and γ 2 (ε 3 ) functions are shown in Fig. 1-12. The point of contingence of γ 1 (ε 3 ) and γ 2 (ε 3 ) functions is appropriate to the maximally flat waveform of voltage vC . The absciss ε 3, MF of contingence point can be determined by equating the right parts of Eqs. (1-13) and (1-14):

Chapter 1

14

ε 3, MF 3 3ε 3, MF =− , 1 + ε 3, MF (3 − ε )3 2 3, MF

ε 3,MF = −9 .

(1-15)

The waveform of voltage vC , that is appropriate to ε 3, MF , is shown in Fig. 1-13. The following function value γ (ε 3, MF ) is appropriate to the absciss ε 3, MF = −9 :

γ (ε 3, MF ) =

ε 3, MF 3 3ε 3, MF 9 =− = = 1.125 . 3 1 + ε 3, MF (3 − ε ) 2 8

(1-16)

3, MF

For the − 9 < ε 3 < 0 region, the maximal value of vC within the 0 ≤ θ ≤ π interval can be reached for θ m = θ m 2 point. Thereat, function γ (ε 3 ) is the same as γ 2 (ε 3 ) :

γ (ε 3 ) = γ 2 (ε 3 ) = −

3 3ε 3

(3 − ε 3 ) 3 2

, ɞɥɹ − 9 < ε 3 < 0 .

(1-17)

The waveform of voltage vC , that is appropriate to ε 3 = −3 , is shown in Fig. 1-14. For the ε 3 ≤ −9 region, the maximal value of vC within the 0 ≤ θ ≤ π interval can be reached for θ m = θ m1 point. Thereat, function γ (ε 3 ) is the same as γ 1 (ε 3 ) :

γ (ε 3 ) = γ 1 (ε 3 ) =

ε3 , ɞɥɹ ε 3 ≤ −9 . 1+ ε3

(1-18)

The waveform of voltage vC , that is appropriate to ε 3 = −15 , is shown in Fig. 1-15. For ε 3 → −∞ , γ (ε 3 ) is aspire to unity as follows:

ε3 = 1. ε 3 → −∞ 1 + ε 3

lim γ (ε 3 ) = lim γ 1 (ε 3 ) = lim

ε 3 → −∞

ε 3 →−∞

(1-19)

Introduction to the RF Power Amplifiers Design 1

15

vC (V)

0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 −1

−0.8

− 0.6

−0.4

−0.2

0

0.2

0.4

0.6

0.8

1

ω 0t Figure 1-13. Maximally flat waveform of voltage impulse vC , that is appropriate to ε 3 , MF .

1

vC (V)

0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 −1

−0.8

−0.6

−0.4

−0.2

0

0.2

0.4

0.6

0.8

ω 0t Figure 1-14. The waveform of voltage vC , that is appropriate to ε 3

= −3 .

1

16

Chapter 1

1

vC (V)

0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0

−1

−0.8

−0.6

−0.4

−0.2

0

0.2

0.4

0.6

0.8

1

ω 0t

Figure 1-15. The waveform of voltage vC , that is appropriate to ε 3

= −15 .

1.4 γ ( ε ) 3 1.2

ε 3, max

1 0.8 0.6 0.4 0.2 0 −30

−25

−20

−15

ε3

−10

−5

Figure 1-16. Function γ ( ε 3 ) for negative ε 3 values.

0

Introduction to the RF Power Amplifiers Design

17

In this case, the third harmonic magnitude is aspire to zero, and the voltage impulse waveform is the harmonic function. Therefore, the function γ ( ε 3 ) can be defined by the following set for negative ε 3 values according to the Eqs. (1-17) and (1-18): ­ 3 3ε 3 , for − 9 < ε 3 < 0 °− 3 ° (3 − ε 3 ) 2 γ (ε 3 ) = ® ° ε3 for ε 3 ≤ −9 °1 + ε , 3 ¯

(1-20)

Function γ (ε 3 ) for negative ε 3 values is shown in Fig. 1-16. As can be seen from Fig. 1-16, the function γ (ε 3 ) reaches the maximal value within the − 9 < ε 3 < 0 interval. The absciss ε 3,max of maximum point can be found by equating the derivative of γ ( ε 3 ) to zero. Then, the obtained equation should be solved. The derivative of γ (ε 3 ) at the − 9 < ε 3 < 0 region can be written as follows: § 3 3ε 3 γ ′(ε 3 ) = ¨ − 3 ¨ ( © 3 − ε3) 2

'

· 9 3ε 3 ¸ =− 3 3 . − 3 ¸ (3 − ε 3 ) 2 2(3 − ε 3 )5 2 ¹

(1-21)

The following value can be obtained by equating of Eq. (1-21) to zero: −

3 3

(3 − ε 3,max )3 2

−

9 3ε 3, max 2(3 − ε 3,max )

5

=0, 2

ε 3,max = −6 .

(1-22)

The waveform of voltage vC , that is appropriate to ε 3, max , is shown in Fig. 1-17. The following function value γ (ε 3, max ) is appropriate to the absciss ε 3,max = −6 :

γ (ε 3,max ) = −

3 3ε 3, max

(3 − ε 3,max ) 2 3

=

2 3

≈ 1.1547 .

(1-23)

18

Chapter 1 1

vC (V)

0.8

0.6

0.4

0.2

0 −1

−0.5

0

0.5

1

ω 0t Figure 1-17. The waveform of voltage v C , that is appropriate to ε 3 , max .

The first harmonic of transistor output current impulse is assumed the same for various tunings of the third harmonic in case of given input signal. Therefore, the input impedance of output network should vary in order to increase the first harmonic of transistor output voltage as follows: Rω 0 , F = γ (ε 3 )Rω 0 , sin ,

where the Rω0 ,sin is the input impedance of sine-wave operation power amplifier output network. The choice of ε 3 defines the optimum load for the third harmonic: R3ω 0 ,F =

Rω 0 ,F I C1 . ε 3 IC 3

(1-24)

Equation (1-24) is substantially distinct from the classical class-F condition of odd harmonics open-circuit mode. It can be explained by the fact that in practice the finite number of higher harmonics is usually taken into account.

19

Introduction to the RF Power Amplifiers Design

4.

POWER AMPLIFIERS’ MATCHING NETWORKS

4.1

The main purposes of power amplifiers’ matching networks

The electrical networks play the various roles in the transistor power amplifiers. These are: driving signal source matching with the transistor input; load matching with the transistor output; cross-product suppression in the output signal spectrum; formation of given impedance for higher harmonics at the transistor output; dividing and combining signals from the several sources. 4.1.1

Driving signal source matching with the transistor input

Suppose that the transistor input current and voltage first harmonic magnitudes are known as well as the phase shift between them. Then the equivalent impedance can be considered instead of the transistor. Its value should be selected in such a way, that the input current, voltage and their phase shift remain the same. This impedance is the input impedance of the transistor. An input impedance of power RF transistors is a nonlinearly varying complex value, which depends on an input power level and frequency, bias conditions, parameters of the transistor itself, etc. Usually, it differs significantly from the optimum value, which allows the maximum power transfer from the driving source to the transistor. It is useful to have an amplifier input impedance equal to the standard 50Ohm, or 75Ohm. However, a typical input impedance value of a power RF transistor is just a few ohms. Therefore, the low-resistance transistor input impedance should be matched to the higher value in order to provide better power transfer. The general look at the matching problem is the following. The two-port network is used between the driving source and the load. Here, the load Z L means the transistor input impedance. In case of voltage driving source Ei with intrinsic impedance Z i shown in Fig. 1-18(a) is used, the Z parameters of two-port are most convenient. The matching conditions can be written as: Z in = Z i* , and Z out = Z L* ,

(1-25)

where asterisk means the complex conjugate; Z in is an input impedance of two-port calculated at the terminals 1 and 2; Z out is an output impedance of two-port calculated at the terminals 3 and 4. The Z in and Z out are expressed through the Z parameters as follows:

20

Chapter 1 Z in = Z11 −

Z12 Z 21 Z Z , and Z out = Z 22 − 12 21 . Z 22 + Z L Z11 + Z i

Alternatively, in case of current driving source I i with intrinsic admittance Yi shown in Fig. 1-18(b) is used, the Y parameters of two-port are useful. It gives the following matching conditions: Yin = Yi* , and Yout = YL* ,

(1-26)

where YL is a transistor input admittance; Yin is an input admittance of two-port at the terminals 1 and 2; Yout is an output admittance of two-port at the terminals 3 and 4. The Yin and Yout can be written as follows: Yin = Y11 −

Y12Y21 Y Y , and Yout = Y22 − 12 21 . Y22 + YL Y11 + Yi

In case of a lossless reversible reactive two-port, the Z and Y parameters can be represented as follows: Z11 = jx11 ;

Z12 = Z 21 = jx12 ;

Zi Ei

Z 22 = jx22 ;

1

Ziin

3 Matching two-port

2

Z out

ZL

4 (a)

Yi Ii

1

Yiin

3 Matching two-port

Yout

YL

4

2 (b)

Figure 1-18. General matching problem for the driving voltage (a) and current (b) sources.

Introduction to the RF Power Amplifiers Design Y11 = jb11 ;

Y12 = Y21 = jb12 ;

21

Y22 = jb22 ;

where the x11 , x12 , and x22 are the two-port reactive self-impedances; the b11 , b12 , and b22 are the two-port reactive self-admittances. Using these expressions, the two-port input and output impedance and admittance can be rewritten as: Z in = jx11 +

2 2 x12 x12 , and Z out = jx22 + ; jx22 + Z L jx11 + Z i

(1-27)

Yin = jb11 +

b122 b122 , and Yout = jb22 + . jb22 + YL jb11 + Yi

(1-28)

The only one condition from Eq. (1-25) or from Eq. (1-26) is required for the matching by using the reactive reverse two-port, i.e.: Z in = Z i* , or Yin = Yi*

(1-29)

Matching by lossless two-port allows to provide the maximum power transfer. For this case, the power that reaches the load is the following: Pmax =

Ei2 I i2 , or Pmax = , 8 Re( Z i ) 8 Re(Yi )

where Re( Z i ) and Re(Yi ) are the real components of intrinsic impedance and admittance, respectively. The ideal matching is possible at the single frequency only. The simple three-elements T -shape or Π -shape circuits can be used. The wideband matching is a substantially difficult issue due to the theoretical limitations. The greater bandwidth gives the inferior matching. Therefore, the ladder-type filters should be used in order to increase the matching efficiency. 4.1.2

Load matching with the transistor output

The transistor output can be represented as the equivalent current source I C1 with known first harmonic dynamic load line. It is assumed that the current source parameters are independent of the load value.

Chapter 1

22

The condition on obtaining the maximum power in the load can be found by testing the P1 = U1I1 2 dependence on maxima and minima. This condition is the following: U1 dU = − 1 , or RL1 = Rid 1 , I1 dI1

(1-30)

where Rid 1 = dU1 / dI1 is intrinsic differential resistance of the current source I C1 . Therefore, in order to match the transistor output and load for the given frequency and operating mode, the lossless reactive two-port can be used as described in paragraph 4.1.1. In this case, Z i should be selected equal to the RL1 , while Z L means the actual load value, that can be standard 50Ohm or 75Ohm. 4.1.3

Cross-product suppression in the output signal spectrum

The nonlinear behavior of transistor power amplifier is the cause of cross-product components in the output signal spectrum. These components are the harmonics and sub-harmonics of valid signal, and intermodulation distortions. Matching conditions and cross-product suppression conditions can give the contradictory requirements on output electrical network. In this case, two different networks should be synthesized: one is for matching, and the other is for cross-product suppression. 4.1.4

Formation of given impedance for higher harmonics at the transistor output

The amplifier output network should provide the appropriate input impedance for the higher harmonics in order to obtain certain current and voltage waveforms. For class-F amplifier example, the output network provides short-circuit and open-circuit behaviors for even and odd harmonics, respectively. 4.1.5

Dividing and combining signals from several sources

For some applications, the generated power needs to be divided or combined. If a single amplifier cannot provide the required power level, several amplifiers can be used in the work on the single load. This can be realized with specially tuned electrical circuits.

Introduction to the RF Power Amplifiers Design

4.2

23

Narrow-band power amplifiers’ matching circuits

As it was mentioned above, the simple reactive three-elements Π -shape or T-shape electric circuits can be used for matching at the certain frequency. The equations for Z and Y parameters of the Π-shape circuit shown in Fig. 1-19 are the following: z11 = jx11 =

j (b2 + b3 ) jb ; z12 = jx12 = 3 ; ∆y ∆y

z21 = jx21 =

jb3 j (b1 + b3 ) ; z22 = jx22 = ; ∆y ∆y

∆ y = y1 y2 + y2 y3 + y1 y3 = −(b1b2 + b2b3 + b1b3 ) ;

y11 = jb11 = j (b1 + b3 ) ; y12 = jb12 = − jb3 ; y21 = jb21 = − jb3 ; y22 = jb22 = j (b2 + b3 ) .

y3 = jb3 y1 = jb1

y2 = jb 2

Figure 1-19.

Π -shape circuit.

24

Chapter 1

z2 = jx 2

z1 = jx1 z3 = jx3

Figure 1-20.

T -shape circuit.

The T -shape circuit is shown in Fig. 1-20. Its Z and Y parameters can be written as: z11 = jx11 = j ( x1 + x3 ) ; z12 = jx12 = jx3 ; z21 = jx21 = jx3 ; z22 = jx22 = j ( x2 + x3 ) ;

y11 = jb11 =

j ( x2 + x3 ) jx ; y12 = jb12 = − 3 ; ∆z ∆z

y21 = jb21 = −

jx3 j ( x1 + x3 ) ; y22 = jb22 = ; ∆z ∆z

∆ z = Z 1 Z 2 + Z 2 Z 3 + Z 1 Z 3 = −( x1 x 2 + x 2 x3 + x1 x 3 )

The parameters of the selected electrical matching network can be found by using the known values of the load impedance Z L = RL + jxL or admittance YL = g L + jbL , and the input impedance Z in or admittance Yin . Usually, the input impedance or admittance is the real number: Z in = Rin , or Yin = g in = 1 Rin .

Introduction to the RF Power Amplifiers Design

25

Therefore, two pairs of equations can be obtained from the Eqs. (1-27) and (1-28) by their dividing into real and imaginary parts. The first pair is for Z parameters: 2 Rin RL + x11 ( x22 + xL ) − x12 = 0,

(1-31)

RL x11 − Rin ( x22 + xL ) = 0 ,

(1-32)

and the other is for Y parameters: gin g L + b11 (b22 + bL ) − b122 = 0 ,

(1-33)

g Lb11 − g in (b22 + bɧ ) = 0 .

(1-34)

By substituting the x -parameters’ expressions into Eqs. (1-31) and (1-32), the following equations can be obtained for the T-shape circuit: Rin RL + ( x1 + x3 )( x2 + x3 + xL ) − x32 = 0 ,

(1-35)

RL ( x1 + x3 ) − xin ( x2 + x3 + xL ) = 0 .

(1-36)

Here, x is positive for inductance, and is negative for capacitance. In case of Π -shape circuit, substituting the b -parameters’ expressions into Eqs. (1-33) and (1-34) gives the following: gin g L + (b1 + b3 )(b2 + b3 + bL ) − b32 = 0 ,

(1-37)

g L (b1 + b3 ) − g in (b2 + b3 + bL ) = 0 ,

(1-38)

where b is positive for capacitance, and is negative for inductance. There are three known and three unknown values for the each set of Eqs. (1-35), (1-36), and (1-37), (1-38). The known values are Rin , RL , xL or gin , g L , bL , while the unknown values are x1 , x2 , x3 or b1 , b2 , b3 . One of x values or one of b values should be given in order to calculate the matching network parameters. The remained parameters can be found from the Eqs. (1-35), (1-36) or (1-37), (1-38).

26

Chapter 1

4.2.1

Input network example

Usually, the input matching network should provide transformation of standard 50 Ohm or 75 Ohm impedance to the much lower transistor input impedance. Example of input network is shown in Fig. 1-21. The series equivalent circuit can be used for the transistor input impedance. The reactive part of impedance should be accounted in the X L value. The R1 is the required driving source impedance, R2 is the real part of transistor input impedance. Changing the inductance L value compensates the influence of the reactive component of transistor input impedance. The expressions for the network elements’ impedances are the following: Q 2 > R1 R2 − 1 , R1 R2 > 1 ,

(1-39)

X L = QR2 ,

(1-40)

X 1 = R1

X2 =

(

)

R2 1 + Q2 −1 , R1

§ R1 ¨Q + R1 R2 − 1 ¨©

(

)

· R2 1 + Q 2 − 1 ¸¸ , R1 ¹

X1

R1

(1-41)

XL

X2

R2

Figure 1-21. Example of input matching network.

(1-42)

Introduction to the RF Power Amplifiers Design

27

where q is the quality factor, and should be given. The certain inductance or capacitance should be calculated for the given frequency f 0 as L = X /( 2π f 0 ) , C = 1 /(2π f 0 X ) , respectively. 4.2.2

Output network example

The example of output matching network is shown in Fig. 1-22. The transistor output capacitance is accounted in the X1 reactance. The elements’ impedances can be calculated as follow: Q 2 > R1 R2 − 1 ,

(1-43)

X 1 = R1 Q ,

(1-44)

X2 =

XL =

R2

(

)

R2 1 + Q2 − 1 R1

R1 1+ Q 2

,

(

(1-45)

)

· R2 1 + Q 2 − 1 ¸¸ . R1 ¹

§ ¨Q + ¨ ©

(1-46)

XL

R

1

X1

Figure 1-22. Example of output matching network.

X2

R2

28

Chapter 1

4.2.3

Class-F amplifier output network example

The typical class-F output network provides the short-circuit behavior for the second harmonic and acts as open-circuit for the third harmonic at the transistor output. The example of such network13 is shown in Fig. 1-23. The circuit is tuned in such a way, that the first harmonic is resonant for the L1-C1 contour; the third harmonic is resonant for the L2-C2 contour; while the second harmonic is resonant for the series contour of inductive L2-C2 and capacitive L1-C1. The circuit elements can be calculated as follows:

αF

C1 =

L1 =

ω0 ⋅ RL ⋅ (1 − α ) 2

1

ω0 ⋅ C1

L2 =

C2 =

2

ω 0 − π ⋅ BW , ω0

, αF =

,

(1-48)

160 ⋅ L1 ⋅ RL2

[

81 ⋅ (3 ⋅ RL ) + (2ω0 ⋅ L1) 2

1 9ω0 L 2 2

(1-47)

2

]

,

(1-49)

,

(1-50)

L2 C3

C2

C1

L1

Figure 1-23. Example of class-F amplifier output network.

RL

Introduction to the RF Power Amplifiers Design C3 = 8 ⋅ C 2 ,

29 (1-51)

where BW is a frequency bandwidth parameter that can be about the 40% from the operating frequency.

5.

SUMMARY

In this Chapter, the classification of power amplifiers by the transistor output voltage waveform is presented. The cosinusoidal approximation of collector current is described with the Fourier coefficients’ α n dependence on the conduction angle. The polyharmonic class-F power amplifiers are considered in details. The optimum relations between the harmonic magnitudes of transistor output current and voltage are described. The drawback of the current design method not considering the transistor lag at the relatively high frequencies is pointed out.

Chapter 2 THEORETICAL ANALYSIS OF BJT CLASS-F POWER AMPLIFIER

The concept of class-F power amplifier is based on the realization of open-circuit and short-circuit conditions for the higher harmonics at the transistor output17. The third harmonic peaking class-F is the widespread case of such power amplifiers18-23. The input impedance of output network represents the zero resistance for the second harmonic frequency and infinite value for the third harmonic frequency ideally. The transistor output current and voltage impulses become half-wave truncated cosinusoidal and square-wave waveforms, respectively. This leads to the collector efficiency increasing due to the dissipated in transistor power decreasing. However, the above mentioned short-circuit and open-circuit requirements are not sufficient for generation of such waveforms. The phase relations between the harmonics of transistor output current should be taken into account. This problem was considered in details by Colantonio et al.15,16. The pure resistive load at the first harmonic frequency was assumed and truncated cosinusoid approximation was used for transistor output current waveform. It was shown15,16 that the first and the third harmonics of transistor output current are out-of-phased for the conduction angles above 180° . In this case, the first and the third harmonic Fourier coefficients have the opposite signs. The effect of stretching of collector current impulse appears with the increased frequency becoming the transition one. This leads to the appreciable changes of harmonics’ magnitudes and phases. Such stretching of transistor output current impulse was not taken into account in the Colantonio et al. analysis15,16. Therefore, it is interesting and useful to consider.

31

32

Chapter 2

1.

TRANSISTOR MODEL

The bipolar transistor behavior can be described satisfactorily by the charge control model within the substantial operating frequency band24. It allows to account the relations between the collector iC and base iB currents and the excess charge q of minority carriers in the base region and the charges accumulated in the nonlinear barrier emitter C e′ and collector C c′ barrier capacitances. The collector barrier capacitance C c′ is divided into two parts: the capacitance C ca′ of active part of collector junction and the capacitance C cp′ of passive part of collector junction. The C ca′ capacitance represents the part of displacement current flowing between the collector and emitter junction with voltage v j across it. The C cp′ capacitance represents the part of displacement current flowing between the collector and base terminal. The relations for the coupling between the currents, base charges and voltages are the following24: iC =

iB =

q

τT

q

τβ

+ C 'ca

+

d (vCE − v j ) dt

+ C 'cp

d (vCE − vBE ) dt

d (vCE − v j ) dv j dq d (vCE − vBE ) − C 'ca − C 'cp + C 'e dt dt dt dt

(2-1)

(2-2)

where τ T is the average base carrier transit time; τ β is the time constant with the value close to the average base minority carrier lifetime. The minority carriers concentration gradient in the base region close to collector junction assumes to be proportional to the q 24. Moreover, it is supposed that q is varying simultaneously with the excess minority carriers concentration in the base region close to the emitter junction. Latter is the exponential function of v j , so the q can be expressed as follows: q = qinv [exp(v j / ϕT ) − 1]

(2-3)

where qinv = I B 0τ β ; I B 0 is the inverse base thermal current; ϕT = kT / e ; k is the Boltzmann constant; T is the absolute temperature of emitter junction; e is the electron charge. The junction voltage v j and the vBE voltage are coupled by the following equation:

Theoretical Analysis of BJT Class-F Power Amplifier d (v BE − vCE ) º ª v j = v BE − «i B − C 'ɫp » r 'b dt ¬ ¼

33 (2-4)

The τ T value is defined through the transition frequency ωT of common-emitter current transmission coefficient:

τ T = 1 / ωT while τ β is expressed through the τ T and dc current transmission coefficient β DC :

τ β = β DCτ T The set of Eqs. (2-1) - (2-4) allows to define the iC and iB currents for the given transistor input and output voltages for the active or cut-off operating modes. The equations for the static characteristics are obtained from the Eqs. (2-1) - (2-4) for the low operating frequencies case, where the displacement currents can be neglected54. After defining the iC = I C , iB = I B , vBE = VBE , the equations can be presented in the following form: I B = q / Tβ = I B 0 [exp(v j / ϕT ) − 1]

(2-5)

I C = β DC I B

(2-6)

VBE = v j + I B r 'b

The nonlinear dependence Eq. (2-3) can be approximated by the piecewise linear one24 in order to simplify the power amplifier operating analysis: q = C d (v j − ȿ ' )

v j >E '

,

(2-7)

where the Cd is the average diffusion capacitance of the effective part of the transistor active region. The differential capacitance C 'd = dq / dv j that can be found from Eq. (2-3) is proportional to the base stored charge: C 'd = q / ϕT for the q >> qinv . The Cd should be selected as Cd = C d max / 2 = qmax / 2ϕT

34

Chapter 2

for the piecewise linear approximation Eq. (2-7)24. The E ' is the cut-off voltage that is boundary between the active and the cut-off modes. The representation of the base recombination current component dependence (2.5) on the v j is as follow: I B = (1 / rβ )(v j − E ' )

v j >E '

(2-8)

where rβ = τ β / Cɞ

is the average resistance of parallel equivalent circuit of the base-to-emitter junction in the active region for the given C d . As can be seen from the Eqs. (2-6) and (2-8), the dependence of I C (v j ) should be approximated as follow24: I C = S j (v j − E ' )

v j >E '

(2-9)

where S j = β DC / rβ

is the transconductance of the collector current on the base-to-emitter junction. The piecewise linear dependencies of I B (VBE ) , and I C (V BE ) for the low frequencies can be obtained by substitution of Eq. (2-8) into (2-5) as follows24: I B = S b (VBE − E ' ) V

I C = S (V BE − E ' ) V

BE > E '

BE > E '

where S b = 1 /(r 'b + rβ ) ; S = β DC S b = [rβ /(r 'b + rβ )]S j .

The dependencies of nonlinear barrier capacitances C'ɫa , C'cp , C'e on the voltages across them can be neglected in order to further simplification

Theoretical Analysis of BJT Class-F Power Amplifier

35

of the analysis24. The values of capacitances are assumed as the constants C ca , C cp , C e , and averaged by the operating voltage diapason. Besides, the each of capacitances is usually small comparing with the diffusion one C d . Approximated charge control model can be represented by the equivalent circuit as shown in Fig. 2-124. The switch Ʉ is closed for the v j > E ' , and is open for the v j < E ' . The model like this is also known as the Giacoletto model25. The bipolar junction transistor lag for the voltage source driving can be accounted in the model as follows. Let assume the cosinusoidal transistor input voltage: VBE = E BIAS + Vin cos τ

The dependence of v j on the τ = ω 0 t have to be found in order to obtain the currents iɋ (τ ) , and i B (τ ) according to the equivalent circuit shown in Fig. 2-1. The time constants of input circuit for the open-state transistor and close-state transistor are written as24:

τS =

r 'b rβ r 'b + rβ

(C d + C e )

τ e = rb ɋ e

Ccp Cca

rb

K

+ vBE

-

Ce Cd

rβ

+

iC

+

vj

v CE

-

-

Figure 2-1. Equivalent circuit of BJT model.

36

Chapter 2

The cut-off or close angle is defined as follows: cos θ = −

E BIAS − E ' Vin

The θ is the low-frequency close angle, as it identifies the collector current cut-off for the ω 0 → 0 24. The input circuit current transmission coefficient for the v j > E ' , and ω 0 → 0 is the following: kj =

rβ r 'b + rβ

.

Therefore, the differential equations for the v j (τ ) of the open and the closed transistor states can be written as: § dv j · ¸ + v j − E ' = k jVin (cosτ − cos θ ), v j > E ' ¸ © dτ ¹ § dv j · ¸ + v j − E ' = Vin (cosτ − cosθ ), v j < E ' ω 0τ e ¨¨ ¸ © dτ ¹

ω 0τ S ¨¨

(2-10)

The assumption of τ e = 0 is valid for the C e

R1 51 − 1 Ÿ 10 2 > − 1 Ÿ 100 > 16 - true , R2 3

R1 51 >1 Ÿ > 1 - true . R2 3

B. Calculating the circuit parameters: - from Eq. (1-40): X L = QR2 = 10 ⋅ 3 = 30 (Ohm),

L=

XL 30 = = 5.36477 ⋅ 10 −9 (Hn); 6 2πf 0 2 ⋅ 3.1415 ⋅ 890 ⋅ 10

- from Eq. (1-41): X 1 = R1

(

)

(

)

R2 3 1 + Q 2 − 1 = 51 1 + 10 2 − 1 = 113.36 (Ohm), R1 51

102

Appendix C1 =

1 1 = = 1.5775 ⋅ 10 −12 (F); 6 2πf 0 X 1 2 ⋅ 3.1415 ⋅ 890 ⋅ 10 ⋅ 113.36

- from Eq. (1-42): X2 =

=

C2 =

§ ¨Q + ¨ R1 −1© R2 R1

(

)

(

)

· R2 1 + Q2 − 1¸ ¸ R1 ¹

· 51 §¨ 3 10 + 1 + 10 2 − 1 ¸ = 38.96 (Ohm), ¸ ¨ 51 51 ¹ −1© 3

1 2πf 0 X 2

=

1 = 4.58998 ⋅ 10 −12 (F). 6 2 ⋅ 3.1415 ⋅ 890 ⋅ 10 ⋅ 38.96

C. Creating the schematic (see Fig. 1-21) in the Serenade Schematic Editor. The created schematic is shown in Fig. A-16. The R1 and R2 resistances are represented by P1 and P2 port terminations, respectively. D. Performing Linear Analysis:

Figure A-16. Serenade schematic for input network.

103

Appendix

- Frequency band calculation: start frequency is 100Mhz, stop frequency is 3 f 0 + 100( Mhz ) = 3 ⋅ 890 + 100( Mhz ) = 2770( Mhz ) , frequency step is 10Mhz. - Linear Frequency control block properties are shown in Fig. A-17. - Linear analysis process is shown in Fig. A-18.

Figure A-17. Linear Frequency control block property window.

Figure A-18. Linear analysis process.

104

Appendix

E. Displaying the results: - return loss S11 is shown in Fig. A-19; - insertion loss S21 is shown in Fig. A-20;

Figure A-19. Return loss

Figure A-20. Insertion loss

S11 .

S21 .

105

Appendix

Figure A-21. Input impedance

Z IN .

- input impedance Z IN is shown in Fig. A-21. Exercise 1, output network: A. Verifying the conditions given by Eq. (1-43): Q2 >

R1 25 1 − 1 Ÿ 10 2 > − 1 Ÿ 100 > − - true . 50 R2 2

B. Calculating the circuit parameters: - from Eq. (1-44): X1 =

R1 25 = = 2.5 (Ohm), Q 10

C1 =

1 1 = = 7.153 ⋅ 10 −11 (F); 6 2πf 0 X 1 2 ⋅ 3.1415 ⋅ 890 ⋅ 10 ⋅ 2.5

- from Eq. (1-45):

106

Appendix X2 =

C2 =

R2

(

)

R2 1+ Q2 −1 R1

1 2πf 0 X 2

=

=

50

(

)

50 1 + 10 2 − 1 25

= 3.5267 (Ohm),

1 = 5.0706 ⋅ 10 −11 (F); 6 2 ⋅ 3.1415 ⋅ 890 ⋅ 10 ⋅ 3.5267

- from Eq. (1-46):

(

)

§ · ¨ Q + R2 1 + Q 2 − 1 ¸ ¸ R1 1 + Q ¨© ¹ · 25 §¨ 50 = 10 + 1 + 10 2 − 1 ¸ = 5.9845 (Ohm), 2 ¨ ¸ 25 1 + 10 © ¹

XL =

R1

2

(

L=

)

XL 5.9845 = = 1.0701 ⋅ 10 −9 (Hn); 6 2πf 0 2 ⋅ 3.1415 ⋅ 890 ⋅ 10

C. Creating the schematic (see Fig. 1-22) in the Serenade Schematic Editor.

Figure A-22. Serenade schematic for output network.

107

Appendix

Figure A-23. Return loss

Figure A-24. Insertion loss

S11 .

S21 .

108

Appendix

Figure A-25. Input impedance

Z IN .

The created schematic is shown in Fig. A-22. The R1 and R2 resistances are represented by P1 and P2 port terminations, respectively. D. Performing Linear Analysis: similar way as for input network. E. Displaying the results: - return loss S11 is shown in Fig. A-23; - insertion loss S21 is shown in Fig. A-24; - input impedance Z IN is shown in Fig. A-25. Exercise 1, class-F amplifier network: - from Eq. (1-47): BW = 0.4 ⋅ f 0 = 0.4 ⋅ 890 ⋅ 10 6 = 356 ⋅ 10 6 (Hz),

αF = =

2π f 0 − π ⋅ BW 2π f 0 2 ⋅ 3.1415 ⋅ 890 ⋅10 6 − 3.1415 ⋅ 356 ⋅10 6 = 0.8, 2 ⋅ 3.1415 ⋅ 890 ⋅106

109

Appendix

αF

C1 =

2π f 0 ⋅ R2 ⋅ (1 − α F2 ) 0.8 = 7.9478 ⋅10 −12 (F); 6 2 2 ⋅ 3.1415 ⋅ 890 ⋅10 ⋅ 50 ⋅ (1 − 0.8 )

=

- from Eq. (1-48): L1 = =

1 (2πf 0 ) 2 ⋅ C1 1 = 4.0236 ⋅ 10 −9 (Hn); (2 ⋅ 3.1415 ⋅ 890 ⋅ 10 6 ) 2 ⋅ 7.9478 ⋅ 10 −12

- from Eq. (1-49):

160 ⋅ L1⋅ R2 2

L2 =

2 2 81⋅ ª( 3 ⋅ R2 ) + ( 2 ⋅ 2π f 0 ⋅ L1) º ¬ ¼ 160 ⋅ 4.0236 ⋅10−9 ⋅ 502 = 2 2 81 ⋅ ª«( 3 ⋅ 50 ) + ( 2 ⋅ 2 ⋅ 3.1415 ⋅ 890 ⋅106 ⋅ 4.0236 ⋅10−9 ) º ¬ ¼ −10 = 8.1017 ⋅10 ( Hn);

- from Eq. (1-50):

C2 = =

1 9 ( 2π f 0 ) L 2 2

1 9 ⋅ ( 2 ⋅ 3.1415 ⋅ 890 ⋅10

)

6 2

⋅ 8.1017 ⋅10

−10

= 4.3857 ⋅10−12 (F);

- from Eq. (1-51): C 3 = 8 ⋅ C 2 = 8 ⋅ 4.3857 ⋅ 10 −12 = 3.5085 ⋅ 10 −11 (F).

B. Creating the schematic (see Fig. 1-23) in the Serenade Schematic Editor.

110

Appendix

Figure A-26. Serenade schematic for the class-F amplifier network.

Figure A-27. Return loss

S11 .

111

Appendix

Figure A-28. Insertion loss

S21 .

Figure A-29. Input impedance

Z IN .

112

Appendix

The created schematic is shown in Fig. A-26. The R1 and R2 resistances are represented by P1 and P2 port terminations, respectively. C. Performing Linear Analysis: similar way as for input network. D. Displaying the results: - return loss S11 is shown in Fig. A-27; - insertion loss S21 is shown in Fig. A-28; - input impedance Z IN is shown in Fig. A-29.

3.

CLASS-C AMPLIFIER

3.1

Exercises

Background: sections 1, 2, 4.2.2 of Chapter 1, section 1 of the Appendix. Exercise 1: The equivalent circuit of class-C power amplifier concerned is shown in Fig. A-30. The amplifier load characteristics should be obtained using Serenade nonlinear analysis. The input impedance of the output network should vary from 25Ohm to 75Ohm with 5Ohm step size. This calls for the C1 , C2 , and L1 changes (see paragraph 4.2.2 of Chapter 1) at the each step. The influence of blocking capacitor Cb should be neglected for the elements’ values calculations. Initial values: The operating frequency values are given in Table A-9. The BFP490 model parameters are summarized in Table 5-1. The transistor is used without package elements in order to increase simplicity. The input and output port termination impedances are 50Ohm. Other circuit parameters are the following: Cin = 1.9 pF, Lin = 0.1nH , Lch1 = Lch 2 = 1uH , Cb = 50 pF, Ebias = 0.65V , VCC = 5V . The driving power is Pin = 0.002W . Report: The report should contain the load characteristics of the following amplifier parameters: - collector current dc component (Ic(BFP490)); - collector current first harmonic magnitude (Ic(BFP490)); - first harmonic power at the transistor output (POce(BFP490)); - collector efficiency (EF2). Exercise 2: According to the results of Exercise 1, the C1 , C2 , and L1 values appropriate to the maximal first harmonic transistor output power should be selected. For these values, the collector current and voltage waveforms should be simulated by Serenade nonlinear analysis. Report: the report should contain the following graphs: - collector current waveform (Ic(BFP490)) - collector-emitter voltage waveform (Vce(BFP490)).

113

Appendix Table A-9. Exercises variants Variant Number 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

f 0 (MHz) 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011

VCC

Lch2 ɋin

L1

ɋb

Lin ɋ1

Pin

ɋ2

Lch1

Ebias

Figure A-30. Equivalent circuit of class-C power amplifier.

114

Appendix

Exercise 3: The frequency characteristic of amplifier collector efficiency should be obtained using the Serenade nonlinear analysis. The frequency band should be taken as ± 20% from the operating frequency. Report: The report should contain the graph with the frequency characteristic of collector efficiency (EF2).

3.2

Example

Variant 0: The operating frequency is 989MHz (see Table A-9). Other initial values, similar for all variants: the input and output port termination impedances are 50Ohm, Cin = 1.9 pF, Lin = 0.1nH , Lch1 = Lch 2 = 1uH , Cb = 50 pF, Ebias = 0.65V , VCC = 5V, the driving power is Pin = 0.002W . Exercise 1: A. Output network elements’ calculation: - using Eqs. (1-30) - (1-32), the output network elements’ values can be obtained for given input impedances. The following MatLab code can be helpful: %*********************************************** format short g; Q = 10; R2 = 50; f0 = input('frequency (MHz):\n'); f0 = f0 * 1e6; R1_start = input('start input impedance value (Ohm):\n'); R1_stop = input('stop input impedance value (Ohm):\n'); R1_step = input('step input impedance value (Ohm):\n'); R1 = R1_start : R1_step : R1_stop; X1 = R1 / Q; C1 = 1 ./ (2 * pi * f0 * X1); X2 = R2 ./ sqrt((R2 ./ R1) * (1 + Q^2) - 1); C2 = 1 ./ (2 * pi * f0 * X2); XL = R1 / (1 + Q^2) .* (Q + sqrt((R2 ./ R1) * (1 + Q^2) - 1)); L = XL / (2 * pi * f0);

115

Appendix R1_C1_C2_L = [R1', C1', C2', L'] %************************************************

- calculated values of C1 , C2 , and L1 are summarized in Table A-10. B. Performing Nonlinear Analysis: - Nonlinear Frequency control block properties are shown in Fig. A-31. - Sinusoidal RF Source properties are shown in Fig. A-32. - Nonlinear analysis process is shown in Fig. A-33. C. Displaying the results: - The Report Editor window is shown in Fig. A-34.

Table -10. [Please provide a caption for this table] Input impedance (Ohm) C1 (pF) 25 64.37 30 53.642 35 45.979 40 40.231 45 35.761 50 32.185 55 29.259 60 26.821 65 24.758 70 22.989 75 21.457

C2 (pF) 45.63 41.634 38.526 36.02 33.943 32.185 30.672 29.351 28.186 27.147 26.213

L1 (nH) 0.963 1.0963 1.2252 1.3506 1.4731 1.5933 1.7115 1.8278 1.9426 2.0561 2.1683

Figure A-31. Nonlinear Frequency control block property window.

116

Appendix

Figure A-32. Sinusoidal RF Source property window.

Figure A-33. Nonlinear analysis process.

- The collector current dc component (Ic(BFP490)), collector current first harmonic magnitude (Ic(BFP490)), first harmonic power at the transistor output (POce(BFP490)), and collector efficiency (EF2) absolute values are summarized in Table A-11.

117

Appendix

Figure A-34. The Report Editor window.

Table A-11. Simulated load characteristics Input impedance Ic(BFP490) Ic(BFP490) (Ohm) (mA) (mA) 25 59.39 92.71 30 58.97 91.127 35 58.14 89.18 40 56.9 86.4 45 54.57 82.87 50 51.7 78.68 55 49.359 74.5 60 47.448 70.43 65 45.67 66.57 70 44.132 63.18 75 42.75 60.21

POce(BFP490) (mW) 107.55 124.68 139.33 149.45 154.662 154.92 152.81 148.94 144.19 139.88 136.08

EF2 (%) 36.159 42.216 47.845 52.436 56.579 59.827 61.812 62.67 63.03 63.28 63.55

118

Appendix 100 90 80 70 60 50 40 20

30

40

50

60

70

80

Figure A-35. Load dependencies of collector current dc component and first harmonic magnitude.

160 150 140 130 120 110 100 20

30

40

50

60

70

80

Figure A-36. Load dependency of first harmonic power at the transistor output.

119

Appendix 65

60

55

50

45

40

35 25

30

35

40

45

50

55

60

65

70

Figure A-37. Load dependency of collector efficiency.

Figure A-38. The Report Editor window.

75

120

Appendix

Figure A-39. Simulated collector current waveform.

Figure A-40. Simulated collector-emitter voltage waveform.

121

Appendix

- Load dependencies of collector current dc component and first harmonic magnitude are shown in Fig. A-35. - Load dependency of first harmonic power at the transistor output is shown in Fig. A-36. - Load dependency of collector efficiency is shown in Fig. A-37. Exercise 2: A. According to the Tables A-10, A-11 and Fig. A-36, the C1 = 32.185pF , C 2 = 32.185pF , and L1 = 1.5933nH values appropriate to the 50 Ohm input impedance of output network (maximal first harmonic transistor output power) are selected. B. Displaying the results: - The Report Editor window is shown in Fig. A-38. - Simulated collector current waveform is shown in Fig. A-39. - Simulated collector-emitter voltage waveform is shown in Fig. A-40. Exercise 3: A. Frequency band calculation: start frequency is f 0 − 0.2 ⋅ f 0 = 989 − 0.2 ⋅ 989 = 791.2 (MHz) ≈ 791 (MHz) , stop frequency is f 0 + 0.2 ⋅ f 0 = 989 + 0.2 ⋅ 989 = 1186.8 (MHz) ≈ 1187 (MHz) , frequency step is 1Mhz. B. Performing Nonlinear Analysis: - Nonlinear Frequency control block properties are shown in Fig. A-41. C. Displaying the results: - Report editor window is shown in Fig. A-42. - Frequency dependence of collector efficiency is shown in Fig. A-43.

Figure A-41. Nonlinear Frequency control block property window.

122

Appendix

Figure A-42. Report editor window.

Figure A-43. Frequency dependence of collector efficiency.

123

Appendix

4.

CLASS-F AMPLIFIER

4.1

Exercises

Background: subsections 2 and 4.2.3 of Chapter 1, section 1 of the Appendix. Exercise 1: The class-F amplifier output network concerned is shown in Fig. A-44. This circuit should provide the 65Ohm input impedance for the first harmonic, and 5Ohm and 260Ohm ones for the second and the third harmonics, respectively. The Serenade Linear Optimization block (OPT) should be used as shown in Fig. A-45. It can be reached by the Parts/Control Blocks/Linear Optimization Info. The Frange1, Frange2, and Frange3 properties should be set to the frequencies’ values of the first, second, and third harmonics, correspondingly. The Goals1, Goals2, and Goals3 should contain the following strings, respectively: MZIN = 65, MZIN = 5, and MZIN = 260.

Figure A-44. Class-F amplifier output network concerned.

124

Appendix

Figure A-45. Serenade Linear Optimization block.

Figure A-46. Property window of circuit element allowed for optimization.

The circuit elements allowed for optimization should contain the question marks at the beginning and at the end of the value as shown in Fig. A-46. The Serenade linear analysis, and then the linear optimization should be conducted in order to achieve optimized values of the circuit elements. Initial values: The operating frequency should be taken from the Table A-9. Initial values of circuit elements should be calculated using

125

Appendix

expressions described in the paragraph 4.2.3 of Chapter 1. The input and output port termination impedances are 65Ohm. Report: The report should contain optimized values of the network elements. Exercise 2: The equivalent circuit of class-F power amplifier is shown in Fig. A-47. The influence of conduction angle on the collector-emitter voltage waveform should be observed. Therefore, the bias voltage Ebias should be changed from 0.55V to 0.75V with the about 0.01V step size. The collector-emitter voltage waveform should be achieved by Serenade nonlinear analysis for each step of Ebias varying. Initial values: Operating frequency and BFP490 model parameters should be taken from the Tables A-9 and 5-1, respectively. Values of the output network elements should be the optimized ones from Exercise 1 report. The input port termination impedance is 50Ohm, while the output is 65Ohm. Other circuit parameters are the following: Cin = 1.9 pF , Lin = 0.1nH , Lch1 = Lch 2 = 1uH , Cb = 50 pF , VCC = 5V . The driving power is Pin = 0.002W . Report: The report should contain the graphs with the collector-emitter voltage waveforms.

VCC

Lch2 ɋin

Pin

ɋb

Lin

Lch1

Ebias

Figure A-47. Equivalent circuit of class-F power amplifier.

126

4.2

Appendix

Example

Variant 0: The operating frequency is 989MHz (see Table A-9). Calculated initial values of circuit elements are the following (see paragraph 4.2.3 of Chapter 1, and paragraph 2.2 of Appendix): C1 = 5.5017 pF , L1 = 4.7071nH , L2 = 0.9478nH , C 2 = 3.0359pF , C 3 = 24.287pF . The input and output port termination impedances are 65Ohm. Exercise 1: A. Schematic window for the class-F circuit is shown in Fig. A-48. B. Performing the Optimization as shown in Fig. A-49. C. Displaying the results: - Optimized parameters of class-F network are the following: C1 = 6.2912pF , L1 = 4.068nH , L2 = 1.0402nH , C1 = 2.5686pF . - Frequency dependence of input impedance is shown in Fig. A-50.

Figure A-48. Schematic window for the class-F circuit.

127

Appendix

Figure A-49. Linear Optimization window.

Exercise 2: Simulated collector-emitter voltage waveforms for the 0.55V and 0.75V bias are shown in Figs. A-51, A-52, respectively.

128

Appendix

Figure A-50. Frequency dependence of input impedance.

Figure A-51. Simulated collector-emitter voltage waveform for the 0.55V bias.

Appendix

Figure A-52. Simulated collector-emitter voltage waveform for the 0.75V bias.

129

References

1. 2. 3. 4. 5. 6. 7. 8. 9.

10. 11.

12. 13. 14. 15.

16.

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Index

amplitude characteristics 2

input matching network 26

bi-harmonic operation 7 Bragg equation 70

junction voltage 32 large signal mode 4 load characteristics 2 load matching 21

charge control model 32 class AB 4 class B 4 class C 4 class F 7 class-F output network 28 collector efficiency 31 conduction angle 6 critical mode 3 cut-off 4 cut-off voltage 34

matching conditions 19 maximally flat waveforms 8 modulation characteristics 2 narrow-band networks 23 output matching network 27 output power 1 overloaded mode 3

dc supply power 1 defected ground structures 69 differential resistance 22 diffusion capacitance 33 dividing and combining 22 double-period ESB 74 driving signal source 2 dynamic load line 3

pass-band characteristic 72 phase relations 31 photonic band-gap 69 piecewise linear approximation 33 polyharmonic operation 4 possible class-F realization 61 power gain 1 quality factor 27

efficiency 1 electromagnetic stop-band 69

rectangular-shape holes 75 signal source matching 19 sine-wave operation 4 small signal mode 4 spectral analysis 37

fifth-harmonic peaking 74 frequency characteristics 2 half-wave truncated cosinusoid 31

135

Index

136 square-shape holes 74 square-wave 31 stretching effect 65 switching mode 3

transistor lag 35 transistor utilization factor 6 two-port network 19 undersaturated mode 3

third harmonic peaking 31 transistor input impedance 19

wideband matching 21